Advance in Electronic and Electric Engineering. ISSN 2231-1297, Volume 4, Number 4 (2014), pp. 327-332 Research India Publications http://www.ripublication.com/aeee.htm Series Parallel Switched Multilevel DC Link Inverter Fed Induction Motor N. Saikumar 1, Mr. G. Durga Prasad 2 and Dr. V. Jagathesan 3 1 P.G. Student, 1,2 Swarnandhra College of Engg.& tech.(scet), Narsapur, Andhra Pradesh, JNTU (Kakinada), INDIA. 2 Assistant Professor, 1,2 EEE Department, Karunya University, Karunya Nagar, Coimbatore, T.N, INDIA. Abstract In recent days multilevel inverters has become very popular for motor drive applications of industry. Multilevel pulse width modulation inversion is an effective solution for increases the level number of the output wave form and thereby dramatically reduced to the harmonics and total harmonic distortion. The MLDCL provides a dc voltage with the shape of a staircase, with or without pulse width modulation, to the bridge inverter, which in turn alternates the polarity to produce an ac voltage. This paper orients to develop a series parallel switched multilevel dclink inverter (SPMLDCLI) with a primary objective to arrive at reduced component count for a particular voltage and the THD in output voltage of inverters is significantly improved compared with already existing topologies. Finally this paper presents SPSMLDCLI fed single phase induction motor drive. The performance of the topology is investigated through MATLAB based simulation. Index terms: SPSMLDCLI, THD, INDUCTION MOTOR. 1. Introduction Multilevel inverters have very important development for high power medium voltage AC drives. Quite a lot of topologies have found industrial approval; Neutral Point Clamped, flying capacitor, H-bridge, cascaded with separated DC source, several control and modulation strategies have been developed Pulse Width Modulation
328 N. Saikumar et al (PWM), Sinusoidal PWM, Space Vector PWM and Selective harmonic Eliminations[1]. Multilevel converters are mainly controlled with sinusoidal PWM extended to multiple carrier arrangements of two types: Level Shifted (LS-PWM), which includes Phase Disposition (PD-PWM), Phase Opposition Disposition (POD- PWM) and Alternative Phase Opposition Disposition (APOD-PWM) or they can be Phase Shifted (PS-PWM) [2] this paper presents a new class of multilevel inverters based on a multilevel dc link (MLDCL). Single phase Induction Motor has good efficiency and moderate starting torque. This paper presents a new variety of MLDCLI which uses lower number of sources, power switches and eliminates the necessity of capacitors. The proposed topology coined as series parallel switched multilevel dc-link inverter (SPSMLDCLI) synthesizes a nearly distortion less sinusoidal output voltage owing to its inherent ability to increase the number of levels. The performance of this SPMLDCLI is investigated through MATLAB based simulation over a range of viable modulation indices. 2. Circuit Topology The power circuit of the inverter consists of a number of voltage sources in the ratio V 0 :Vn with switches and a diode is connected across the H-bridge. The voltage sources are connected in series parallel manner for generating desired level of output voltage.to increase the number of levels further, an external cell is required which contains two voltage sources and diodes along with a switch as shown in fig.1. Hence when a dc link voltage from power circuit is fed to the full bridge inverter, a Nearly high quality sinusoidal output voltage will be obtained. Therefore with less number of switches better THD output is obtained when compared with existing topologies. The operating modes of the fifteen level SPSMLDCLI topology are explained with individual figures for each level shown below figures(2-3). Fig. 1: Generalized structure of SPSMLDCLI.
Series Parallel Switched Multilevel DC Link Inverter Fed Induction Motor 329 Fig. 2: SPSMLDCLI operating mode-level 1(±50 V). Fig. 3: SPSMLDCLI operating mode-level 2(±100 V). 3. Simulation Results The SPSMLDCLI topology has been implemented and simulated for R,RL and Induction Motor as loads. The output voltage and current waveforms for fifteen level topology and stator current, torque and speed characteristics are shown in figures (figure9-figure 14) Fig. 4: Simulation Circuit for SPSMLDCLI FED induction motor.
330 N. Saikumar et al Fig. 5: Output voltage waveform of SPSMDCLI with RL-load Fig. 6: Output voltage of DBMDCLI with RL-load Fig. 7: FFT Analysis (SPSMLDCLI) Fig. 8: Torque and speed waveform of SPSMLDCLI fed single phase induction motor. Fig. 9: Stator current waveform of SPSMLDCLI fed single phase induction motor.
Series Parallel Switched Multilevel DC Link Inverter Fed Induction Motor 331 4. Conclusion A series parallel switched multilevel dc link inverter fed induction motor drive has been implemented using mat lab and simulation results are presented. Due to reduced switch count of this topology compared with existing topologies, the cost will be reduced and less THD output voltage will be obtained. A modified PD-MC PWM method is presented for SPSMLDCLI Fed induction motor drive. The proposed method combines PD-MC PWM and LS-PWM, which are high quality output voltages and input currents respectively. References [1] K.RAMANI AND DR.A.KRISHNAN SMIEE. An estimation of multilevel inverter fed induction motor drive international journal of review in computing 2009 [2] Mauricio Angulo, Pablo Lezana, Samir kouro, Jose Rodriguez and wu level shifted for cascaded multilevel inverters with even power distribution IEEE transactions 2007 [3] Gui-Jia Su Multilevel dc link inverter for brushless permanent magnet motors with very low inductance IEEE IAS 2001 [4] Senthil Kumar N, Gokulakrishnan J. Impact of FACTS controllers on the stability of power systems connected with doubly fed induction generators. Int J Elect Power Energy Syst 2011;33(5):1172 84 [5] Meynard TA, Foch H, Forest F, Turpin C, Richardeau F, Delmas L, et al. Multicell converters: derived topologies. IEEE Trans Indus Electron 2002;49(5):978 87. [6] Rodriguez J, Jih-Sheng Lai, Fang Zheng Peng. Multilevel inverters: a survey of topologies, controls, and applications. IEEE Trans Indus Electron 2002;49(4): 724 38. [7] Veenstra M, Rufer A. Control of a hybrid asymmetric multilevel inverter for competitive medium-voltage industrial drives. IEEE Trans Ind Appl 2005;41(2):655 64 [8] Manjrekar MD, Steimer PK, Lipo TA. Hybrid multilevel power conversion system: a competitive solution for high-power applications. IEEE Trans Ind Appl 2000;36(3):834 41 [9] Marchesoni M, Tenca P. Diode-clamped multilevel converters: a practicable way to balance DC-link voltages. IEEE Trans Ind Electron 2002;49(4):752 65. [10] Jih-Sheng Lai, Fang Zheng Peng. Multilevel converters-a new breed of power converters. IEEE Trans Indus Appl 1996;l.32(3):509 17.
332 N. Saikumar et al