Integrated Circuits: FABRICATION & CHARACTERISTICS - 4 Riju C Issac
INTEGRATED RESISTORS Resistor in a monolithic IC is very often obtained by the bulk resistivity of one of the diffused areas. P-type base diffusion is commonly used. N-type emitter diffusion is also employed. Since these diffusion layers are very thin, it is convenient to define sheet resistance (R s ). Sheet Resistance: Sheet resistance is a measure of resistance of thin films that are normally uniform in thickness. Applicable to 2D systems (systems with very small thickness) Current is along the plane of the sheet.
INTEGRATED RESISTORS (contd) l R s ly y y - thickness R s is inde[pendant of the size of the square
INTEGRATED RESISTORS (contd) Sheet Resistance (contd) The construction os base diffused resistro is shown in the figure. The resistance value may be computed from R l yw Rs l w Where l and w are the length and width Of the diffused area Cross sectional view Top view
Resistance Values Since the sheet resistance of the base and emitter diffusions is fixed, the only variables available for diffused resistor design are stripe length and stripe width. Stripe widths of less than 1 mil are not usually used due to manufacturing difficulties Overall there will be as high as ± 10% resistor tolerance due to mask drawing errors, mask misalignment or photolithographic errors. Range of values obtainable with diffused resistors is limited by the size of the area required by the resistor. Practically range is 20Ω - 30 k Ω for base diffused resistors and 10Ω - 1 k Ω for emitter diffused resistor Since tolerances are as high as 10% at 25 o C with ratio tolerance as low as 1% Therefore, the design of IC should, if possible, emphasize resistance ratios rather than absolute values INTEGRATED RESISTORS (contd)
Resistance Values Temperature coefficients of these heavily doped resistors is positive and is +0.06 % per o C from -55 to 0 o C +0.2 % per o C from 0 o C to 125 o C INTEGRATED RESISTORS (contd)
INTEGRATED RESISTORS (contd) Equivalent Circuit A model of diffused resistor is in the figure Parasitic capacitances of base-isolation C1 and isolation- substrate C2 junctions are included Also a parasitic PNP transistor with the substrate as collector isolation n type region as base and the resistor P type material as the emitter Collector is Reverse biased because p type substrate is at the most negative potential Therefore it is necessary to keep the emitter reverse Biased to keep the parasitic transistor at cutoff this condition is maintained by placing all the resistors in the same isolation region and connecting the n-type isolation region surrounding the resistors to the most positive voltage present in the circuit
Thin film resistors A technique of vapour thin film deposition is also used to fabricate resistor in IC Metal (Ni-Cr) film is deposited with thickness less than 1 micron on Silicon dioxide layer and masked etching is used to make the desired geometry Metal resistor is then covered with insulating layer Apertures for ohmic contacts are made through this insulating layer Typical sheet resistance for Ni-Cr is 400 ohms per square - resistance values 20 Ω to 50 kω INTEGRATED RESISTORS (contd)
Integrated Capacitors and Inductors Transition capacitance of a reverse biased p-n junction or thin film technique is utilised for making capacitors in ICs. i.e. there are two types 1. Junction capacitors and 2. Thin film capacitors
Junction Capacitors Cross sectional view is shown in the Figure. The capacitor is formed by the reverse biased Junction J 2 which seperates the epitaxial n- type layer from the upper p-type diffusion area Junction J 1 between p- type substrate and n- type epitaxial layer introduces a parasitic capacitance C 1 Equivalent circuits also is shown in the figure
Junction Capacitors The value of C 2 depends on junction area and impurity concentration: C 2 is given by C 2 A W where is the permittivity of material A the area of capacitor and W the plate separation The series resistance R (10Ω - 50 Ω) represents the resistance of n-type layer Substrate should be at the most negative voltage to reduce C 1 to a minimum. Also keep the junction J 1 reverse biased to isolate capacitor from other elements Note: C 2 is polarized since J 2 must always be reverse biased
Thin Film Capacitors A MOS non-polarised capacitor is shown in the figure. The structure is a parallel plate capacitor with silicon dioxide as the dielectric A surface thin film of aluminium is the top plate. Bottom plate is the heavily doped n + region that is formed during emitter diffusion. Typical values of capacitance are of the order of 0.4 pf/mil 2 for an oxide thickness of 500 Å Capacitance varies inversely as thickness
Thin Film Capacitors Equivalent circuit of thin film capacitors is shown in the figure C 1 is the parasitic capacitance of junction J 1 of the collector substrate junction R - resistance of the n + region.
Inductors No practical inductance values have been obtained on Si substrates using semiconductor or thin film components. Therefore, their use is avoided in IC design, whereever possible. If inductors are needed, it is connected externally.
Summary of characteristics of integrated components: 1. A restricted range of values exists for resistors and capacitors 10 Ω R 30 kω and C 200 pf 2. Poor tolerances are obtained in fabricating resistors & Capacitors of specific magnitudes ± 20% of absolute values is typical. Resistance ratio tolerances can be clamped to ± 1% because all resistances are made at the same time and by the same techniques. 3. Components have high temperature coefficients and may also be voltage sensitive. 4. High frequency response is limited by parasitic capacitance. 5. Technology is costly for small quantity production 6. No practical inductors or transformers can be integrated.