CURRENT MODE PWM CONTROLLER LMA/A/A/5A FEATURES SOP/ DIP PIN Configulation Automatic feed forward compensation Optimized for offline converter Double pulse suppression Current mode operation to 500 KHz High gain totem pole output Internally trimmed bandgap reference Undervoltage lockout with hysteresis Low start up current :< 0. ma Moisture Sensitivity Level DESCRIPTION ORDERING INFORMATION The LMxA are fixed frequency current-mode PWM controller. They are specially designed for Off-Line and DC-to-DC converter applications with minimal external components. These integrated circuits features a trimmed oscillator for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totempole output ideally suited for driving a power MOSFET. Protection circuitry includes built in under-voltage lockout and current limiting. SIMPLIFIED BLOCK DIAGRAM SOP- PKG DIP- PKG Compen sation oltage Feedback Current Sense Device LMA/A/A/5A D LMA/A/A/5A N 7 6 5 cc OUTPUT GND Package SOP DIP R 5 cc Undervoltage Lockout R Undervoltage Lockout 7 cc RT/CT FB + - Error Amplifier Oscillator Latching PWM 6 Output 5 Ground Current Sense Input ABSOLUTE MAXIMUM RATINGS (T A = 5 ) Characteristic Symbol alue Unit Power Supply oltage cc 0 Output Current I o ± A Analog Inputes oltage IN -0. to 5.5 Error Amp Output Sink Current I SINK 0 ma Power Dissipation P D W Storage Temperature Range Tstg -65 to 50 Lead Temperature (soldering 5 sec) TL 60 00 - er..0
CURRENT MODE PWM CONTROLLER LMA/A/A/5A ELECTRICAL CHARACTERISTIC (cc=5(note ), R T = 0kΩ, C T =.nf 0 T A 70 ; unless otherwise specified) Characteristic Symbol Test Condition Min Typ Max Unit REFERENCE SECTION Reference Output oltage T j = 5, I O = ma.90 5.00 5.0 Line Regulation o cc 5 0 m Load Regulation o ma Io 0mA 5 m Output Short Circuit Current Isc T A = 5-5 -0 ma OSCILLATOR SECTION Normal Frequency F OSC T j = 5 7 5 57 khz oltage Stability Sv cc 5 0. % Amplitude osc.6 p-p ERROR AMPLIFIER SECTION Input B Current I IB -0. - μa Feedback Input oltage FB o=.5..50.5 Open Loop oltage Gain A OL o 65 90 db Power Supplier Rejection Ratio PSRR EA cc 5 60 70 db Output Sink Current I SI FB =.7, o -. 7 ma Output source Current I SO =., o=5-0.5 -.0 ma Output oltage High OH FB =.7, R L =5kΩ to GND 5 6 Output oltage Low OL FB =.7, R L =5kΩ to RGR 0.. CURRENT SENSE SECTION Input oltage Gain Av (Note & ).5.5 / Maximum Input Signal MAX o=5 (Note ) 0.9. Power Supply Rejection Ratio PSRR SC cc 5 70 db Input Bias Current I IB - -0 μa OUTPUT SECTION Output oltage Low Output oltage High OL OH I sink = 0mA I source = 0mA 0. 0..5 I sink = 0mA I source = 0mA.5..0 Rise Time T r T j = 5, C L =nf 5 50 ns Fail Time T t T j = 5, C L =nf 5 50 ns UNDEROLTAGE LOCKOUT SECTION Start Threshold Minimum Operating oltage (After Turn-on) PWM SECTION Maximum Duty Cycle Dmax TOTAL STANDBY CURRENT Start-up Current I CC A/A A/5A A/A A/5A A/A A/5A Operating Supply Current pin=pin=0 Zener oltage iz Ii = 5mA 0 th CC(MIN) I st cc= for A/A cc=6.5 for A/5A.5 6 7.5 7.. 9.5 0.5 7.0 7.6. 9 96 00 % 7 50 % 0.7 0. ma 0.7 0. ma 7 ma
CURRENT MODE PWM CONTROLLER LMA/A/A/5A Note:. Adjust cc above the start threshould before setting at 5.. Parameter measured at trip point of latch with FB - 0.. Comparator Gain defined as: Δ Output Compensation(pin FB) A = Δ Current Sanseinput(pin CS) ; Fig. Open Loop Test Circuit R T.7K N A E/A ADJUST K.7K ADJUST 5K 00K FB C OUTPUT 6 GND 5 0. 7 LMA 0. K/W OUTPUT C T High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5KΩ potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin. Fig. Under oltage Lockout 7 ON/OFF COMMAND TO REST OF IC I CC LMA LM/5A ON 6. < 5mA OFF 0 7.6 < ma OFF ON CC During Under-oltage Lock-Out, the output driver is biased to a high impedance state. Pin 6 should be shunted to ground with a bleeder resistor to prevent activating the power switch with output leakage current. 5
CURRENT MODE PWM CONTROLLER LMA/A/A/5A Fig. Error Amp Configuration.5 0.5mA + FB Zi - Zf Error amp can source or sink up to 0.5mA Fig. Current Sense Circuit ERROR AMP R I S R C CURRENT SENSE R CURRENT SENSE ARATOR R S 5 GND Peak current (I S ) is determined by the formula: I S(MAX) ~.0 R S A small RC filter may be required to suppress switch transients. Fig.5 Oscillator Waveforms and Maximum Duty Cycle LARGE R T SMALL C T R T INTERNAL CLOCK C T LARGE R T SMALL C T GND 5 INTERNAL CLOCK 6
CURRENT MODE PWM CONTROLLER LMA/A/A/5A duty cycle. Charge and discharge times are determined by the formulas: tc ~ 0.55 RT CT 0.006 R td RT CT n( T -.7 ~ 0.006 R ) T - Frequency, then, is: f = (tc + td) - For RT>5KΩ, f. ~ RT C T Fig.6 Shutdown Techniques K 0Ω 500Ω SHUTDOWN SHUTDOWN TO CURRENT SENSE-RESISTOR Shutdown of the LMA can be accomplished by two methods; either raise pin above or pull pin below a voltage two diode drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shoutdown condition at pins and/or is removed. In one example, an externally latched shutdown may be accomplished by adding an SCR which will be reset by cycling CC below the lower ULO threshold. At this point the reference turns off, allowing the SCR to reset. Fig.7 Slope Compensation 0.μF R T LMA C T R R C R SENCE 7
SAT, Output Saturation oltage () A OL, Open-Loop oltage Gain (db) Φ, Excess Phase Degrees R T, Timing Resister (kω) R T (kω) CURRENT MODE PWM CONTROLLER LMA/A/A/5A A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for converters requiring duty cycles over 50%. Note that capacitor, C, forms a filter with R to suppress the leading edge switch spikes. Fig. Output Dead Time Fig. Timing Resistor vs Frequency 00 0 50 0.0 5.0.0 C T =0nF C T =5.0nF CT =.0nF C T =00pF C T =.0nF C T =00pF C T =500pF 0. 0k 0k 50k 00k 00k 500k.0M 0 0 C T =00nF C T =7nF C T =nf C T =0nF C T =.7nF C T =.nf C T =0nF fosc, Frequency (khz) 00 k 0k 00k M fosc, Frequency(Hz) Fig. Output Saturation Characteristics Fig. Error Amplifier Open Loop Gain and Phase Frequency CC =5 T A =5 0 60 Gain 0-5 0 Phase -90 SOURCE ( CC - OH ) SINK ( OL ) 0-5 0 0-6 0-6 0-0 Io, Output Load Current (A) 0 00 K 0K 00K M 0M Fosc, Frequency (Hz) PIN FUNCTION DESCRIPTION Pin No. Function Description Compensation This pin is the Error Amplifier output and is made available for loop compensation. oltage This is the inverting input of the Error Amplitier. It is normally connected Feedback to the switching power supply output through a resister divider. Current Sense A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. The Oscillator frequency and maximum Output duty cycle are programmed by connecting resistor R T to R EF and capacitor C T to ground. Operation to 500kHz is possible. 5 GND This pin is the combined control circuitry and power ground. 6 Output This output directly drives the gate of a power MOSFET. Peak currents up to.0a are sourced and sunk by this pin. 7 cc This pin is the positive supply of the control IC. This is the reference output. It provides charging current for capacitor C T through resistor R T.