PD-94246D IRHG567 RADIATION HARDENED POWER MOSFET THRU-HOLE (MO-36AB) V, Combination 2N-2P CHANNEL R TECHNOLOGY 5 Product Summary Part Number Radiation Level RDS(on) I D IRHG567 krads(si).29.6a IRHG563 3 krads(si).29.6a IRHG567 krads(si).96 -.96A IRHG563 3 krads(si).96 -.96A Channel N N P P MO-36AB Description IR HiRel R5 technology provides high performance power MOSFETs for space applications. This technology has over a decade of proven performance and reliability in satellite applications. These devices have been characterized for Single Event Effects (SEE). The combination of low R DS(on) and low gate charge reduces the power losses in switching applications such as DC to DC converters and motor control. These devices retain all of the well established advantages of MOSFETs such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters. Features Single Event Effect (SEE) Hardened Low RDS(on) Low Total Gate Charge Simple Drive Requirements Ease of Paralleling Hermetically Sealed Ceramic Package Light Weight ESD Rating: Class A per MIL-STD-75, Method 2 Absolute Maximum Ratings (Per Die) Parameter N-Channel P-Channel Units I D @ V GS = ±2V, T C = 25 C Continuous Drain Current.6 -.96 I D @ V GS = ±2V, T C = C Continuous Drain Current. -.6 I DM Pulsed Drain Current 6.4-3.84 P D @T C = 25 C Maximum Power Dissipation.4.4 W Linear Derating Factor.. W/ C V GS Gate-to-Source Voltage ± 2 ± 2 V E AS Single Pulse Avalanche Energy 3 2 mj I AR Avalanche Current.6 -.96 A E AR Repetitive Avalanche Energy.4.4 mj dv/dt Peak Diode Recovery dv/dt 6.5 7. V/ns T J T STG Operating Junction and Storage Temperature Range -55 to +5 Lead Temperature 3 (.63in/.6mm from case for s) Weight.3 (Typical) A C g For Footnotes, refer to the page 2 for N Channel and page 3 for P Channel 27-7-5
IRHG567 Electrical Characteristics for Each N-Channel Device @ Tj = 25 C (Unless Otherwise Specified) Parameter Min. Typ. Max. Units Test Conditions BV DSS Drain-to-Source Breakdown Voltage V V GS = V, I D =.ma BV DSS / T J Breakdown Voltage Temp. Coefficient.4 V/ C Reference to 25 C, I D =.ma R DS(on) Static Drain-to-Source On-State Resistance.29 V GS = 2V, I D =.A V GS(th) Gate Threshold Voltage 2. 4. V V DS = V GS, I D =.ma Gfs Forward Transconductance. S V DS = 5V, I D =.A I DSS V DS = 8V, V GS = V Zero Gate Voltage Drain Current µa 25 V DS = 8V,V GS = V,T J =25 C I GSS Gate-to-Source Leakage Forward V GS = 2V na Gate-to-Source Leakage Reverse - V GS = -2V Q G Total Gate Charge 7 I D =.6A Q GS Gate-to-Source Charge 4.4 nc V DS = 5V Q GD Gate-to-Drain ( Miller ) Charge 3.9 V GS = 2V t d(on) Turn-On Delay Time 2 V DD = 5V tr Rise Time 6 I D =.6A ns t d(off) Turn-Off Delay Time 5 R G = 7.5 t f Fall Time 5 V GS = 2V Ls +L D Total Inductance nh C iss Input Capacitance 37 V GS = V C oss Output Capacitance pf V DS = 25V C rss Reverse Transfer Capacitance 3.4 ƒ =.MHz Measured from Drain lead (6mm /.25 in from package) to Source lead (6mm/.25 in from package) with Source wire internally bonded from Source pin to Drain pad Source-Drain Diode Ratings and Characteristics for Each N-Channel Device Parameter Min. Typ. Max. Units Test Conditions I S Continuous Source Current (Body Diode).6 I SM Pulsed Source Current (Body Diode) 6.4 A V SD Diode Forward Voltage.2 V T J = 25 C,I S =.6A, V GS = V t rr Reverse Recovery Time ns T J =25 C, I F =.6A, V DD 25V Q rr Reverse Recovery Charge 38 nc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Thermal Resistance for Each N-Channel Device Parameter Min. Typ. Max. Units R JA Junction-to-Ambient (Typical socket mount) 9 C/W R JC Junction-to-Case * 7.5 C/W R J-LEAD Junction-to-Lead (Measured at shoulder of the Lead) * 29 C/W R J-LID Junction-to-Lid * 7 C/W * Values established by Thermal Modeling Footnotes: Repetitive Rating; Pulse width limited by maximum junction temperature. V DD = 25V, starting T J = 25 C, L =mh, Peak I L =.6A, V GS = 2V I SD.6A, di/dt 34A/µs, V DD V, T J 5 C Pulse width 3 µs; Duty Cycle 2% Total Dose Irradiation with V GS Bias. 2 volt V GS applied and V DS = during irradiation per MIL-STD-75, Method 9, condition A. Total Dose Irradiation with V DS Bias. 8volt V DS applied and V GS = during irradiation per MlL-STD-75, Method 9, condition A. 2 27-7-5
IRHG567 Electrical Characteristics for Each P-Channel Device @ Tj = 25 C (Unless Otherwise Specified) Parameter Min. Typ. Max. Units Test Conditions BV DSS Drain-to-Source Breakdown Voltage - V V GS = V, I D = -.ma BV DSS / T J Breakdown Voltage Temp. Coefficient -.4 V/ C Reference to 25 C, I D = -.ma R DS(on) Static Drain-to-Source On-State Resistance.96 V GS = -2V, I D = -.6A V GS(th) Gate Threshold Voltage -2. -4. V V DS = V GS, I D = -.ma Gfs Forward Transconductance. S V DS = -5V, I D = -.6A I DSS - V DS = -8V, V GS = V Zero Gate Voltage Drain Current µa -25 V DS = -8V,V GS = V,T J =25 C I GSS Gate-to-Source Leakage Forward - V GS = -2V na Gate-to-Source Leakage Reverse V GS = 2V Q G Total Gate Charge 3.4 I D = -.96A Q GS Gate-to-Source Charge 3.7 nc V DS = -5V Q GD Gate-to-Drain ( Miller ) Charge 3. V GS = -2V t d(on) Turn-On Delay Time 2 V DD = -5V tr Rise Time 7 I D = -.96A ns t d(off) Turn-Off Delay Time 5 R G = 7.5 t f Fall Time 9 V GS = -2V Ls +L D Total Inductance nh C iss Input Capacitance 39 V GS = V C oss Output Capacitance pf V DS = -25V C rss Reverse Transfer Capacitance 7. ƒ =.MHz Measured from Drain lead (6mm /.25 in from package) to Source lead (6mm/.25 in from package) with Source wire internally bonded from Source pin to Drain pad Source-Drain Diode Ratings and Characteristics for Each P-Channel Device Parameter Min. Typ. Max. Units Test Conditions I S Continuous Source Current (Body Diode) -.96 I SM Pulsed Source Current (Body Diode) -3.84 A V SD Diode Forward Voltage -3.5 V T J =25 C,I S = -.96A, V GS =V t rr Reverse Recovery Time 86 ns T J =25 C, I F =.96A, V DD -25V Q rr Reverse Recovery Charge 24 nc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Thermal Resistance for Each P-Channel Device Parameter Min. Typ. Max. Units R JA Junction-to-Ambient (Typical socket mount) 9 C/W R JC Junction-to-Case * 7.5 C/W R J-LEAD Junction-to-Lead (Measured at shoulder of the Lead) * 29 C/W R J-LID Junction-to-Lid * 7 C/W * Values established by Thermal Modeling Footnotes: Repetitive Rating; Pulse width limited by maximum junction temperature. V DD = -25V, starting T J = 25 C, L = 43mH, Peak I L = -.96A, V GS = -2V I SD -.96A, di/dt -29A/µs, V DD -V, T J 5 C Pulse width 3 µs; Duty Cycle 2% Total Dose Irradiation with V GS Bias. -2 volt V GS applied and V DS = during irradiation per MIL-STD-75, Method 9, condition A. Total Dose Irradiation with V DS Bias. -8volt V DS applied and V GS = during irradiation per MlL-STD-75, Method 9, condition A. 3 27-7-5
Radiation Characteristics IRHG567 IR HiRel Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at IR Hirel is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table. Electrical Characteristics for Each N-Ch. Dev.@ Tj = 25 C, Post Total Dose Irradiation Parameter krads (Si) 3 krads (Si) 2 Units Test Conditions Min. Max. Min. Max. BV DSS Drain-to-Source Breakdown Voltage V V GS = V, I D =.ma V GS(th) Gate Threshold Voltage 2. 4. 2. 4. V V DS = V GS, I D =.ma I GSS Gate-to-Source Leakage Forward na V GS = 2V I GSS Gate-to-Source Leakage Reverse - - na V GS = -2V I DSS Zero Gate Voltage Drain Current µa V DS = 8V, V GS = V R DS(on) R DS(on) Static Drain-to-Source On-State Resistance (TO-3) Static Drain-to-Source On-State Resistance (MO-36AB).226.246 V GS = 2V, I D =.A.29.3 V GS = 2V, I D =.A V SD Diode Forward Voltage.2.2 V V GS = V, I D =.6A. Part number IRHG567 2. Part number IRHG563 IR HiRel radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area for Each N-Channel Device LET (MeV/(mg/cm 2 )) Energy (MeV) Range (µm) V DS (V) @V GS =V @V GS =-5V @V GS =-V @V GS =-5V @V GS =-2V 38 ± 5% 3 ± 7.5% 38 ± 7.5% 6 ± 5% 33 ± 7.5% 3 ± % 35 25 84 ± 5% 35 ± % 28 ± 7.5% 8 25 Bias VDS (V) 2 8 6 4 2-5 - -5-2 LET=38 ± 5% LET=6 ± 5% LET=84 ± 5% Bias VGS (V) For Footnotes, refer to the page 2. Fig a. Typical Single Event Effect, Safe Operating Area 4 27-7-5
Radiation Characteristics IRHG567 IR HiRel Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at IR Hirel is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. Table. Electrical Characteristics for Each P-Ch. Dev. @ Tj = 25 C, Post Total Dose Irradiation Parameter krads (Si) 3 krads (Si) 2 Units Test Conditions Min. Max. Min. Max. BV DSS Drain-to-Source Breakdown Voltage - - V V GS = V, I D = -.ma V GS(th) Gate Threshold Voltage 2. 4. 2. 4. V V DS = V GS, I D = -.ma I GSS Gate-to-Source Leakage Forward - - na V GS = -2V I GSS Gate-to-Source Leakage Reverse na V GS = 2V I DSS Zero Gate Voltage Drain Current - - µa V DS = -8V, V GS = V R DS(on) R DS(on) Static Drain-to-Source On-State Resistance (TO-3) Static Drain-to-Source On-State Resistance (MO-36AB).96.936 V GS = -2V, I D = -.6A.96.98 V GS = -2V, I D = -.6A V SD Diode Forward Voltage -3.5-3.5 V V GS = V, I D = -.96A. Part number IRHG567 2. Part number IRHG563 IR HiRel radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2. Table 2. Typical Single Event Effect Safe Operating Area for Each P-Channel Device LET (MeV/(mg/cm 2 )) Energy (MeV) Range (µm) V DS (V) @V GS =V @V GS =5V @V GS =V @V GS =5V @V GS =2V 38 ± 5% 27 ± 7.5% 35 ± 7.5% - - - - - 6 ± 5% 33 ± 7.5% 3 ± 7.5% - - - - -25 84 ± 5% 35 ± 7.5% 28 ± 7.5% - - - -3 Bias VDS (V) -2 - -8-6 -4-2 5 5 2 Bias VGS (V) LET=38 ± 5% LET=6 ± 5% LET=84 ± 5% For Footnotes, refer to the page 3. Fig a. Typical Single Event Effect, Safe Operating Area 5 27-7-5
IRHG567 I D, Drain-to-Source Current (A) TOP BOTTOM VGS 5V 2V V 9.V 8.V 7.V 6.V 5.V 5.V N-Channel Q, Q3 I D, Drain-to-Source Current (A) TOP BOTTOM VGS 5V 2V V 9.V 8.V 7.V 6.V 5.V 5.V 2µs PULSE WIDTH. T J = 25 C. V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics 2µs PULSE WIDTH. T J = 5 C. V DS, Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics I D, Drain-to-Source Current (A) T J = 5 C T J = 25 C V DS = 5V 2µs PULSE WIDTH. 5. 5.5 6. 6.5 V GS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics R DS(on), Drain-to-Source On Resistance (Normalized) 2.5 I D =.6A 2..5..5 V GS = 2V. -6-4 -2 2 4 6 8 2 4 6 T J, Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature C, Capacitance (pf) 8 6 4 2 VGS = V, f = MHz Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd C iss C oss C rss V DS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage V GS, Gate-to-Source Voltage (V) 2 6 2 8 4 I = D.6A V DS = 8V V DS = 5V V DS = 2V FOR TEST CIRCUIT SEE FIGURE 3 4 8 2 6 Q G, Total Gate Charge (nc) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 6 27-7-5
I D, Drain-to-Source Current (A) IRHG567 I SD, Reverse Drain Current (A) T J = 5 C T J = 25 C V GS = V..4.6.8..2.4 V SD,Source-to-Drain Voltage (V) N-Channel Q, Q3. Tc = 25 C Tj = 5 C Single Pulse OPERATION IN THIS AREA LIMITED BY R DS (on) ms ms V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area I D, Drain Current (A).6.3..6.3. 25 5 75 25 5 T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature E AS, Single Pulse Avalanche Energy (mj) 3 25 2 5 5 TOP BOTTOM I D.7A.A.6A 25 5 75 25 5 Starting T, Junction Temperature ( J C) Fig. Maximum Avalanche Energy Vs. Drain Current D =.5 Thermal Response(Z thja ).2..5.2. SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t2 2. Peak T J= P DMx Z thja + TA..... t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case 7 27-7-5
N-Channel Q, Q3 IRHG567 V (BR)DSS tp I AS Fig 2a. Unclamped Inductive Test Circuit Fig 2b. Unclamped Inductive Waveforms Fig 3a. Gate Charge Waveform Fig 3b. Gate Charge Test Circuit Fig 4a. Switching Time Test Circuit Fig 4b. Switching Time Waveforms 8 27-7-5
-I D, Drain-to-Source Current (A) TOP BOTTOM VGS -5V -2V -V -9.V -8.V -7.V -6.V -5.V -5.V 2µs PULSE WIDTH. T J = 25 C. -V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics P-Channel Q2, Q4 -I D, Drain-to-Source Current (A) TOP BOTTOM VGS -5V -2V -V -9.V -8.V -7.V -6.V -5.V IRHG567-5.V 2µs PULSE WIDTH. T J = 5 C. -V DS, Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics 2.5 I D = -.96A -I D, Drain-to-Source Current (A) T J = 25 C T J = 5 C V DS = -5V 2µs PULSE WIDTH 5. 5.2 5.4 5.6 5.8 -V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2..5..5 V GS = -2V. -6-4 -2 2 4 6 8 2 4 6 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature C, Capacitance (pf) 6 5 4 3 2 VGS = V, f = MHz Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd C iss C oss C rss -V DS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage -V GS, Gate-to-Source Voltage (V) 2 6 2 8 4 I = D -.96A V DS =-8V V DS =-5V V DS =-2V FOR TEST CIRCUIT SEE FIGURE 3 2 4 6 8 2 Q G, Total Gate Charge (nc) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 9 27-7-5
-I D, Drain-to-Source Current (A) IRHG567 P-Channel Q2, Q4 OPERATION IN THIS AREA LIMITED BY R DS (on) -I SD, Reverse Drain Current (A) T J = 5 C T J = 25 C V GS = V.. 2. 3. 4. 5. -V SD,Source-to-Drain Voltage (V). Tc = 25 C Tj = 5 C Single Pulse ms ms -V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area -I D, Drain Current (A)..8.6.4.2. 25 5 75 25 5 T C, Case Temperature ( C) E AS, Single Pulse Avalanche Energy (mj) 5 4 3 2 I D TOP -.4A -.6A BOTTOM -.96A 25 5 75 25 5 Starting T, Junction Temperature ( J C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig. Maximum Avalanche Energy Vs. Drain Current D =.5 Thermal Response(Z thja ).2..5.2. SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t2 2. Peak T J= P DMx Z thja + TA..... t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case 27-7-5
P-Channel Q2, Q4 IRHG567 Fig 2a. Unclamped Inductive Test Circuit Fig 2b. Unclamped Inductive Waveforms -2V Fig 3a. Basic Gate Charge Waveform Fig 3b. Gate Charge Test Circuit Fig 4a. Switching Time Test Circuit Fig 4b. Switching Time Waveforms 27-7-5
IRHG567 Case Outline and Dimensions MO-36AB IR HiRel Headquarters: N. Sepulveda Blvd., El Segundo, California 9245, USA Tel: (3) 252-75 IR HiRel Leominster: 25 Crawford St., Leominster, Massachusetts 453, USA Tel: (978) 534-5776 IR HiRel San Jose: 252 Junction Avenue, San Jose, California 9534, USA Tel: (48) 434-5 Data and specifications subject to change without notice. 2 27-7-5
IRHG567 IMPORTANT NOTICE The information given in this document shall be in no event regarded as guarantee of conditions or characteristic. The data contained herein is a characterization of the component based on internal standards and is intended to demonstrate and provide guidance for typical part performance. It will require further evaluation, qualification and analysis to determine suitability in the application environment to confirm compliance to your system requirements. With respect to any example hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind including without limitation warranties on non- infringement of intellectual property rights and any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s product and any use of the product of Infineon Technologies in customer s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of any customer s technical departments to evaluate the suitability of the product for the intended applications and the completeness of the product information given in this document with respect to applications. For further information on the product, technology, delivery terms and conditions and prices, please contact your local sales representative or go to (www.infineon.com/hirel). WARNING Due to technical requirements products may contain dangerous substances. For information on the types in question, please contact your nearest Infineon Technologies office. 3 27-7-5