The power factor is a numerical parameter used to

Transcription

1 Advanced Switches Boost PFC Efficiency While improved MOSFET technology can reduce switching losses in CCM PFC stages, even greater reductions in MOSFET switching losses are achieved using SiC technology for the boost diode. By Wonsuk Choi and Sungmo Young, Application Engineers, Fairchild Semiconductor, Bucheon, Korea The power factor is a numerical parameter used to measure the quality of input power supplied to ac-dc converters. Recently, power factor correction (PFC) requirements, such as regulation IEC , have been strongly imposed on many systems, reflecting a growing trend in the ac-dc power-supply market. To meet these demands, designers can use passive and active PFC design techniques that comply with line harmonics standards for power-supply systems. One approach is to use passive PFC as a low-cost solution, but this requires a heavy and bulky LC filter. Active PFC is widely used to reduce the size and weight of the system s filter inductor. Therefore, increasing efficiency and power density are key design factors affecting this approach. Continuous conduction mode (CCM) boost PFC is the preferred active topology for high-power ac-dc converters. Unlike discontinuous conduction mode (DCM) or critical conduction mode (CRM), CCM PFC results in low ripple current, simplifies EMI-filter design and maintains stability at light loads. As a result, CCM PFC is commonly used not only in server/telecom power supplies, but also in power supplies for flat-panel displays. According to the trend in power-converter PFC designs of greatly improving power densities, designers must reduce system losses and decrease overall system size and weight, either by increasing switching frequency or integrating active components. A new MOSFET/diode combination can achieve higher efficiency and reduced switching loss in CCM PFC controller designs accomplished through low R DS(ON) and fast-switching in the MOSFET. These improvements are combined with a SiC Schottky diode having a low reverse-recovery charge (Q RR ). The resulting improved performance in a 400-W CCM PFC application, compared with the performance of a typical Si-diode/Planar-MOSFET approach, indicates the merit of using the combined device. Device Requirements for CCM PFC PFC in CCM has many advantages compared to DCM owing to continuous current on the boost inductor. This advantage is more obvious in high-power designs, because current filtered by the EMI filter is much lower than in DCM or CRM modes. In typical applications, the power losses are usually determined by the switching losses in the MOSFET, which are actually caused by the reverse-recovery characteristics of the discrete boost diode. This large source of switching loss depends on operating current and diode temperature. These factors lead to increased power dissipa- 42 Fig. 1. In the basic PFC circuit operated in CCM, the reverse-recovery current of the boost diode significantly contributes to the switching losses of the MOSFET.

2 tion in the diode and MOSFET, which can significantly affect the converter s performance. Fig. 1 and Fig. 2 show the operating modes of CCM PFC, including current and voltage waveforms, to illustrate the low Q RR requirement for a PFC diode. Initially, the diode D1 conducts the input current with some amount of stored minority charge present in the diode. During the turn-on switching transition, the MOSFET M1 turns on while the diode D1 turns off. A large inrush current flows through the MOSFET, including D1 s reverse-recovery and discharge current, in addition to the rectified input current. The rate of change of the current is typically limited by M1 s package inductance and other stray inductances present in the external circuit. The area within the negative portion of the diode-current waveforms is the reverse-recovery charge Q RR, while the interval length (t 0 to t 2 ) is the reverse-recovery time t RR. During the interval defined by t 0 < t < t 1, the diode remains forward-biased, so the MOSFET voltage is V OUT + V. F Fig. 2. The waveforms of a CCM PFC stage reveal how switching losses occur in pulses when non-zero voltages and currents, including reverserecovery currents from the boost diode, overlap. At time t 1, the stored charge in the vicinity of the p-n junction is depleted. Some negative diode current continues to flow, removing any remaining stored minority charge, while depositing charge to reform the depletion layer. At time t 2, this current is essentially zero, and the diode operates in steady state under reverse-biased condition. [1] These power losses, caused by the Si diode reverse-recovery behavior, limit the efficiency and switching frequency of a CCM PFC. The main concern in CCM PFC is reducing conduction and switching losses of the MOSFET and the boost diode. To design a high-performance CCM PFC with smaller size and higher operating frequency, the MOSFET requirements are as follows: low R DS(ON) to reduce conduction loss; low C GD to reduce switching loss; low Q G to reduce gate-drive power; and low thermal resistance. The requirements for the boost diode in the same CCM PFC are as follows: low t RR to reduce MOSFET turn-on loss, and low QRR to reduce R diode switching loss; low V F to reduce conduction loss; soft reverse-recovery characteristics to reduce EMI; and low thermal resistance. MOSFET Comparisons Fig. 3 shows the cross-section of Fairchild Semiconductor s SuperFET 600-V MOSFET, which uses charge-balanced technology (right), together with a conventional planar MOSFET (left). One immediately noticeable difference is the deep p-type pillar in the body of the SuperFET device. The major contribution (>90%) of the low R DS(ON) provided by the SuperFET comes from the n-drift layer. The effect of the deep p-type pillars is to confine the electric field in the lightly doped epitaxial region of the MOSFET. The resistivity of the n-epi layer is then dramatically reduced compared to that of conventional planar MOSFET, while maintaining the same breakdown voltage. Lowering R DS(ON) of the highvoltage MOSFET allows the device to achieve a die shrink about 35% compared with a conventional planar MOSFET rated for the same drain current. A MOSFET s switching characteristics are a function of its parasitic capacitances. For example, the small active area of the high-voltage SuperFET leads directly to a small input capacitance, and therefore to a low gate charge. This results in a very short turn-on delay time and a low drive power requirement. When comparing the capacitances of a SuperFET to those of a planar MOSFET, the value of C GD decreases rapidly as V DS approaches 10 V (in the case of the SuperFET), while smaller output capacitance decreases discharge losses at the turn-on switching transient. Because this technology is designed to withstand both high-speed voltage (dv/dt) and current (di/dt) switching transients, these devices operate reliably at higher frequencies, having a figure of merit (FOM) that is one-third that of a similarly rated planar device due to the reduced resistance. An advantage of using a SuperFET is that its low on-resistance diminishes power losses. This allows designers to eliminate the need for expensive cooling systems and to reduce the size of heatsinks. Its low gate charge also makes it easier 44

3 Fig. 3. The cross-section of Fairchild Semiconductor s SuperFET 600-V MOSFET, which uses charge-balanced technology (right), together with a conventional planar MOSFET (left). and more efficient to drive at high frequency. These characteristics reduce the overall power losses in the system. Diode Comparisons Si Schottky diodes are typically used for low- or middlevoltage applications of less than 300 V, because they exhibit very low switching losses and a positive temperature coefficient, while maintaining leakage current and forward-voltage drop within acceptable levels. However, this type of diode is not ideal for high-voltage applications, where the leakage current and the forward-voltage drop can be much higher. By comparison, SiC Schottky diodes are more attractive for high-voltage designs. This is because the electric field of silicon carbide at breakdown is 10 times higher than that of silicon. Furthermore, the wide bandgap of SiC allows higher operating temperatures [2]. Additionally, a SiC Schottky diode has no reverse-recovery current during switching transition because it has no excessive minority carriers. Although it does have displacement current from parasitic junction capacitances, this is negligible. Therefore, SiC Schottky diodes offer greater efficiency than Si diodes in CCM PFC application due to these superior reverse-recovery characteristics, which are independent of temperature and forward conduction characteristics of the device [3-7]. Fig. 4 shows the reverse recovery of a SiC Schottky diode compared with Si diodes. In this example, fast-recovery Si diodes from Fairchild are classified into three types according to t RR and V, with the Stealth diode having the fastest R F reverse-recovery characteristics and the ultrafast device having the lowest V F value. By performing reverse-recovery tests at 25 C, Si diodes exhibit a large amount of reverse-recovery current while a SiC Schottky diode only has displacement current through the capacitor formed by the reverse-biased Fig. 4. The reverse-recovery time of a SiC diode is virtually nonexistent compared to that of Si diodes, as revealed in this test where the forwardbiased current is 6 A, and the reverse voltage is 400 V. p-n junction. The V-I characteristics for both SiC Schottky and Si diodes are a function of temperature. At low forward currents, V F decreases as temperature increases. In this region, the exponential behavior of the current flowing across the Schottky barrier can be observed. As the forward current increases, the diode s bulk resistance dominates the forwardbiased behavior, and V F of the Schottky diode increases as the temperature increases. The larger bandgap of SiC Schottky diode results in higher intrinsic carrier concentration and higher operating junction temperatures. In principle, SiC Schottky diodes have the potential to operate to 600 C, as compared to the 150 C maximum junction temperature of 45

4 PFC EFFICIENCY Fig. 5. The normalized switching losses of the SuperFET/SiC Schottky diode combination and the planar-mosfet/si diode combination reveal the substantial gains in efficiency provided by the former configuration. Fig. 6. The efficiency of the SuperFET/SiC Schottky diode combination vs. the planar MOSFET/Si diode combination in a 400-W CCM PFC design directly translates into lower temperatures, higher power densities and reduced heatsink requirements. Si diodes [8]. The increased operating temperature enables reductions in the weight, volume, cost and complexity of thermal management systems. Additionally, SiC Schottky diodes are suitable for parallel operation at higher voltages than Si diodes owing to their positive temperature coefficients. A SiC Schottky diode s low QRR reduces not only the switching loss of the diode, but also the turn-on losses of the MOSFET, resulting in high-efficiency CCM PFC. This remains true even when the forward current is higher in the SiC diode than it is in the Si diode. This superior temperature characteristic of a SiC Schottky diode makes it possible to reduce the peak drain current during the MOSFET turn-on transient. It also allows designers to use of smaller MOSFETs to reduce costs. SuperFET was greatly reduced. A turn-off loss of 159 µj was measured for the planar MOSFET, and 125 µj was measured for the SuperFET (a reduction of 34 µj, or 21%). The MOSFET waveforms were also measured at turn-on transition under full load while the input was 110 Vac. There was a reverse-recovery current of 5.3 A through the Si diode and the MOSFET (apart from the inductor current), which was caused by the of Si boost diode. However, there was only a 1.2-A current caused by the negligible displacement current of the SiC Schottky diode. Therefore, MOSFET turn-on losses of 73.8 µj were measured for the Si diode, and 28.9 µj were measured for the SiC Schottky diode (a reduction of 44.9 µj, or 61%). In the test, the diode waveforms were at diode turn-off transition under full load and an input voltage of 110 Vac. There was a large peak reverse-recovery current of 5.3 A, and a peak reverse-recovery voltage of 500 V for the Si diode. There was a negligible reverse-recovery current, and a reverse-recovery voltage of 450 V for the SiC Schottky diode under same conditions. The differences in transient behavior between the two MOSFET types results in different MOSFET turn-on losses. The turn-off loss of the SiC Schottky diode is also reduced about 78% compared to that of the Si diode due to zero recovery time for the SiC diode. As indicated in the switching-loss summary shown in Fig. 5, a SuperFET and SiC Schottky diode combination can lead to a considerable switching-loss reduction. Compared to the planar MOSFET, the SuperFET can reduce the turnoff loss by 21%. Compared to the Si fast-recovery diode, the SiC diode can reduce the turn-on loss by 61%. Also, using a SiC Schottky diode with a conventional MOSFET instead of Combined MOSFET/SiC Diode Module A 400-W CCM PFC test circuit was designed using a high-voltage SuperFET and a SiC Schottky diode. Specifically, this demonstration compared the switching losses and efficiency of Fairchild s 600-V n-channel SuperFET MOSFET (FCA20N60) and 6-A SiC Schottky diode with a planar MOSFET (FQA24N50) and Ultrafast Si diode (RURP860). The test circuit operated at 100 khz and output voltage and current was set to 400 V and 1 A, respectively. The gate resistance of the SuperFET was 12 Ω when switching on, and 9.1 Ω when switching off. Voltage and current were measured on both the MOSFET and the diode to estimate the power losses in these components. Also, the input and output power was measured to calculate the efficiency of the system. When MOSFET waveforms at turn-off transition were under full load while the input was 110 Vac, the switching losses were measured by the crossover area of VDS and ID. The switching time of the 46

5 a fast-recovery Si diode can reduce the MOSFET s turn-off loss by 78% and its turn-on loss by 23%. Efficiency measurement results of different combinations of these devices are shown in Fig. 6. Based on this figure, it is clear that the MOSFET/SiC Schottky diode combination achieves significant improvements in efficiency over the entire operational range. The improvement was even greater at high-current conditions (low input under full load) where an improvement in efficiency of more than 4% was achieved, compared to a test circuit using conventional devices under the same conditions. As demonstrated in this switching-loss analysis, the major reason for higher efficiency is the reduced turn-on loss in the MOSFET because of minimized reverse-recovery charge of the SiC Schottky diode. The end result is increased power density for the CCM PFC stage. PETech References 1. Erickson, Robert W. and Maksimovic, Dragan, Fundamentals of Power Electronics, Kluwer Academic Publishers, Massachusetts 2001, 2 nd edition. 2. Friedrichs, P.; Mitlehner, H.; Schorner, R.; Dohnke, K.O.; Elpelt, R. and Stephani, D., Application Oriented Unipolar Switching SiC Devices, Materials Science Forum, pp , Vol (2002). 3. Bruckmann, M.; Baudelot, E.; Weis, B. and Mitichner, H., Switching Behavior of Diodes Based on new Semiconductor Materials and Silicon A Comparative Study, EPE 1997, 7 th European Conference on Power Electronics and Applications, Vol. 1, pp , Neudeck, P.G.; Larkin, D.J.; and Powell, J.A., Silicon Carbide High-Temperature Power Rectifiers Fabricated and Characterized, NASA Lewis Research Center (USA). 5. Liu, J.; Chen, W.; Zhang, J.; Xu, D. and Lee, F.C., Evaluation of Power Losses in Different CCM Mode Single-Phase Boost PFC Converters via a Simulation Tool, IAS 2001, pp , Vol Lu, B.; Dong, W.; Zhao, Q.; Lee, F.C.; Performance Evaluation of CoolMOSTM and SiC Diode for Single-Phase Power Factor Correction Applications, APEC 2003, pp , Vol Spiazzi, G.; Bum, S.; Citron, M.; Corradin, M. and Pierobon, R., Performance Evaluation of a Schottky Sic Power Diode in a Boost PFC Application, IEEE Transactions on Power Electronics, Vol. 18, No. 6, November Shenai, K.; Scott, R.S., and Baliga, B.J., Optimum Semiconductors for High-Power Electronics, IEEE Transactions on Electron Devices, Vol. 43, No. 9, pp , September e-front runners Micro DC-DC Converter with Integrated Inductor Buck Converter Circuit Type Number: FB6831J Vin=2.7V-5.5V, Vout min=0.8v, lout max=500ma Switching frequency=2.5mhz Principle of technology Integrated controller, FETs and inductor IC chip on inductor structure Inductor with terminal pins Advantages Reduced size/weight 2.95mm x 2.4mm x 1mm/30mg High efficiency 90% (Vin=3.6V, Vout=1.8V, lout=200ma) High reliability Potential application Cellular phone, Digital video camera, Digital still camera, Portable instruments, etc. Packages SON (10pin) VIN 2.7V to 5.5V 1 PGND Step Forward, Raise Value Fuji Electric Device Technology America, Inc. CIN 4.7uF 2 GND 3 COP 4 CRES 5 IN Piscataway, NJ 08854, U.S.A. Phone: Fax: For more Info. Visit RFB1 100k RFB0 150k M PVDD CE VDD VOUT VOUT 1.5V / 500mA COUT 4.7uF 47