Study on Fabrication and Fast Switching of High Voltage SiC JFET

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1 Advanced Materials Research Online: ISSN: , Vol. 827, pp doi: / Trans Tech Publications, Switzerland Study on Fabrication and Fast Switching of High Voltage SiC JFET Gang Chen 1,2,a, Song Bai 1,2, Runhua Huang 2, Yonghong Tao 2, Ao Liu 2 1 Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing, China 2 Nanjing Electronic Devices Institute, Nanjing, China a steelchg@163.com Keywords: SiC, JFET, Ohmic, Trench. Abstract. SiC devices have excellent properties such as ultra low loss, high withstand voltage, large capacity, high frequency, and high temperature operation compared with Si devices. The SiC JFET is expected to be appropriate for the power device because a JFET has no oxide-semiconductor interface in the channel region and does not use the low mobility SiC MOSFET inversion layer as a channel. Forward I-V up to 4A for SiC VJFET, Gate voltage from 2V to 3.5V by step 0.5V. Reverse I-V characteristics up to 4500V (VG=-8V) for SiC VJFET, Gate voltage from -4V to -8V by step -2V. Turn-off characteristics are studied and fast turn-off time of 136ns at room temperature under DC voltage of 600V is successfully demonstrated. Introduction The state-of-the-art SiC JFETs are characterized. Three-phase full-bridge inverter power loss models based on experimental data are established and used to estimate inverter efficiency. The impact of load power, temperature, and switching frequency on inverter efficiency is analyzed and demonstrated. The efficiency of the SiC JFET inverters based on present device quality is above 98% with full load current, and more efficient than most conventional Si inverters, especially at high temperature and high frequency. It follows that number of elements connected in parallel and series can be decreased. It is also expected that the size of passive components can be reduced due to high frequency operation and high temperature operation of the devices. On the other hand, operation of SiC devices at high speed switching could arise problems of EMC (electro magnetic compatibility) and EMI (electromagnetic interference). [1] A major point of discussion in the SiC community is whether a SiC MOSFET or JFET is the adequate solution for the first commercialization of a SiC power switch. The decision between the two device concepts has to be backed up by careful judgment of both ruggedness considerations and application demands. Comparing the static and switching performance as well as the processing costs of a MOSFET and JFET leads to a tie. What is definitely a big plus for the MOSFET is the normally-off behavior. There have been attempts to realize normally off VJFETs, however, severe challenges concerning technological process windows (channel doping / thickness) have to be taken into account. [2] SiC controllable switching devices are available as engineering samples such as JFETs from SiCED, MOSFETs from Cree, and BJTs from TranSiC. These manufacturers will make these devices commercially available soon, and SiC JFETs are likely the first. To make good use of these devices and substitute for present Si systems properly, it is necessary to learn the impact of power, frequency, and temperature on a SiC-based power converter system. Experimental The SiC JFET is expected to be appropriate for the power device because a JFET has no oxide-semiconductor interface in the channel region and does not use the low mobility SiC MOSFET inversion layer as a channel. SiC MOSFET s dominate applications below 4 kv for their attractive conduction performance and advantages such as ease of use. Above 3 kv, SiC MOSFET s are not as attractive as SiC bipolar devices because of their high on-state voltages. In this paper, Multiple in-house SiC epi-layers have been grown on highly doped N + 4H-SiC substrates to achieve the All rights reserved. No part of contents of this paper may be reproduced or transmitted in any form or by any means without the written permission of Trans Tech Publications, (ID: , Pennsylvania State University, University Park, USA-10/05/16,04:36:28)

2 Advanced Materials Research Vol structure shown in 0. [3] It is essential that the 50um drift layer be lightly doped and uniform to achieve high blocking voltage. The wafer is 4 off-axis Si-face 3-inch 4H-SiC substrate with epitaxially grown n + buffer, n drift, n channel, and n + source layers. The factors which are responsible for controlling of breakdown voltage are, channel width (W), temperature (T), drift layer doping concentration and thickness. These four factors are critical in order to control the breakdown voltage. A suitable value of channel width is critically important for high breakdown voltage and keeping the leakage current low because too small channel width decreases the forward current density and too large channel width increases the leakage current. [4] The source layer is heavily doped to n + > cm 3 for Ni/SiC source ohmic contact formation. The n - channel layer is 1.6µm thick and doped to cm -3. The drift layer is 50 µm thick and doped to cm -3. The n+ buffer layer is 1µm thick and doped to cm -3. Edge termination is provided by a self-aligned floating guard-ring structure, which is p+ implanted simultaneously with the gates. A completely vertical channel junction field effect transistor (VJFET) with the trenched gate structure was fabricated. The vertical channel type is the best structure for the JFET, because the cell size can be reduced to obtain the low on state voltage. It is difficult to obtain the narrow channel width and to etch the narrow mesa due to restriction of alignment between the source and the gate. It is a key technology to fabricate a lateral diffusion by 15degree tilt angle ion implantation. Ion implanted VJFETs were fabricated using the structure shown in 0. Gates and sources were defined by etching source pillars and then using the same mask to implant self-aligned. For reliable operation at the extreme condition, it was very important to form the stable metal/sic contacts. A 10 mm 2 4H-SiC VJFET was packaged and measured at room temperature. Fig.1 Multiple in-house SiC epi-layers structure of SiC VJFET Results and Analysis Tektronix 370 is used to measure the IV characteristics of the SiC JFET devices. To turn on the normally-off VJFET, a positive voltage must be applied to the gate. The maximum gate voltage is limited by the build-in voltage of the junction between the gate p + region and the drift layer N -. Previously, we have demonstrated 5 A, 1300 V 4H-SiC VJFETs with a vertical-channel structure fabricated in-house [5]. From 0, we can know that the SiC VJFET device yielded a drain current 4A at a drain voltage of 5V. The threshold voltage of V gd = +2 V. As illustrated in 0, high blocking voltage of 4500 V in the case of vertical channel type silicon carbide (SiC) VJFETs were realized at gate bias V G = -8 V. The BV gain is 2200 V with V g from -4 V to -6 V. The result shows that a reasonable process window can be found to achieve a pinch-off voltage above -8 V. This is an important result since most of the gate drive controllers are capable of driving up to 8 V the sign reversal can be done with minor modifications. [6] The JFET has its big benefits in the field of long term stability (e.g. threshold voltage) and ruggedness due to the absence of a gate oxide (that is very sensitive to

3 284 Solar Energy Materials and Energy Engineering environmental influences e.g. humidity).the main functional part of the device is located in the SiC material and not at an interface. In addition, the pinch-off voltage of a JFET is long time stable even at elevated operation temperatures. [7] Fig.2 Forward I-V up to 4A for SiC VJFET, Gate voltage from 2V to 3.5V by step 0.5V Fig.3 Reverse I-V characteristics up to 4500V (VG=-8V) for SiC VJFET, Gate voltage from -4V to -8V by step -2V It is well known that driving a power JFET is not as convenient as driving a power MOSFET because of its gate-to-source junction that can be forward-biased with a positive voltage. For 4H-SiC JFET, this gate-to-source p-n junction will be turned on at around 2.7 V and a significant amount of current will be taken from the gate driver. A gate resistance is required in series with the gate driver to limit the gate current. The slow turn-on speed is a result of the limited positive gate driver output voltage (+3 V) that does not provide sufficient overdrive during the turn-on transient. [8] Turn-off characteristics are studied and fast turn-off time of 136ns at room temperature under DC voltage of 600V is successfully demonstrated. A switching waveform for this device was recorded in 0. At both V DS(on) and V GS ~ 3 V, the drain current settled to 2 A. The V DS was 3 V until the V GS increased from -6 V to +3 V. 136 ns fall time and turn- off delay time was achieved, that corresponds to a maximum switching frequency of 7.35 MHz. However, compared to MOSFET s, IGBT s and BJT s, whose switching performance is not particularly sensitive to temperature, the switching times and switching losses of JFETs increase rapidly with increased temperature.

4 Advanced Materials Research Vol Summary Fig.4 Fall time and turn-off delay time In summary, we have fabricated high performance SiC VJFET on n + type conductivity 4H-SiC substrates. By employing a channel recess technique, excellent characteristics were obtained. When V G is -8 V, the SiC VJFETs breakdown voltage is 4500 V. And the forward drain current of the SiC VJFET device is in excess of 4 A at gate bias V G = 3.5 V and drain bias V D = 5 V. A switching waveform for this SiC VJFET device was recorded. Fast turn-off time of 136ns at room temperature under DC voltage of 600V is successfully demonstrated. A switching waveform for this device was recorded in 0. At both V DS(on) and V GS ~ 3 V, the drain current settled to 2 A. The V DS was 3 V until the V GS increased from -6 V to +3 V. 136 ns fall time and turn- off delay time was achieved, that corresponds to a maximum switching frequency of 7.35 MHz. Acknowledgment The work was supported by the National 863 Program (Grant No. 2011AA050401) from the Chinese Ministry of Science and Technology. We would like to thank all the members of wide band gap semiconductor and National Key Laboratory of Monolithic Integrated Circuits and Modules. Helps received from the monolithic design department and silicon power devices department are also acknowledged. Corresponding Author Name:Gang Chen @163.com Mobile phone:

5 286 Solar Energy Materials and Energy Engineering References [1] Katsuhiko Harada, Kentaro Maki, Sompathana Pounyakhet, Jyunitiro Tokiyoshi, Masahiro Kozako, Shinya Ohtsuka, and Masayuki Hikita, Switching Characteristics of SiC-VJFET and Manufacture of Inverter, "The 2010 International Power Electronics Conference", pp. 176, [2] J.H. Zhao,P. Alexandrov, Y. Li, L. Li, K. ShengR. Lebron-Vellila, Design, Fabrication and Application of 4H-SiC Trenched-and-Implanted Vertical JFETs, Materials Science Forums Vols (2006), pp [3] E J. Stewart, M.J. McCoy, T.R. McNutt, H.C. Heame, A.P. Walker, S.D. Van Campen, G.M. Bates, S.Lesliel, G.C. DeSalvo, and R.C. Clarke, "8 kv Normally-off All-SiC Cascade Power Switch Using VJFETs ", Proceedings of the 19th International Symposium on Power Semiconductor Devices & ICs May 27-30, 2007 Jeju, Korea. [4] Zhao, J.H., Fursin, L., Alaxandrov, P., Li, X and Weiner, M., Mater. Sci. Forum,(2004); :1161. [5] Gang Chen, Xiaofeng Song, Song Bai, Li Li, Yun Li, Zheng Chen, Wen Wang. 5A 1300V Trenched and Implanted 4H-SiC vertical JFET. Applied Mechanics and Materials Vols (2012) pp [6] S. Round, M. Heldwein, J. Kolar, I. Hodsajer, P. Friedrichs, A SiC JFET driver for 5 kw, 150 khz three-pahse PWM converter, IEEE Record of Ind. Appl. Conf. 2005, p. 410 (2005). [7] M. Treu, R. Rupp and P. Blaschitz "Strategic considerations for unipolarsic switch options: JFET vs. MOSFET", Proc.Industry Applications Conf., pp [8] Kuang Sheng, Senior Member, IEEE, Yongxi Zhang, "High-Frequency Switching of SiC High-Voltage LJFET", IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 24, NO. 1, JANUARY 2009, pp

6 Solar Energy Materials and Energy Engineering / Study on Fabrication and Fast Switching of High Voltage SiC JFET /

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