A dual inverter for an open end winding induction motor drive without an isolation transformer
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1 A dual inverter for an open end winding induction motor drive without an isolation transformer Shajjad Chowdhury*, Patrick Wheeler, Chris Gerada, Saul Lopez Arevalo The University of Nottingham PEMC Group Nottingham, UK, China Abstract This paper examines the use of a dual bridge inverter topology for an induction machine drive application. The paper considers the possibility of using a dual bridge inverter with one bridge floating to generate multilevel output voltage waveforms. The charging and discharging of the floating capacitor will be controlled using redundant switching states. The use of this topology can improve system efficiency and converter volume. The paper includes analysis and modulation of the converter topology as well as simulation and practical results showing the converter operation. Keywords Space vector; Open End Winding Induction Machine (OEWIM; Dual inverte; Floating Bridge (FB; Main Bridge (MB I. INTRODUCTION This paper describes a novel power converter topology for a three-phase motor with open ended windings. This machine topology is considered as it has some advantages in motor drive applications where redundancy and fault tolerance are advantageous [-]. The use of a dual inverter bridge allows the converter to emulate the waveforms seen in a three level NPC converter [4-6] whilst eliminating the need for capacitor balancing techniques. The advantages of dual bridge inverter with respect to single ended inverters include: Improved availability because fault tolerance can be introduced. Reduced voltage blocking requirements for some of the power semiconductors Inverters can share switching events leading to lower individual device commutation frequencies. Reduced switching losses for a given output waveform quality Dual inverter topologies have been considered in numerous papers for different applications. Traditional dual inverter topologies (using two isolated dc sources are analyzed in [4- ]. In these papers, different space vector modulation schemes have been used to generate multilevel output voltage waveforms. A block diagram of a traditional Open End Winding Induction Motor (OEWIM drive is presented in Fig.. It is possible to use of a single supply for dual inverters with a common mode elimination technique [7,, and 4]. These topologies use specific switching combinations that produce equal common mode voltages which cancel at load terminals. Reduction in voltage levels and lower dc bus utilizations are the main disadvantages of this type of topology. A modulation technique to balance power between the two inverters in a dual inverter system has also been proposed [5-0]. This topology still uses an isolation transformer, the size of this transformer can be reduced at the expense of reduced modulation index. The floating capacitor bridge topology is presented in [] along with a control scheme to allow supply of reactive power. Other authors [, ] have presented a method to compensate for supply voltage droop in order to keep the drive operational during constant power mode. This topology also uses a floating capacitor bridge to offset the voltage droop in high speed machines. To remove the isolation transformer and achieve multilevel output voltage waveforms, a dual inverter with a floating capacitor bridge is considered. This paper also presents a modulation scheme which only utilizes switching state redundancies to charge and discharge the floating bridge capacitor. The proposed modulation technique does not require demand reference voltage generation to charge the floating capacitor, thus eliminating the risk of creating unwanted harmonics in the output voltage waveforms. Fig.. Conventional open end winding IM drive topology II. PROPOSED SYSTEM A. Floating capacitor bridge inverter The floating bridge capacitor dual inverter based topology has previously been analyzed for different applications [-4]. The circuit can be used to supply reactive power to a machine and to compensate for any supply voltage droop. In both cases the possibility of multilevel output voltage waveforms were not /5/$ IEEE 8
2 considered. In this paper the capacitors in the floating inverter bridge is charged using redundant switching combinations to remove the isolation transformer and to achieve multilevel output voltages. Fig. shows the block diagram of the dual inverter with a floating bridge capacitor. Sources used here are based on a ratio of :. The use of this particular ratio permits dual two level inverters to produce up-to a four level output pole voltage waveform [0, 5]. red triangle as shown in Fig. 4. The other half of the triangle is a mirrored image and this is then repeated around the state diagram. Fig.. Block diagram of proposed floating bridge topology B. Principles of operation In order to show how the capacitor can be charged and discharged the switching combinations can be analyzed. The dual inverter topology, shown in Fig., is considered assuming that each inverter is fed from isolated sources. The space vector diagram for the converter modulations is shown in Fig. 4. Capacitor bank S S S Ia S6 S5 S4 S' S' S' S6 S5 S4 Ib Ic Open phase load A B C A B C Fig.. Circuit diagram of proposed floating bridge topology (Capacitor bank is charged to half of the main DC link voltage In Fig.4, the red numbered switching combinations discharges the floating bridge capacitor, while the green numbered switching combinations charge the capacitor and the yellow numbered switching combinations hold the last state of capacitor. To assess how these combinations will charge or discharge the floating capacitor, the current flow for different switching combinations are examined. To make the analysis brief only one half of the sector is taken into consideration, the Fig. 4. Space vector of dual two level inverter (source ratio : The current flow diagrams of different switching combinations are shown in Fig. 5. In the figure solid line represents the current flowing paths and the dotted lines specify open circuit. In the state diagram (+ - -, (+ + -, (- + -, 4(- + +, 5(- - +, 6(+ - +, 7(+ + + and 8(- - - are the switching combinations for upper switches (S, S and S of the two level inverter legs, where `+` refers to the on state and `-` refers to the off state of power semiconductor switching devices. Numbers with a superscript (' denotes the switching state combination for second, lower voltage, inverter. It can be seen from the Fig. 5 that combinations (' and (6' will result in a current through the capacitor form the positive to the negative terminal, thus charging the capacitor. Combinations (4', (5' and (74' will result in a current in the other direction and will therefore act to discharge the capacitor. Combinations ending with 7 ( or 8 (000 will hold the capacitor's charge at its previous state. It is evident from the state diagram that if the reference voltage resides in outer hexagon then there are only two switching combinations in each sector to charge the floating capacitor. This is insufficient to maintain the charge under all operating conditions; therefore a restriction has to be imposed. As a result the achievable voltage level is reduced (voltage levels being equal to three level NPC converters along with lower than ideal DC bus utilization. The capacitor can charge to half of the main DC link only if the modulation index (m is limited as shown in equation. 0 < m 0.6 ( Violation of the imposed restriction will cause the capacitor voltage to collapse. 84
3 β k k k Fig. 7. Sub sector identification α θ k b a = k = = b = msin( sin( π / θ ( π k = mcos( θ msin( θ cos sin( θ k = m cos( θ ( m = V V dc ref (4 TABLE I. SUBSECTOR IDENTIFICATION Fig. 5. The current flow for different switching state combinations C. Modulation strategy A decoupled space vector modulation strategy can be adopted for this dual inverter floating bridge capacitor topology. Switching combinations are selected in such a way that generated voltages for each of the converters that are 80 degree phase shifted from the other, as shown in Fig. 6. The voltages will add at the load terminal to match the overall reference. The combined reference voltage will be located in sector (subsector 7, which is shown in Fig. 7. V ref Subsector Identification criteria if (( k, k < &( k + k if (( k, k < & ( k + k > if ( k < & k < & ( k + k < if ( k < & k < & ( k + k > if ( k > if ( k < & k > & ( k + k < if ( k < & k < & ( k + k > if ( k < & k < & ( k + k > if ( k > V ref Fig. 6. Space vector diagram of individual inverters The switching sectors for the dual inverter are identified using angle of the reference voltage. Each sector is 60 degree apart from the adjacent one. First the angle of the reference voltage is identified and then using a simple else if statement is used to identify the sectors. The process of identifying reference voltage subsector location is shown in 85
4 equations to 4 and ble I. The equations are derived using Fig. 7.The switching time is calculated using the volt second balancing principle. An example of how to calculate the timings when reference voltage resides on sector (subsector is presented in equations 5 and 6. V ref Ts (cos( θ isin( θ = VT + VT + Where, j0 V = Vdce 9 j60 V = Vdce 9 V = V e j0 dc V T Equations are then manipulated to find T, T & T Finally, a seven segment switching sequence is used to modulate the reference voltage as shown in Fig. 8. In Fig. 8 a superscript refers to the floating inverter legs. Switching combinations are selected in such a way that when floating capacitor voltage is lower than demand reference voltage the charging combinations will be selected and it will choose all the discharging combinations when capacitor voltage is higher than the reference voltage. ble II presents the charging and discharging switching combinations when reference voltage resides in sector of the vector diagram. As the outer hexagon is not used switching sequences for outer hexagon are not presented in this paper. (5 (6 Sub Sector TABLE II. Charging Tb Tc SWITCHING COMBINATIONS Discharging Tb Tc III. RESULTS A. Simulation results The proposed modulation scheme has been simulated using MATLAB and PLECS. Fig. 9 shows the charging and discharging of floating capacitor voltage. To obtain a multilevel inverter topology main bridge inverter is supplied with 60 and then the floating capacitor is charged to 0 V. The system is connected to an open phase R-L load. Parameters of the load and induction machine are presented in ble III. Fig. 9. Charging and discharging of capacitor T a 4 T b T c T a T c T b T a 4 Fig. 0. Phase voltage (Phase A - measured across AA Fig. T s T s T s Fig. 8. Seven segment switching sequence (sector, subsector Fig.. Phase current (Phase A A voltage of 0 Hz and 5 V is demanded from the dual inverter at a modulation index of 0.6. The output voltage and currents are shown in Fig 0 and Fig. It can be seen from 86
5 the simulation results that the floating bridge capacitor is charged to the required value and the dual inverter system can achieve a multilevel output voltage waveform. B. Experimental results To validate simulation results an experimental rig has been built as shown in Fig.. The system has been tested with static R-L load and as an open loop v/f controlled induction machine drive. shows the experimental result of charging and discharging of floating capacitor voltage which suggests that capacitor voltage follows the demand reference. The capacitor is then charged to 0 V and a 0 Hz 5 V reference signal is demanded for the load voltage. The output voltage and current waveform for one phase is shown in Fig. 4 and Fig. 5. Fig.. Charging and discharging of capacitor Fig. 4. Phase voltage across R-L load (measured across AA Fig. Fig. 5. Phase current (R-L load, phase A Fig.. Experimental setup To achieve both experimental results the main inverter is supplied by a power supply unit to maintain a constant 60 V dc link voltage. The aim of the floating capacitor voltage control is to charge the floating bridge capacitor to half of the main DC link voltage. To confirm the charging and discharging control of the capacitor a slow step up and step down ramp signal is applied to the capacitor voltage reference. To demonstrate the control over capacitor voltage, first the capacitor is charged and discharged to an arbitrary value. Fig. To demonstrate operation as a motor drive the dual inverter topology is connected to an open end winding induction motor with open loop v/f control. To charge the capacitor initially a small voltage reference is send to DSP interface which initialize the switching sequences and is able to charge the capacitor to the required voltage. After charging the capacitor to half of the main DC link voltage, a 4 Hz and 0 Hz reference is demanded to operate the system in two level and three level mode. Phase voltages and currents across the machine winding (phase A is measured across point AA shown in Fig. are presented in Fig. 6 and Fig. 7. Fig. 6 and 7 suggest that floating capacitor has been charged using switching state redundancies and that the control is able to maintain the capacitor voltage at half of the DC link voltage as long as the system is operating at a modulation index of less than 0.6. Fig. 7 also shows that the system can achieve multilevel output voltage waveforms when operating as a motor drive. 87
6 IV. CONCLUSIONS A motor drive using an open ended winding machine and a dual bridge inverter topology with a floating capacitor bridge has been analyzed and demonstrated. The proposed system charges the floating bridge capacitor to a ratio of : with respect to main bridge DC link voltage amplitude. This particular DC link voltage ratio allows the converter to achieve multi-level output voltage waveform. The floating DC link voltage is kept at a constant voltage by the means of charging and discharging the floating bridge capacitor. This is achieved by deploying a slow controller to switch between charging and discharging redundant states of the converter. The proposed system has been simulated and an experimental setup has been used to validate the results. It has been shown that the proposed system can charge the capacitor to the required voltage and can achieve a multilevel output voltage waveform. REFERENCES Fig. 6. No load steady state phase voltage (top and current (bottom of induction machine (measured across AA as shown in Fig., f = 4 Hz, m = 0.8, Fig. 7. No load steady state phase voltage (top and current (bottom of induction machine (measured across AA as shown in Fig., f = 0 Hz, m = 0.6 TABLE III. LOAD PARAMETERS R-L Load Resistance R 0 Ohm Inductance L.75e- H Induction motor Stator resistance Rs.4 Ohm Rotor resistance Rr. Ohm Stator leakage inductance Lls 0.05 H Rotor leakage inductane Llr H Magnetizing inductance Lm 0.58 H [] Ertugrul, N., et al. Fault tolerant motor drive system with redundancy for critical applications. in Power Electronics Specialists Conference, 00. pesc IEEE rd Annual. 00. [] Meinguet, F., et al. Fault-tolerant operation of an open-end winding fivephase PMSM drive with inverter faults. in Industrial Electronics Society, IECON 0-9th Annual Conference of the IEEE. 0. [] Welchko, B.A., et al., Fault tolerant three-phase AC motor drive topologies: a comparison of features, cost, and limitations. Power Electronics, IEEE Transactions on, (4: p [4] Ahmed, S.M.W., et al. Open ends induction motor operation based on a dual inverter. in Design and Test Workshop (IDT, 009 4th International [5] Ahmed, S.M.W., G.M.A. Sowilam, and A.b.S.M. Salim. Practical implementation of a dual inverter operates open ends induction motor. in Design and Test Workshop (IDT, 009 4th International [6] Sivakumar, K., et al. A three level voltage space vector generation for open end winding IM using single voltage source driven dual two-level inverter. in TENCON IEEE Region 0 Conference [7] Bodo, N., M. Jones, and E. Levi. PWM techniques for an open-end winding fivephase drive with a single DC source supply. in IECON 0-8th Annual Conference on IEEE Industrial Electronics Society. 0. [8] Levi, E., M. Jones, and W. Satiawan. A multiphase dual-inverter supplied drive structure for electric and hybrid electric vehicles. in Vehicle Power and Propulsion Conference (VPPC, 00 IEEE. 00. [9] Ramachandrasekhar, K., S. Mohan, and S. Srinivas. An improved PWM for a dual two-level inverter fed open-end winding induction motor drive. in Electrical Machines (ICEM, 00 XIX International Conference on. 00. [0] Shivakumar, E.G., et al. Space vector PWM control of dual inverter fed open-end winding induction motor drive. in Applied Power Electronics Conference and Exposition, 00. APEC 00. Sixteenth Annual IEEE. 00. [] Somasekhar, V.T., et al. A novel PWM inverter switching strategy for a dual two-level inverter fed open-end winding induction motor drive. in Power Electronics and Drive Systems, 00. Proceedings., 00 4th IEEE International Conference on. 00. [] Zhao, Y. and T.A. Lipo, Space vector PWM control of dual three-phase induction machine using vector space decomposition. Industry Applications, IEEE Transactions on, 995. (5: p [] Baiju, M.R., et al., A dual two-level inverter scheme with common mode voltage elimination for an induction motor drive. Power Electronics, IEEE Transactions on, (: p [4] Kalaiselvi, J., K.R.C. Sekhar, and S. Srinivas. Common mode voltage elimination PWMs for a dual two-level VSI with single inverter switching. in Industrial Electronics (ISIE, 0 IEEE International Symposium on
7 [5] Casadei, D., et al., Multilevel Operation and Input Power Balancing for a Dual Two-Level Inverter with Insulated DC Sources. Industry Applications, IEEE Transactions on, (6: p [6] Casadei, D., et al. Switching Technique for Dual-Two level Inverter Supplied by Two Separate Sources. in Applied Power Electronics Conference, APEC Twenty Second Annual IEEE [7] Grandi, G. and D. Ostojic. Dual inverter space vector modulation with power balancing capability. in EUROCON 009, EUROCON '09. IEEE [8] Grandi, G., et al. Power balancing of a multilevel converter with two insulated supplies for three-phase six-wire loads. in Power Electronics and Applications, 005 European Conference on [9] Grandi, G., et al. Multilevel Operation of a Dual Two-Level Inverter with Power Balancing Capability. in Industry Applications Conference, st IAS Annual Meeting. Conference Record of the 006 IEEE [0] Lega, A., Multilevel converters: Dual two-level inverter scheme, in department of electrical engineering. 007, University of Bologna: Bologna, Italy [] Junha, K., J. Jinhwan, and N. Kwanghee, Dual-inverter control strategy for high-speed operation of EV induction motors. Industrial Electronics, IEEE Transactions on, (: p. -0. [] Ewanchuk, J. and J. Salmon. A Square-wave Controller for a high speed induction motor drive using a three phase floating bridge inverter. in Energy Conversion Congress and Exposition (ECCE, 00 IEEE. 00. [] Haque, R.U., et al. PWM control of a dual inverter drive using an openended winding induction motor. in Applied Power Electronics Conference and Exposition (APEC, 0 Twenty-Eighth Annual IEEE. 0. [4] Ewanchuk, J., J. Salmon, and C. Chapelsky, A Method for Supply Voltage Boosting in an Open-Ended Induction Machine Using a Dual Inverter System With a Floating Capacitor Bridge. Power Electronics, IEEE Transactions on, 0. 8(: p [5] Reddy, B.V. and V.T. Somasekhar, A Dual Inverter Fed Four-Level Open-End Winding Induction Motor Drive With a Nested Rectifier- Inverter. Industrial Informatics, IEEE Transactions on, 0. 9(: p
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