FSA2257 Low R ON Low-Voltage Dual SPDT Bi-Directional Analog Switch

Transcription

1 F2257 Low R ON Low-Voltage Dual PDT Bi-Directional nalog witch Features Maximum 1.15Ω On Resistance (R ON ) for 4.5V upply 0.3Ω Maximum R ON Flatness for +5V upply pace-aving MicroPak Packaging Broad Operating Range: 1.65V to 5.5V Fast Turn-on / Turn-off Time Break-Before-Make Enable Circuitry Over-Voltage Tolerant TTL-Compatible Control Input pplications Cell Phone PD Mobile Devices Ordering Information Part Number Package Number Eco tatus Top Mark Description May 2009 The F2257 is a high-performance bi-directional dual ingle-pole/double-throw (PDT) analog switch. This switch can be configured as either a multiplexer or a demultiplexer by select pins. The device features ultra-low R ON of 1.3Ω maximum at 4.5V and operates over the wide range of 1.65V to 5.5V. The device is fabricated with submicron CMO technology to achieve fast switching speeds and is designed for break-before-make operation. The select input is TTL-level compatible. Package Description F2257L10X MC010 RoH EP 10-Lead MicroPak, 1.6 x 2.1mm F2257MTCX MTC14 RoH F2257 F2257MUX MU101 RoH F Lead Thin hrink mall Outline Package (TOP), JEDEC MO-153, 4.4mm Wide 10-Lead Molded mall Outline Package (MOP), JEDEC MO-187, 3.0mm Packing Method 5000 Units on Tape and Reel 2500 Units on Tape and Reel 4000 Units on Tape and Reel For Fairchild s definition of Eco tatus, please visit: Base Band Voice/Bell Ring 32Ω Earpiece Base Band Processors with Melody Ring Generation mp elect Pin 8Ω Loud peaker F2257 Figure 1. Block Diagram F2257 Rev

2 Connection Diagrams B B NC B 1 1B B B NC 2B B 1 Figure 2. Pin ssignments for TOP (Top View) Figure 3. Pad ssignments for MicroPak (Top View) 2B B B B 1 Figure 4. Pin ssignments for MOP (Top View) nalog ymbols Truth Table Control Input(s) Function LOW Logic Level B 0 Connected to 2B B 0 HIGH Logic Level B 1 Connected to Pin Descriptions Pin Names Function 2B B 1, B 0, B 1 Data Ports Control Input Figure 5. nalog ymbols (Top Through View) F2257 Rev

3 bsolute Maximum Ratings tresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. ymbol Parameter Min. Max. Unit upply Voltage V V W DC witch Voltage (2) V V IN DC Input Voltage (2) V I IK witch Current 200 m Input Diode Current 50 Peak witch Current (Pulsed at 1ms duration, <10% duty cycle) 400 T TG torage Temperature Range C T J Maximum Junction Temperature +150 C T L Lead Temperature (oldering, 10 seconds) +260 C ED Human Body Model, JED Charged Device Model, JED22-C Note: 2. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. ymbol Parameter Min. Max. Unit upply Voltage V V IN Control Input Voltage (3) 0 V V W witch Input Voltage 0 V T Operating Temperature C Note: 3. Unused control inputs must be held HIGH or LOW. They may not float. V F2257 Rev

4 DC Electrical Characteristics ll typical values are at 25 C unless otherwise specified. ymbol Parameter Conditions (V) V IH Input Voltage High T =+25 C T = 40 C to +85 C Min. Typ. Max. Min. Max. 1.8 to to to to V IL Input Voltage Low 2.7 to to to I IN Control Input Leakage V IN = 0V to 4.5 to I NO(OFF), I NC(OFF) I (ON) R ON ΔR ON R FLT(ON) I CC Off-Leakage Current of Port B 0 and B 1 On Leakage Current of Port = 1V, 4.5V, B 0 or B 1 = 1V, 4.5V = 1V, 4.5V, B 0 or B 1 = 1V, 4.5V or Floating Notes: 4. On resistance is determined by the voltage drop between and B pins at the indicated current through the switch. 5. ΔR ON = R ONmax R ONmin measured at identical, temperature, and voltage. 6. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions. Units V V μ n n witch ON Resistance I OUT = 100m, B 0 or B 1 = 1.5V MicroPak (4) I OUT = 100m, B 0 or B 1 = 3.5V witch On Resistance I OUT = 100m, B 0 or B 1 = 1.5V MOP / TOP (4) I OUT = 100m, B 0 or B 1 = 3.5V On Resistance Matching 5etween Channels (4) MicroPak On Resistance Matching Between Channels (5) MOP / TOP On Resistance Flatness (6) Quiescent upply Current I OUT = 100m, B 0 or B 1 = 3.5V I OUT = 100m, B 0 or B 1 = 3.5V I OUT = 100m, B 0 or B 1 = 0V, 0.75V, 1.5V I OUT = 100m, B 0 or B 1 = 0V, 1V, 2V V IN = 0V or, I OUT = 0V Ω Ω Ω μ F2257 Rev

5 C Electrical Characteristics ll typical values are at 25 C unless otherwise specified. ymbol Parameter Conditions (V) t ON t OFF t BBM Capacitance Turn-On Time Turn-Off Time Break-Before- Make Time B 0 or B 1 = 1.5V, B 0 or B 1 = 3.0V, B 0 or B 1 = 1.5V, B 0 or B 1 = 3.0V, B 0 or B 1 = 1.5V, B 0 or B 1 = 3.0V, Q Charge Injection C L = 1.0nF, V GEN = 0V, R GEN = 0Ω OIRR Off Isolation f = 1MHz, R L = Xtalk Crosstalk f = 1MHz, R L = BW 3db Bandwidth R L = THD Total Harmonic Distortion R L = 600Ω, V IN = 0.5V PP f = 20Hz to 20kHz ymbol Parameter Conditions (V) T =+25 C T = 40 C to +85 C Figure Number Min. Typ. Max. Min. Max. Units 1.8 to to to to to to to to to to to to to to to to to to T =+25 C T = 40 to +85 C Min. Typ. Max. Min. Max. ns Figure 6. ns Figure 6. ns Figure 7. pc Figure 9. db Figure 8. db Figure 8. MHz Figure 11. % Figure 12. Units Figure Number C IN Control Pin Input Capacitance f = 1MHz pf Figure 10. C OFF B Port Off Capacitance f = 1MHz pf Figure 10. C ON Port On Capacitance f = 1MHz pf Figure 10. F2257 Rev

6 C Loading and Waveforms V B B 0 or B 1 R L C L Includes Fixture and tray Capacitance V Bn B 0 Control Input B 1 C L 35pF C L Includes Fixture and tray Capacitance Control Input witch Output 3V 0V Figure 6. Turn-On / Turn-Off Timing R L C L 35pF Control Input Figure 7. Break-Before-Make Timing 0 50% t ON t R = t F = 2.5ns t OFF 0.9 x 0.9 x Logic Input Waveforms Inverted for witches that have the Opposite Logic ense 3V 0V 50% T D t R = t F = 2.5ns 0.9 x B O 0 or 10nF B1 ME Network nalyzer V IN 0dBm REF OFF-IOLTION = 20log ON-LO = 20log CROTLK = 20log V IN V IN V IN Figure 8. Off Isolation and Crosstalk F2257 Rev

7 C Loading and Waveforms (Continued) V GEN + R GEN B 0 or B 1 Figure 9. Charge Injection Figure 10. On / Off Capacitance Measurement etup ignal Generator 0dBm Δ Control Input Capacitance Meter f = 1MHz Logic Input 0V or C L 10nF B N 10nF B 0 or B 1 V+ IN IN OFF OFF ON ON Q = (Δ )(C L ) 0V or nalyzer OFF OFF Figure 11. Bandwidth 10nF ignal Generator V IN Logic Input 0V or V B CC N R L nalyzer Figure 12. Harmonic Distortion F2257 Rev

8 Physical Dimensions 2X PIN1 IDENT I LONGER THN OTHER LINE C (0.15) 0.10 C C (0.20) TOP VIEW IDE VIEW (0.81) (0.25) X B X C 0.55 MX 0.05 C X 0.10 C B 0.05 C (1.12) (0.11) (0.56) 0.50 (1.62) (0.35) 10 (0.25) 10X RECOMMENDED LND PTTERN NOTE:. PCKGE CONFORM TO JEDEC REGITRTION MO-255, VRITION UBD B. DIMENION RE IN MILLIMETER. C. DIMENION ND TOLERNCE PER ME Y14.5M, D. DRW ING FILENME: MKT-MC10rev4. BOTTOM VIEW Figure Lead MicroPak, 1.6 x 2.1mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild emiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. lways visit Fairchild emiconductor s online packaging area for the most recent package drawings: Note: click here for tape and reel specifcations, available at: F2257 Rev

9 Physical Dimensions (Continued) 0.43 TYP R0.09 min. CONFORM TO JEDEC REGITRTION MO-153, VRITION B, REF NOTE 6 B. DIMENION RE IN MILLIMETER C. DIMENION RE EXCLUIVE OF BURR, MOLD FLH, ND TIE BR EXTRUION D. DIMENIONING ND TOLERNCE PER NI Y14.5M, 1982 E. LNDPTTERN TNDRD: OP65P640X110-14M F. DRWING FILE NME: MTC14REV TOP & BOTTOM R0.09min 6.10 Figure Lead Thin hrink mall Outline Package (TOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild emiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. lways visit Fairchild emiconductor s online packaging area for the most recent package drawings: F2257 Rev

10 Physical Dimensions (Continued) Figure Lead Molded mall Outline Package (MOP), JEDEC MO-187, 3.0m Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild emiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. lways visit Fairchild emiconductor s online packaging area for the most recent package drawings: Note: click here for tape and reel specifcations, available at: F2257 Rev

11 F2257 Rev F2257 Low R ON Low-Voltage Dual PDT Bi-Directional nalog witch