N386X APPLICATION INFORMATION

Transcription

1 N386X APPLICATION INFORMATION Prepared by : Alex Leng The N386X is a low cost high integrated PWM primary switcher, it combines a current mode controller with a high voltage power MOSFET and integrates OVP, OLP functions in one chip. The N386A is individual. It is built-in a current sense resistor. All of the N386x series allow the design of a cost effective power supply with a very low number of external components. This document provides some of tips for design consideration. N3860 Block diagram PIN FUNCTIONS 1

2 1. Oscillator Frequency The N386x oscillation frequency is set by two elements which are Rext resistor and Cext capacitor. The resistor is connected between the Vcc pin and Rext pin, the capacitor is connected between the Rext pin and ground. The approximate frequency formula of N386X is shown as follows: 0.86 Oscillation Frequency = Re xt Cext 110 pf ( ) Hz A current set by Rext generates an oscillator ramp by charging an internal 47 pf capacitor and an external Cext capacitor. Once the oscillator ramp V Charge pump turn on reaches 2/3 Vcc, the internal charge pump Vcc circuit turns on to generate a duty pulse 2/3Vcc on the top of the oscillator ramp for the gate driving, as shown in Figure 1. The 1/2Vcc Charge/discharge by internal Cap and Cext period ends when the capacitors discharge until it drops below about 1/2 Vcc, a capacitor Cext parallel connects to Rext pin to slow down the discharge slop Period of oscillation Figure 1 oscillator waveform which avoids turning off the driving pulse at an earlier stage. If the power MOSFET has a large Ciss capacitor at the gate input, it will need more energy to charge or discharge the gate capacitor. We have increased the capacitor value to have more charge capability which can steady the frequency at full load operation. Below is a table for Cext at different Ciss of MOFET. A table of Cext capacitor for different MOSFET item Parts description specification nominal Ciss actual Ciss Cext 1 CEF02N6 650V/1.5A 250PF 248pf 47pf 2 2SK V/10A PF 1559pf 68pf 3 SPP7N80 800V/7A PF 2000pf 82pf 4 2SK V/10A 1700PF 2218pf 100pf 2

3 5 SPP11N60C3 650V/11A 1200PF 2410pf 100pf 6 SPP20N60S5 600V/20A 3000PF 5253pf 120pf 2. Start up Circuits When the power is sourcing from the main outlet on the bulk capacitor, the internal startup current is kept very low, below 15uA as the max. value. The current delivered by the startup resistor also charges the Vcc capacitor to raise the voltage. When the voltage on the Vcc capacitor reaches the turn-up threshold level (typically 17V), the N386X generates pulses to drive the transformer while the Vcc capacitor supplies the controller only. The auxiliary supply is supposed to take over before the Vcc collapses below Vcc (min). At this time, the UVLO sources an 80uA to charge the blank pin with a 100kΩ impedance that raises the Blank voltage. After a few switch cycles the FB voltage is built up to turn the OLP comparator on with a 4kohm resistor. This keeps low impedance on the Blank pin, preventing the Blank voltage reaching 1.85V to activate OLP shut down N386X. Please refer to the figure 2. 17V UVLO(10V) Auxiliary voltage DRV BLANK(0.6V) Blank voltage is clamped to 0.6V FB (0.6V) Figure 2. The waveforms during the start-up period 3

4 3 OLP Protection The N386X features an over load protection function via a FB pin, the typical threshold level is 0.65V. In Figure 3, a short circuit in output can force the output voltage to be lowered, preventing a bias current to supply the optocupler LED. This makes the FB voltage fall below the OLP threshold level of 0.65V which can turn the OLP transistor off while an internal constant current of 80uA starts to charge the external capacitor of BLANK pin(c4) with a 100kΩ input impedance. As soon as the voltage of BLANK capacitor reaches 1.85V, N386X immediately stops the driver output and pulls down the VCC by internal resistor of 820ohm until it is under 4V then restarts again.(hiccup operation) When the over load disappears, the N386X resumes its normal operation. During the startup phase, the peak current is pushed to the maximum until the output voltage reaches its target level and it takes a short time after a few switch cycles. Thus situations like the presence of a short circuit on output which will activate the OLP protection, the active time of the OLP protection can be slightly adjusted by the external capacitor of BLANK pin to avoid initial startup fault conditions. V-Output (Secondary side) VCC 4V VFB 0.65V OLP trigger GateDRV 1.85V BLINK Figure 3. The OLP waveforms at the short output conditions 4

5 4. Current Sense Resistor The N386x is the current mode controller. The current sense input internally is set at 0.65V and through the resistor networks to the CS pin. The MOSFET peak current can be calculated as below: 1.1 The maximum peak switch current is: Ipk = Rsense After the current sense resistor is changed to a new value, it should be checked in worst case conditions. The first is with low-line input voltage (90vac) and full output power. The second is at highest input voltage (high-line 264vac) and the full power output. Then measure the FB pin, it should higher then 0.9V. This is to ensure that it operates in a safe operating region without activating the OLP. 5 OVP Protection The N386X offers an over voltage protection function through the Vcc pin. The typical threshold level is 28V with 4kohm input impedance. Figure 4 depicts the internal implementation which is made with three 9.3V zener diodes connected in series. Figure 5 shows when an OVP condition has been detected, which means the voltage on the Vcc pin exceeds 28V, a current from Vcc through the three zener diode charges the capacitor of the Blank pin and raises the Blank voltage to 1.85V. When this happens, the OVP comparator output rises, the N386X enters the protection OVP PROTECTION OUT VCC PIN 9.3V 9.3V 9.3V BLANK PIN 100k 4k - V1 1.85V FB BLANK Capacitor 0 Figure 4. Schematic diagram of the OVP OVP phase and stops the oscillator and pulls down Vcc by an internal resistor of 820ohm until it is under 4V, then restarts again. 5

6 OVP trigger 28V VCC 4V DRV 1.85V BLANK Figure 5. The OVP waveforms at Vcc over voltage conditions 6. Reducing the voltage variation range on auxiliary winding A poor coupling between the primary and the secondary windings results in a large leakage inductance. This inductance generates a spike detected by the auxiliary diode which raises the auxiliary voltage. (See Figure 6).This effect can accidentally destroy the target auxiliary voltage in the transformer design. As the N386X Vcc. cannot exceed 28V, care must be taken at the transformer design to limit the voltage range while running in normal load. Unfortunately, in no load or burst model, the auxiliary level would collapse below 10V because the burst mode energy is very low. In low line, the continue mode generates a height spike raising the auxiliary voltage to activate the OVP. Leakage effect Vpeak=28.8V Auxiliary voltage=24.6 Figure 6. The leakage effect on the auxiliary side raises the auxiliary level (peak-rectified by diode) A good solution would be to reduce the leakage inductance in the transformer design. 6

7 One method to improve leakage inductance between the secondary winding and primary winding is to make a split primary Sandwich construction windings. Each winding should be stretched across the width of the bobbin window. Then put the auxiliary winding in the first layer. However a secondary winding consisting of only a few turns, can t have the same equivalent winding breadth as the primary, in order to maximize coupling to the primary; using multiple parallel strands of wire is an additional way of increasing the fill factor. Though this can reduce the leakage inductance, it is difficult to control the transformer quality in manufacture. Next is another solution like Figure 6 keeping the leakage inductance ineffective with an auxiliary winding, The solution splits the rectifying section into two blocks. A resister and a capacitor can integrate the leakage spike and the second diode is only here to avoid extending the startup time by charging two capacitors together. Another Vcc D2 10 D1 2uF 22uF 1 AUX 2 Figure 7. Two rectifying section can integrate the leakage inductance benefit from this solution is to shorten the start up time by reducing the second capacitor value. 7. Leading Edge Blanking on CS Pin In switching mode power supplies there can be a large current spike at the beginning of the current ramp due to the power supply gate to source capacitor, transformer R4 R2 R3 C3A1 D2 R1 C1 D T inter-winding capacitor and output rectifier recovery time. This may accidentally turn off the PWM driver output. A 200ns leading edge blanking time is included in the input of the CS pin to prevent a false Rext Cext U1 5 NC VCC 6 Rext GATE 7 FB CS 8 BLANK GND N3862P C RC filter R6 47ohm C3 100pf Q1 trigger by the current spike. For C5 high power applications this effect may worsen, a leading R7 edge blanking circuit may need to added in series with the CS Figure 8. a RC filter series with CS pin 7

8 pin input (as shown in Figure 8). It is recommend designing a RC filter for high power applications or reserving the locations of the RC filter for contingent use. In the N386A/1/2 series, the power MOSFET is inside in the IC, so there is no place to add a RC filter to extend the leading edge blanking time. But in low power applications the total pulse width of the turn-on current spike is less than 350ns. It is much smaller which means it can be easily overcome. We can slightly increase the period of the charge pump duty pulse by change the Cext capacitor value from 47p to 68p to avoid turning off the drive output at an earlier stage. 8. Typical Application Circuit L AC INPUT EMI FILTER BD1 - C1 R1 2M R3 C6 R2 D2 D1 T1 D4 C7 VO N C2 10U Rext (100K) R6 Cext 47P T R EX B F C V N K A B L C N G ND N R AI D O S U1 N3861P U2 R7 R10 C8 R8 C4 1000P C5 0.47U 4 R5 U3 R9 8