PWRLITE LD1010D High Performance N-Ch Vertical Power JFET Transistor with Schottky G D S
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1 PWRLITE LD11D High Performance N-Ch Vertical Power JFET Transistor with Schottky Features Trench Power JFET with low threshold voltage Vth. Device fully ON with Vgs =.7V Optimum for Low Side Buck Converters Optimized for Secondary Rectification in isolated DC-DC Low Rg and low Cds for high speed switching No Body Diode ; extremely low Cds Added Fast Recovery Schottky Diode in same package Applications DC-DC Converters Synchronous Rectifiers PC Motherboard Converters Step-down power supplies Brick Modules VRM Modules DPAK Pin Assignments G S D Description The Power JFET transistor from Lovoltech is a device that presents a Low Rdson allowing for improved efficiencies in DC- DC switching applications. The device is designed with a low threshold such that drivers can operate at 5V, which reduces the driver power dissipation and increases the overall efficiency. Lower threshold produces faster turn-on/turn-off, which minimizes the required dead time. The transistor No Body Diode provides a very low associated parasitic capacitance Cds. A Schottky Diode is added for applications where a freewheeling diode is required. Ringing is also reduced so that a lower voltage device may be a better solution. G D S N Channel Power JFET with PN Diode Preliminary Pin Definitions Pin Number Pin Name Pin Function Description Product Summary 1 Gate Gate. Transistor Gate V DS (V) Rdson (Ω) I D (A) Drain Drain. Transistor Drain 4V Source Source. Transistor Source Absolute Maximum Ratings Parameter Symbol Ratings Units Drain-Source Voltage V DS 4 V Gate-Source Voltage V GS -1 V Gate-Drain Voltage V GD -8 V Continuous Drain Current I D 5 A Pulsed Drain Current I D 1 A Junction Temperature T J -55 to 15 C C Storage Temperature T STG -65 to 15 C C Lead Soldering Temperature, 1 seconds T 3 C C Power Dissipation (Derated at 5 C) P D 8 W Thermal Resistance LD11D.Rev.91
2 Symbol Parameter DPAK Units Ratings RΘ JA Thermal Resistance Junction-to-Ambient 8 C/W RΘ JC Thermal Resistance Junction-to-Case 1.6 C/W Electrical Specifications The φ denotes a specification which apply over the full operating temperature range. Symbol Parameter Conditions Min. Typ. Max. Units Static BV DSX Breakdown Voltage I D =.5 ma φ 4 V Drain to Source V GS = -4 V BV GDO Breakdown Voltage Gate to Drain I G = -5µA φ -8 V Breakdown Voltage I G = -1 ma φ -1-1 V BV GSO R DS(ON ) Gate to Source Static Drain to Source 1 On Resistance (Current flows drain-to-source) See Fig. 1 I G = 4 ma, I D =1A I G = 1 ma, I D =1A I G = 5 ma, I D =1A V GS(TH) Gate Threshold Voltage V DS =.1 V, I D =5µA mv Dynamic Q G Total Gate Charge V Drive =5V, I D =1A,V DS =15V nc Q GD Gate to Drain Charge 1 nc Q GS Gate to Source Charge 1.5 nc Q SW Switching Charge 13.5 nc R G Gate Resistance 1 Ω T D(ON ) Turn-on Delay Time φ 5 T R Rise Time V DD =16V, I D =15A φ 1 T D(OFF) Turn-off Delay V Drive = 5 V Clamped Inductive Load T F Fall Time 1 C ISS Input Capacitance 3 C OSS Output Capacitance 9 C GS Gate-Source Capacitance V DS =1V, V GS = -5 V, 1MHz. 5 C GD Gate-Drain Capacitance 75 Drain-Source Capacitance 15 C DS PN Diode I R Reverse Leakage V R =V, Vgs = -4V.5.3 ma V F Forward Voltage I F = 1 A 7 mv V F Forward Voltage I F = 1 A 9 mv V F Forward Voltage I F = A 11 mv Qrr Reverse Recovery Charge I s = A di/dt = 1A/us, nc Notes: 1. Pulse width <= 5µs, duty cycle < = % ns mω mω pf
3 Typical Operating Characteristics RDS(ID=-1A) vs IG, at Room Temperature. Total Gate Charge curves RDS(Ohms) VGS(V) Capacitive Charges Region DC Charges Region QtotG(nC) Figure 1 R DSON vs Gate Current at I D 1A Figure Total Gate Charge 1.4E-3 BVgs plot: Id vs Vds for Vgs=-4V Capacitance vs VDS, VGS=-4V at Room Temp 1.E-3 35 Id(A) 1.E-3 8.E-4 6.E-4 4.E-4 C(pF) Ciss Coss Crss.E-4 5.E Vds(V) VDSV) Figure 3 Breakdown Voltage Vds vs Id Figure 4 Capacitance vs Drain Voltage Vds 1.E-1 9.E- 8.E- 7.E- 6.E- 5.E- 4.E- 3.E-.E- 1.E-.E+ IG vs VGS, Source and Drain Grounded. LD13SG6, at 5'C VGS(V) Figure 5 I G vs Gate Voltage V GS IG vs VGS, Drain Open Room Temp 5.E-4 3.E-4 1.E-4-1.E-4-3.E-4-5.E-4-7.E-4-9.E-4-1.1E-3-1.3E VGSV) Figure 6 Typical Gate Voltage Characteristic 3
4 Typical Operating Characteristics Normalized Rdson vs Temp at ID=-A 5. Normalized Rdson Temp(C) Id, Drain Current (A) Vds, Drain-to-Source Voltage (V) IG=1mA IG=5mA IG=1mA IG=mA IG=4mA IG=1mA Figure 7 R DSON Temperature Coefficient Figure 8 On-Region Characteristics ID(A) ID vs VDS, Schottky Diode of LD13SG6 at 5oRoom Temp VDS(V) Figure 9 Diode Voltage vs Current Id, Drain Current (A) Ig = 4mA 1 Single Pulse Tc = 5 C 1µs 1µs 1 1ms 1ms Rdson Limit DC Thermal Limit Package Limit Vds, Drain-to-Source Voltage (V) Figure 1 Safe Operating Area Total Pow er Dissipation (W) ZthJA = f(tp) (parameter D= tp/t) E+ D =.5. Ptot (W) Temperature (C) ZthJA (K/W).1 1.E-1.5. P(pk) tp T.1 Note: 1. Duty Factor D = tp/t Single Pulse. Peak Tj = P(pk)*Z thja + T A 1.E- 1.E-5 1.E-4 1.E-3 1.E- 1.E-1 1.E+ 1.E+1 tp (s) Figure 11 Total Power Dissipation Figure 1 Normalized Thermal Response 4
5 Ordering Information Product Number PN Marking Package LD11D LD11D TO5 (DPAK) Package and Marking Information DIMENSIONS mm. inch DIM. TYP. MIN. MAX. TYP. MIN. MAX. A A A B B C C D D E E e.8.9 G H L.8.31 L R..8 V 8 8 LD11D xx.xx.xx Life Support Policy LOVOLTECH s PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF LOVOLTECH, Inc. As used herein: 1. Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury of the user.. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition Advance Information In definition or in Design This datasheet contains the design specifications for product development. Specifications may change without notice. Preliminary Initial Production This datasheet contains preliminary data; additional and application data will be published at a later date. Lovoltech, Inc. reserves the right to make changes at any time without notice in order to improve design. No Identification Needed In Production This datasheet contains final specifications. Lovoltech reserves the right to make changes at any time without notice in order to improve the design. 5
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N-Channel Enhancement Mode Power MOSFET Description The PE3050K uses advanced trench technology and design to provide excellent R DS(ON) with low gate charge. It can be used in a wide variety of applications.
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