Free Programmable Signal Processing inside a High Performance Servo Amplifier

Transcription

1 1 Free Programmable Signal Processing inside a High Performance Servo Amplifier J. O. Krah S. Geiger G. Jaskowski Seidel Servo Drives / Kollmorgen Düsseldorf Abstract The availability of digital signal processing enables advantageous servo drive concepts and new problem solution features inside a high performance servo amplifier. The large computing capacity of the new reduced instruction set computer (RISC) based micro controlling unit (MCU) generation in conjunction with field programmable gate arrays (FPGA) and complex programmable logic devices (CPLD) technology allows to digitalise all control and regulating functions in modern drive units. These new digital servo amplifiers provide the same performance as very fast analogue units do. The current generation of digital servo amplifiers makes it possible to change and store parameters, to integrate basic PLC functions or a simple position control system and to interface to a field bus system. To solve a specific application it may be necessary to integrate special software into the drive. It doesn t make sense to design a universal drive with too many options, because the high signal processing performance would be slowed down by decision making software routines. The new servo amplifier concept that is presented here contains an easy programming servo signal processing language (SSPL), which is specially meant for use in servo amplifiers. It offers the user the possibility to change the signal flow structure of the drive. Because there is no on-line decision making, the set point signal processing can be done by the main microcontroller of the servo amplifier. A second DSP with the result of higher production cost is not necessary. Introduction Permanent magnet synchronous motors (PMSM) in combination with full digital Servo amplifiers are an attractive solution for servo drives in the kw-range. They have replaced the standard direct current (DC) motors in several development steps. All these steps have been driven by the digitalisation of the drive technology. The first step was to replace the mechanical commutator with a digital electrical equivalent. These drive series called brushless direct current (BLDC) or six step technology use hall sensors for the position feedback and use six transistors instead of four in the power stage to do pulse width modulation (PWM) and commutation. It needs up to three feedbacks, shown in figure 1: Halls for the commutation Brushless tachometer for the velocity control Encoder for the position control The control behaviour of the BLDC drives is very good. A bandwidth of more then 1 khz can be achieved easily with an analogue current controller. Only the switching frequency of the PWM and the electronic commutation are limiting constraints. The velocity control is mostly analogues. Digital switches depending on the hall signals do the rectification of the tachometer signal. A velocity loop bandwidth of 250 Hz is not a problem with this technology. Replacing the commutator with its brushes and its problem drove the development step from DC to BLDC drives.

2 2 Figure 1: Block diagram of a BLDC servomotor The next step was driven to eliminate the torque ripple generated by commutating the current from one phase to another. Instead of a trapezoidal backemf the motor uses a sinusoidal back-emf and a sinusoidal current commutation. This technology is called brushless alternating current (BLAC). The sinusoidal commutation requires a high accuracy detection of the rotor position inside one revolution. A resolver with a special integrated circuit the resolver-digital-converter (RDC) became popular to sense the position for the commutation. The RDC offers also an analogue velocity signal for the velocity feedback. Using the RDC velocity signal the velocity loop bandwidth decreases to about 150 Hz, but it saves the cost of an external tachometer at the motor shaft and the cost of the additional wireing. Furthermore these drives are capable to create an encoder emulation signal to save the external encoder at the motor shaft. Some suppliers use an incremental encoder with hall emulation instead of the resolver. Using an encoder increases the velocity loop bandwidth because there is no phase shift from the RDC. Using this BLAC technology, with an analogue or digital drive, with a resolver or encoder feedback is the current state of the servo market [1,2]. A further step in the evolution of servo drives was the digitalisation of the drive. This digitalisation was driven by field bus connectivity with an integrated position controller and to avoid the parameter adjustment with analogue potentiometers. In these digital servo amplifiers PWM, current loop and velocity loop are full digital. Using DSP calculation power it is still possible to achieve high control bandwidths in the control loops. With lower computing power the control performance would decrease. But the performance of the digital drives does not beat the performance of the analogue drive using an analogue signal for the command input with its disadvantages like noise, disturbing and offset [3]. In the analogue servo drives is no time delay for cycle time synchronisation, for sampling and analogue to digital conversion and for setpoint computing to do mathematical calculations inside the drive. Especially the setpoint computing time is a great advance of the analogue signal processing. There is no time delay for adding, subtracting, integrating or limiting signals. In a modern digital drive it is possible to do much more complex operations, but it takes computing time up to several ms. Using a special servo drive programming language with an optimising compiler for the signal processing inside the drive the computing time can be reduced dramatically. Requirements for a universal servo drive The current control loop is the most fundamental and important control loop for any variable speed drive system. Low inertia permanent magnet synchronous motors are used with preference in high performance positioning systems. Due to a large magnetic air gap and highest energy neodymium-iron-boron magnets, the inductance is very low, which favours fast dynamic response. However, this is the crucial point for the design of a high performance control system. This problem also exists for the upcoming generation of linear servomotors, which are very important for machine tool applications in the future. To solve these problems, a preferred approach is a digital current controller in synchronous coordinates and space vector modulation for the PWM. By using an advanced structural design for the pulsewidth modulator and the current controller, the drive achieves maximum performance and maximum dynamic benefit out of the available inverter power, while reducing the computing performance requirements to a minimum. A standard 32-bit RISC microcontroller manages PWM, current control and I/O functions with approximately 50 % of its computing power.

3 3 Figure 2: Block diagram servo amplifier The standard switching frequency of the IGBT power stage is 8 khz. To calculate each switching side separately the current regulator is clocked at 16 khz. The block diagram of a servo amplifier is shown in figure 2. Current control, PWM and the power stage on the right side of the diagram are not subjects of this paper. The shown structure is based on a universal hardware design: 14 bit-a/d-converter for the set point D/A converter for the monitor signals Resolver / encoder feedback interface CAN-open field bus interface Six phase PWM with over modulation Digital I/O Rectifier, DC-link and power stage Encoder emulation and some basic software units: Current control in synchronous coordinates with patented phase angle control Feedback processing Supervision Host communication Data acquisition A/D converter scheduling Task scheduler The achievable bandwidth of the velocity control loop is in the range of 250 Hz. For an adequate digital signal processing the velocity control update rate should be ten times higher. An update rate of 4 khz is a good compromise between sampling precision and the available computing power. The velocity control loop in a digital servo amplifier is usually designed by implementing the control schemes in software algorithms, using the basic functional control unit blocks. Generally, the user can choose one out of a predefined library of control schemes. If these configurations do not fulfil the requirements of the application, most manufacturers of servo amplifiers have to modify the basic software of the system. The necessary large development loop, the testing and the logistics are important disadvantages of this customisation process. A software design with a universal control scheme is not possible, because most of the high signal processing performance of the MCU would be wasted by making decisions to fit the software routines into the requirements for all possible options. A solution for this problem is a servo amplifier with an integrated compiler for a free programmable servo signal processing language.

4 4 FAST LONG JCMD ; // velocity command FAST BYTE PSTOP,NSTOP ;// limit switch // off line decision #IF LIMIT_SWITCH THEN // check limit switch option IF JCMD >= 0 THEN // on line decision IF PSTOP = 0 THEN JCMD = 0 ; ELSE IF NSTOP = 0 THEN JCMD = 0 ; END_IF #END_IF // end of off line decision Figure 3: SSPL programme listing handling the limit switches Servo signal processing language (SSPL) To achieve high signal processing power with a standard RISC microcontroller it is a good means to work with a servo signal processing language and an optimising compiler with in line function generation. The main focus for this language is the velocity/torque command computing. To make it easy for the user the structure is similar to the IEC 1131 standard. The SSPL offers the user four data types for variables and constants: BYTE (signed 8 Bit) WORD (signed 16 Bit) LONG (signed 32 Bit) STRING (ASCII string ) The data type BYTE is useful for logical operations, I/O and flags. WORD is for processing the analogue values for the A/D converter and the D/A converter. LONG is preferred for internal data representation. All variables are reset to zero after definition. It is also possible to assign start up values, or to read data from a resident parameter memory (EEPROM). Servostar 600 offers 500 user-defined variables or constants and over 100 system variables. About 200 variables can be placed in a special memory area for fast access. They can be marked with the keyword FAST like the keyword REGISTER in the C programming language. SSPL supports the basic arithmetical/logical operations for all data types and conversion routines for operations between these data types. An advanced IF / ELSE_IF / ELSE / END_IF statements result in more readable and less error-prone programmes. SSPL allows commenting every line in the programme. A post # before (#IF, #ELSE_IF, #ELSE and #END_IF) helps the compiler to generate fast code. This decision is done in the compiling process like an #ifdef / #endif in the C programming language. This off-line decision is very useful with configuration Data in conjunction with resident (EEPROM) variables. A very simple example to save processing power is the option limit switch for linear axes. If the limit switch is necessary the servo amplifier has to look at the switching state of the limit switch periodically. If this option is disabled the microcontroller still has to check this option on line, even though it is no longer used. After recompiling the velocity control loop with a disabled limit switch this decision computing time can be saved and provides better performance for the rest of the system This compiling process is done at least every time booting the microcontroller of the drive. An SSPL programme listing handling the limit switches is shown in figure 3 Using an SSPL compiler inside a servo drive the manufacturer can replace expensive DSP computing power (MIPS) and fast access time memory with much cheaper memory with more capacity (flash EPROM) for the integrated compiler. Task management The task management, shown in figure 4 controls the processing power of the RISC microcontroller. The highest priority is owned by the current controller (62.6µs). The next priority is given to the free programmable velocity control loop (250 µs). There are three slower real time tasks with 1, 4 and 16 ms cycle time. They can be used for simple logical control or supervision. There are three additional regular non real time tasks with the same low priority:

5 5 Priority Task Frequency MCU time High (7) Current controller PWM Feedback I/O.. (6) Free programmable Velocity controller Process data processing 16 khz real time 50 % 4 khz real time < 20 %.. (4) Field bus interface Interrupt controlled < 5%.. (2) Drive supervision 1 khz real time < 10 % Low (1) Drive supervision About 2 khz 33 % of the residual time Low (1) Host communication Parameter data processing About 2 khz 33 % of the residual time Low (1) User SSPL Task Depends on the programme 33 % of the residual time Figure 4: Task management host communication, drive supervision and a user SSPL task. In the user task the SSPL based system offers the capability to realise loop processing. A loop structure is in the real time task not possible, because the system has to watch that the assigned code is executed exactly one time every cycle time. To make this quiet sure, the SSPL compiler controls the worst execution time of all tasks. These three tasks share the rest of the microcontroller computing time. A task scheduler switch over every 250 µs. Typically the communication and the supervision task is processed more than two times every ms. The cycle time of the user task depends on the user programme. Inside the user task it is possible to reconfigure control loop parameters of the drive. It is also allowed to wait for an external event. Fast event processing can be done by the user interrupt task. It can be triggered from a 24V I/O or from a field bus signal. The programme written in SSPL can read out and save the data from hardware capture register or a system variable. For setting up variables the user can define an ENABLE SSPL task that is processed before the drive enables the power stage. To save variables the user can define a DISABLE Task that is processed after disabling the power stage. This can be a regular disabling or a disabling caused by a fault condition. Function library To handle all possible functions and its options there is a function library permanently stored inside the drive. This functions are similar to standard C library functions like sin() and printf(). The parameter passing convention to subroutines is like FORTAN convention. It is handled always with pointers. The compiler does not need to copy parameters. The use of these functions is independent of the firmware release of the drive. It is comparable with a C programme compiling and running with DOS version 5.0 or 6.0. Maybe the I/O or something else is faster or slower but the programme will run on both platforms. In an SSPL drive the performance of the basic software units or of the functions can be increased without getting problems with special SSPL customer versions. Customisations do not end in a big version Christmas tree because it is not required to update each individual software solution with a new firmware release. The supplier of the drive usually offers this function library. If it is necessary the user can create special functions for his application.

6 6 Output of the velocity control: WORD ISET ; // setpoint current Input data of the velocity control: LONG NSET ; // Setpoint velocity LONG NFB ; // Feedback for the P part LONG NCNT ; // Feddback for the I part WORD ILIMIT ; // current limitation WORD GV ; // P gain (internal format) WORD GVTN ; // I gain (internal format) LONG IVACCU ; // I accumulation Subroutine call: PI(ISET,NSET,NFB,NCNT,ILIMIT,GV,GVTN,IVACCU); Figure 5: Function for a PI control loop in SSPL For example in the standard library are functions available like: Algebraic math with the analogue commands / internal signals, Limiting the peak current (torque), Suppress analogue commands near zero to eliminate a slow motion caused by an analogue offset, Handling a fault of one line phase, Process a PID control loop of an external system, Switch the integral part of the velocity control on or off, Emulate a stepper motor with electronic gearing or to Capture a position with a special trigger signal. At least the user can chose a velocity control algorithm optimised for his application. For example a standard PI control function is shown in figure 5. Velocity loop programme A block diagram of a simple velocity loop is shown in figure 6. This control scheme is based on the most widely spread control loop in industry today proportional integral or PI[1,2]. PI is very popular, not just in motion control applications, but also in processes such as temperature or liquid flow control. This simple controller is very good to illustrate the programming schemes of the signal processing inside the servo amplifier. A programme listing of this velocity loop in the servo signal processing language is shown in figure 7. This language is based on the PLC programming standard IEC An abstract of the servo signal processing language is shown in figure 9. Experimental Results Figure 8 shows that a torque step of rated magnitude is fully performed within one switching half cycle without overshoot. The decoupling between the d- and q-axis currents is almost perfect. In conjunction with a high resolution feedback and the offered current control performance the servo signal processing language (SSPL) allows the user to implement a flexible velocity control algorithm very easily. In summary, the structural design of the drive allows sovereign performance and full dynamic utilisation of inverter power while reducing the computational requirements to a minimum. Figure 6: Block diagram of a simple velocity loop

7 7 DBANDW(NSET,AD1INPUT,DEADBAND) ; // check deadband #IF LIMIT_SWITCH THEN // check limit switch IF NSET >= 0 THEN IF PSTOP = 0 THEN NSET = 0 ; ELSE IF NSTOP = 0 THEN NSET = 0 ; END_IF #END_IF FILT1(NFB,NCNT,TTACHO) ; // feedback filter RAMP(NCMD,NSET,RUP,RDOWM) ; // ramp generator PI(ICMD,NCMD,NFB,NCNT,ILIMIT,GV,GVTN,I_ACCU) ; // velocity control Figure 7: Programme listing of the velocity loop (example) Figure 8: Step response of the motor current References [1] M. Stern. Universal Digital Motion Controller EPE 89 Power Electronics and Applications proceedings. Vol 1. Aachen [2] C. A. Wontrop, G. Ellis and I. Cohen Multiple Control Schemes Advance Motion Control Control Engineering, October [3] G. Ellis Comparison of Drive and Controller Architecture: Sercos and Analog PCIM May.1998

8 8 on line decision: IF condition THEN ELSE off line decision (done while start up compiling) #IF condition THEN #ELSE # digital filter - first order: FILT1(output, input, parameter: time constant) ; ramp generator: RAMP(output: velocity cmd, input: velocity cmd, parameter: acceleration ramp, deceleration ramp) ; pi control: PI(output: current command, input: velocity command input: velocity, parameter: wind up limit, kv, tn, integral accu) ; signal monitoring: MONITORC(output: analogue output number, input: variable ) ; deadband to suppress an offset drift at the analogue input: DBANDW(output: command, input: analogue input, parameter value) ; internal command processing: ML_CMD(output: ASCII data channel, input: command string) ; for example: ML_CMD(DEV_RS232, DIS ) ; disables the drive. Figure 9: Servo signal processing language command list (abstract)