Network Theorems. Objectives 9.1 INTRODUCTION 9.2 SUPERPOSITION THEOREM

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1 M09_BOYL3605_13_S_C09.indd Pge /11/14 1:59 PM f403 /204/PH01893/ _BOYLSTAD/BOYLSTAD_NTRO_CRCUT_ANALYSS13_S_ Network Theorems Ojectives Become fmilir with the superposition theorem nd its unique ility to seprte the impct of ech source on the quntity of interest. Be le to pply Thévenin s theorem to reduce ny two-terminl, series-prllel network with ny numer of sources to single voltge source nd series resistor. Become fmilir with Norton s theorem nd how it cn e used to reduce ny two-terminl, seriesprllel network with ny numer of sources to single current source nd prllel resistor. Understnd how to pply the mximum power trnsfer theorem to determine the mximum power to lod nd to choose lod tht will receive mximum power. Become wre of the reduction powers of Millmn s theorem nd the powerful implictions of the sustitution nd reciprocity theorems. 9 O P F 9.1 NTRODUCTON This chpter introduces numer of theorems tht hve ppliction throughout the field of electricity nd electronics. Not only cn they e used to solve networks such s encountered in the previous chpter, ut they lso provide n opportunity to determine the impct of prticulr source or element on the response of the entire system. n most cses, the network to e nlyzed nd the mthemtics required to find the solution re simplified. All of the theorems pper gin in the nlysis of c networks. n fct, the ppliction of ech theorem to c networks is very similr in content to tht found in this chpter. The first theorem to e introduced is the superposition theorem, followed y Thévenin s theorem, Norton s theorem, nd the mximum power trnsfer theorem. The chpter concludes with rief introduction to Millmn s theorem nd the sustitution nd reciprocity theorems. 9.2 SUPRPOSTON THORM The superposition theorem is unquestionly one of the most powerful in this field. t hs such widespred ppliction tht people often pply it without recognizing tht their mneuvers re vlid only ecuse of this theorem. n generl, the theorem cn e used to do the following: Anlyze networks such s introduced in the lst chpter tht hve two or more sources tht re not in series or prllel. Revel the effect of ech source on prticulr quntity of interest. For sources of different types (such s dc nd c, which ffect the prmeters of the network in different mnner) nd pply seprte nlysis for ech type, with the totl result simply the lgeric sum of the results. GRDLN ST N 1ST-PP TO NDCAT SAF ARA; TO B RMOVD AFTST-PP Th

2 360 Network Theorems Th The first two res of ppliction re descried in detil in this section. The lst re covered in the discussion of the superposition theorem in the c portion of the text. The superposition theorem sttes the following: The current through, or voltge cross, ny element of network is equl to the lgeric sum of the currents or voltges produced independently y ech source. n other words, this theorem llows us to find solution for current or voltge using only one source t time. Once we hve the solution for ech source, we cn comine the results to otin the totl solution. The term lgeric ppers in the ove theorem sttement ecuse the currents resulting from the sources of the network cn hve different directions, just s the resulting voltges cn hve opposite polrities. f we re to consider the effects of ech source, the other sources oviously must e removed. Setting voltge source to zero volts is like plcing short circuit cross its terminls. Therefore, when removing voltge source from network schemtic, replce it with direct connection (short circuit) of zero ohms. Any internl resistnce ssocited with the source must remin in the network. Setting current source to zero mperes is like replcing it with n open circuit. Therefore, when removing current source from network schemtic, replce it y n open circuit of infinite ohms. Any internl resistnce ssocited with the source must remin in the network. The ove sttements re illustrted in Fig R int R int R int R int FG. 9.1 Removing voltge source nd current source to permit the ppliction of the superposition theorem. Since the effect of ech source will e determined independently, the numer of networks to e nlyzed will equl the numer of sources. f prticulr current of network is to e determined, the contriution to tht current must e determined for ech source. When the effect of ech source hs een determined, those currents in the sme direction re dded, nd those hving the opposite direction re sutrcted; the lgeric sum is eing determined. The totl result is the direction of the lrger sum nd the mgnitude of the difference. Similrly, if prticulr voltge of network is to e determined, the contriution to tht voltge must e determined for ech source. When the effect of ech source hs een determined, those voltges with the sme polrity re dded, nd those with the opposite polrity re sutrcted; the lgeric sum is eing determined. The totl result hs the polrity of the lrger sum nd the mgnitude of the difference.

3 Th Superposition Theorem 361 Superposition cnnot e pplied to power effects ecuse the power is relted to the squre of the voltge cross resistor or the current through resistor. The squred term results in nonliner ( curve, not stright line) reltionship etween the power nd the determining current or voltge. For exmple, douling the current through resistor does not doule the power to the resistor (s defined y liner reltionship) ut, in fct, increses it y fctor of 4 (due to the squred term). Tripling the current increses the power level y fctor of 9. xmple 9.1 demonstrtes the differences etween liner nd nonliner reltionship. A few exmples clrify how sources re removed nd totl solutions otined. XAMPL 9.1. Using the superposition theorem, determine the current through resistor for the network in Fig Demonstrte tht the superposition theorem is not pplicle to power levels. Solutions:. n order to determine the effect of the 36 V voltge source, the current source must e replced y n open-circuit equivlent s shown in Fig The result is simple series circuit with current equl to 2 R T 36 V 12 Ω 6 Ω 36 V 18 Ω 2 A xmining the effect of the 9 A current source requires replcing the 36 V voltge source y short-circuit equivlent s shown in Fig The result is prllel comintion of resistors nd. Applying the current divider rule results in 2 () (12 Ω)(9 A) 12 Ω 6 Ω 6 A Since the contriution to current 2 hs the sme direction for ech source, s shown in Fig. 9.5, the totl solution for current 2 is the sum of the currents estlished y the two sources. Tht is, A 6 A 8 A. Using Fig. 9.3 nd the results otined, we find the power delivered to the 6 Ω resistor P 1 ( 2 ) 2 ( ) (2 A) 2 (6 Ω) 24 W Using Fig. 9.4 nd the results otined, we find the power delivered to the 6 Ω resistor P 2 ( 2 ) 2 ( ) (6 A) 2 (6 Ω) 216 W Using the totl results of Fig. 9.5, we otin the power delivered to the 6 Ω resistor P T 2 2 (8 A) 2 (6 Ω) 384 W t is now quite cler tht the power delivered to the 6 Ω resistor using the totl current of 8 A is not equl to the sum of the power levels due to ech source independently. Tht is, P 1 P 2 24 W 216 W 240 W P T 384 W 36 V A FG. 9.2 Network to e nlyzed in xmple 9.1 using the superposition theorem. 36 V 12 Current source replced y open circuit 2 FG. 9.3 Replcing the 9 A current source in Fig. 9.2 y n open circuit to determine the effect of the 36 V voltge source on current A FG. 9.4 Replcing the 36 V voltge source y short-circuit equivlent to determine the effect of the 9 A current source on current A 2 6 A 2 8 A FG. 9.5 Using the results of Figs. 9.3 nd 9.4 to determine current 2 for the network in Fig. 9.2.

4 362 Network Theorems Th To expnd on the ove conclusion nd further demonstrte wht is ment y nonliner reltionship, the power to the 6 Ω resistor versus current through the 6 Ω resistor is plotted in Fig Note tht the curve is not stright line ut one whose rise gets steeper with increse in current level. 400 P (W) z 100 y Nonliner curve x{ (A) ( 2 ) ( 2 ) ( T ) FG. 9.6 Plotting power delivered to the 6 Ω resistor versus current through the resistor. Recll from Fig. 9.3 tht the power level ws 24 W for current of 2 A developed y the 36 V voltge source, shown in Fig From Fig. 9.4, we found tht the current level ws 6 A for power level of 216 W, shown in Fig Using the totl current of 8 A, we find tht the power level in 384 W, shown in Fig Quite clerly, the sum of power levels due to the 2 A nd 6 A current levels does not equl tht due to the 8 A level. Tht is, x y z Now, the reltionship etween the voltge cross resistor nd the current through resistor is liner (stright line) one, s shown in Fig. 9.7, with c (A) c Liner curve V (V) ( 2 ) ( 2 ) ( T ) FG. 9.7 Plotting versus V for the 6 Ω resistor.

5 Th Superposition Theorem 363 XAMPL 9.2 Using the superposition theorem, determine the current through the 12 Ω resistor in Fig Note tht this is two-source network of the type exmined in the previous chpter when we pplied rnch-current nlysis nd mesh nlysis. Solution: Considering the effects of the 54 V source requires replcing the 48 V source y short-circuit equivlent s shown in Fig The result is tht the 12 Ω nd 4 Ω resistors re in prllel. The totl resistnce seen y the source is therefore R T } 24 Ω 12 Ω } 4 Ω 24 Ω 3 Ω 27 Ω nd the source current is s 1 R T 54 V 27 Ω 2 A 1 54 V 2 2? V FG. 9.8 Using the superposition theorem to determine the current through the 12 Ω resistor (xmple 9.2). s 2 48 V ttery 2 2 replced y short 2 circuit R T 1 54 V V 12 FG. 9.9 Using the superposition theorem to determine the effect of the 54 V voltge source on current 2 in Fig Using the current divider rule results in the contriution to 2 due to the 54 V source: 2 s (4 Ω)(2 A) 4 Ω 12 Ω 0.5 A f we now replce the 54 V source y short-circuit equivlent, the network in Fig results. The result is prllel connection for the 12 Ω nd 24 Ω resistors. Therefore, the totl resistnce seen y the 48 V source is R T } 4 Ω 12 Ω } 24 Ω 4 Ω 8 Ω 12 Ω 2 R T V V V ttery replced y short circuit 8 FG Using the superposition theorem to determine the effect of the 48 V voltge source on current 2 in Fig. 9.8.

6 364 Network Theorems Th A A A FG Using the results of Figs. 9.9 nd 9.10 to determine current 2 for the network in Fig nd the source current is s 2 R T 48 V 12 Ω 4 A Applying the current divider rule results in 2 ( s ) (24 Ω)(4 A) 24 Ω 12 Ω 2.67 A t is now importnt to relize tht current 2 due to ech source hs different direction, s shown in Fig The net current therefore is the difference of the two nd in the direction of the lrger s follows: A A 2.17 A 30 V 3 A FG Two-source network to e nlyzed using the superposition theorem in xmple V FG Determining the effect of the 30 V supply on the current 1 in Fig A 1 FG Determining the effect of the 3 A current source on the current 1 in Fig Using Figs. 9.9 nd 9.10 in xmple 9.2, we cn determine the other currents of the network with little dded effort. Tht is, we cn determine ll the rnch currents of the network, mtching n ppliction of the rnch-current nlysis or mesh nlysis pproch. n generl, therefore, not only cn the superposition theorem provide complete solution for the network, ut it lso revels the effect of ech source on the desired quntity. XAMPL 9.3 Using the superposition theorem, determine current 1 for the network in Fig Solution: Since two sources re present, there re two networks to e nlyzed. First let us determine the effects of the voltge source y setting the current source to zero mperes s shown in Fig Note tht the resulting current is defined s 1 ecuse it is the current through resistor due to the voltge source only. Due to the open circuit, resistor is in series (nd, in fct, in prllel) with the voltge source. The voltge cross the resistor is the pplied voltge, nd current 1 is determined y 1 V 1 30 V 6 Ω 5 A Now for the contriution due to the current source. Setting the voltge source to zero volts results in the network in Fig. 9.14, which presents us with n interesting sitution. The current source hs een replced with short-circuit equivlent tht is directly cross the current source nd resistor. Since the source current tkes the pth of lest resistnce, it chooses the zero ohm pth of the inserted short-circuit equivlent, nd the current through is zero mperes. This is clerly demonstrted y n ppliction of the current divider rule s follows: 1 R sc R sc (0 Ω) 0 Ω 6 Ω 0 A Since 1 nd 1 hve the sme defined direction in Figs nd 9.14, the totl current is defined y A 0 A 5 A Although this hs een n excellent introduction to the ppliction of the superposition theorem, it should e immeditely cler in Fig tht the voltge source is in prllel with the current source nd lod

7 Th Superposition Theorem 365 resistor, so the voltge cross ech must e 30 V. The result is tht 1 must e determined solely y 1 V 1 30 V 6 Ω 5 A XAMPL 9.4 Using the principle of superposition, find the current 2 through the 12 kω resistor in Fig Solution: Consider the effect of the 6 ma current source (Fig. 9.16). 6 ma 2 6 ma 2 6 ma 6 k 9 V 14 k 2 12 k R 4 35 k 6 k 12 k 6 k 12 k FG xmple ma 6 ma 14 k R 4 35 k 14 k R 4 35 k FG The effect of the current source on the current 2. The current divider rule gives 2 (6 kω)(6 ma) 6 kω 12 kω 2 ma Considering the effect of the 9 V voltge source (Fig. 9.17) gives 2 9 V 6 kω 12 kω 0.5 ma Since 2 nd 2 hve the sme direction through, the desired current is the sum of the two: ma 0.5 ma 2.5 ma 9 V k 12 k 6 k 9 V 12 k 9 V 14 k R 4 35 k R 4 FG The effect of the voltge source on the current k 35 k 9 V

8 366 Network Theorems Th V 3 A 6 V 2 XAMPL 9.5 Find the current through the 2 Ω resistor of the network in Fig The presence of three sources results in three different networks to e nlyzed. Solution: Consider the effect of the 12 V source (Fig. 9.19): 1 FG xmple V 1 1 FG The effect of 1 on the current V 2 FG The effect of 2 on the current A 1 FG The effect of on the current V 2 Ω 4 Ω 12 V 6 Ω 2 A Consider the effect of the 6 V source (Fig. 9.20): V 2 Ω 4 Ω 6 V 6 Ω 1 A Consider the effect of the 3 A source (Fig. 9.21): Applying the current divider rule gives 1 (4 Ω)(3 A) 2 Ω 4 Ω 12 A 6 2 A The totl current through the 2 Ω resistor ppers in Fig. 9.22, nd Sme direction s 1 in Fig Opposite direction to 1 in Fig " 1 " ' 1 ' 1 1 A 2 A 2 A 1 A A 1 1 A 1 2 A A FG The resultnt current THÉVNN S THORM The next theorem to e introduced, Thévenin s theorem, is proly one of the most interesting in tht it permits the reduction of complex networks to simpler form for nlysis nd design. n generl, the theorem cn e used to do the following: Anlyze networks with sources tht re not in series or prllel. Reduce the numer of components required to estlish the sme chrcteristics t the output terminls.

9 Th Thévenin s Theorem 367 nvestigte the effect of chnging prticulr component on the ehvior of network without hving to nlyze the entire network fter ech chnge. All three res of ppliction re demonstrted in the exmples to follow. Thévenin s theorem sttes the following: Any two-terminl dc network cn e replced y n equivlent circuit consisting solely of voltge source nd series resistor s shown in Fig The theorem ws developed y Commndnt Leon-Chrles Thévenin in 1883 s descried in Fig To demonstrte the power of the theorem, consider the firly complex network of Fig. 9.25() with its two sources nd series-prllel connections. The theorem sttes tht the entire network inside the lue shded re cn e replced y one voltge source nd one resistor s shown in Fig. 9.25(). f the replcement is done properly, the voltge cross, nd the current through, the resistor will e the sme for ech network. The vlue of cn e chnged to ny vlue, nd the voltge, current, or power to the lod resistor is the sme for ech configurtion. Now, this is very powerful sttement one tht is verified in the exmples to follow. The question then is, How cn you determine the proper vlue of Thévenin voltge nd resistnce? n generl, finding the Thévenin resistnce vlue is quite strightforwrd. Finding the Thévenin voltge cn e more of chllenge nd, in fct, my require using the superposition theorem or one of the methods descried in Chpter 8. Fortuntely, there is series of steps tht will led to the proper vlue of ech prmeter. Although few of the steps my seem trivil t first, they cn ecome quite importnt when the network ecomes complex. Thévenin s Theorem Procedure Preliminry: 1. Remove tht portion of the network where the Thévenin equivlent circuit is found. n Fig. 9.25(), this requires tht the lod resistor e temporrily removed from the network. 2. Mrk the terminls of the remining two-terminl network. (The importnce of this step will ecome ovious s we progress through some complex networks.) R Th : 3. Clculte R Th y first setting ll sources to zero (voltge sources re replced y short circuits nd current sources y open circuits) nd then finding the resultnt resistnce etween the two mrked terminls. (f the internl resistnce of the voltge nd/or current sources is included in the originl network, it must remin when the sources re set to zero.) Th : 4. Clculte Th y first returning ll sources to their originl position nd finding the open-circuit voltge etween the mrked terminls. (This step is invrily the one tht cuses most confusion nd errors. n ll cses, keep in mind tht it is the open-circuit potentil etween the two terminls mrked in step 2.) Th R Th FG Thévenin equivlent circuit. FG Leon-Chrles Thévenin. Courtesy of the Biliothèque École Polytechnique, Pris, Frnce. French (Meux, Pris) ( ) Telegrph ngineer, Commndnt nd ductor École Polytechnique nd École Supérieure de Télégrphie Although ctive in the study nd design of telegrphic systems (including underground trnsmission), cylindricl condensers (cpcitors), nd electromgnetism, he is est known for theorem first presented in the French Journl of Physics Theory nd Applictions in t ppered under the heding of Sur un nouveu théorème d électricité dynmique ( On new theorem of dynmic electricity ) nd ws originlly referred to s the equivlent genertor theorem. There is some evidence tht similr theorem ws introduced y Hermnn von Helmholtz in However, Professor Helmholtz pplied the theorem to niml physiology nd not to communiction or genertor systems, nd therefore he hs not received the credit in this field tht he might deserve. n the erly 1920s AT&T did some pioneering work using the equivlent circuit nd my hve initited the reference to the theorem s simply Thévenin s theorem. n fct, dwrd L. Norton, n engineer t AT&T t the time, introduced current source equivlent of the Thévenin equivlent currently referred to s the Norton equivlent circuit. As n side, Commndnt Thévenin ws n vid skier nd in fct ws commissioner of n interntionl ski competition in Chmonix, Frnce, in 1912.

10 368 Network Theorems Th Conclusion: 5. Drw the Thévenin equivlent circuit with the portion of the circuit previously removed replced etween the terminls of the equivlent circuit. This step is indicted y the plcement of the resistor etween the terminls of the Thévenin equivlent circuit s shown in Fig. 9.25(). L R Th L Th () () FG Sustituting the Thévenin equivlent circuit for complex network V FG xmple 9.6. XAMPL 9.6 Find the Thévenin equivlent circuit for the network in the shded re of the network in Fig Then find the current through for vlues of 2 Ω, 10 Ω, nd 100 Ω. Solution: Steps 1 nd 2: These produce the network in Fig Note tht the lod resistor hs een removed nd the two holding terminls hve een defined s nd. Step 3: Replcing the voltge source 1 with short-circuit equivlent yields the network in Fig. 9.28(), where R Th } (3 Ω)(6 Ω) 3 Ω 6 Ω 2 Ω V 3 R Th () () FG dentifying the terminls of prticulr importnce when pplying Thévenin s theorem. FG Determining R Th for the network in Fig The importnce of the two mrked terminls now egins to surfce. They re the two terminls cross which the Thévenin resistnce is mesured. t is no longer the totl resistnce s seen y the source, s determined in the mjority of prolems of Chpter 7. f some difficulty develops when determining R Th with regrd to whether the resistive elements re in series or prllel, consider reclling tht the ohmmeter sends out trickle current into resistive comintion nd senses the

11 Th Thévenin s Theorem 369 level of the resulting voltge to estlish the mesured resistnce level. n Fig. 9.28(), the trickle current of the ohmmeter pproches the network through terminl, nd when it reches the junction of nd, it splits s shown. The fct tht the trickle current splits nd then recomines t the lower node revels tht the resistors re in prllel s fr s the ohmmeter reding is concerned. n essence, the pth of the sensing current of the ohmmeter hs reveled how the resistors re connected to the two terminls of interest nd how the Thévenin resistnce should e determined. Rememer this s you work through the vrious exmples in this section. Step 4: Replce the voltge source (Fig. 9.29). For this cse, the opencircuit voltge Th is the sme s the voltge drop cross the 6 Ω resistor. Applying the voltge divider rule gives Th 1 (6 Ω)(9 V) 6 Ω 3 Ω 54 V 9 6 V t is prticulrly importnt to recognize tht Th is the open-circuit potentil etween points nd. Rememer tht n open circuit cn hve ny voltge cross it, ut the current must e zero. n fct, the current through ny element in series with the open circuit must e zero lso. The use of voltmeter to mesure Th ppers in Fig Note tht it is plced directly cross the resistor since Th nd V R2 re in prllel. Step 5: (Fig. 9.31): Th L R Th 6 V 2 Ω: L 2 Ω 2 Ω 1.5 A 10 Ω: L 100 Ω: L 6 V 2 Ω 10 Ω 0.5 A 6 V 2 Ω 100 Ω 0.06 A f Thévenin s theorem were unville, ech chnge in would require tht the entire network in Fig e reexmined to find the new vlue of V Th FG Determining Th for the network in Fig V Th FG Mesuring Th for the network in Fig Th 6 V R Th 2 L FG Sustituting the Thévenin equivlent circuit for the network externl to in Fig A 2 7 XAMPL 9.7 Find the Thévenin equivlent circuit for the network in the shded re of the network in Fig Solution: Steps 1 nd 2: See Fig Step 3: See Fig The current source hs een replced with n open-circuit equivlent nd the resistnce determined etween terminls nd. n this cse, n ohmmeter connected etween terminls nd sends out sensing current tht flows directly through nd (t the sme level). The result is tht nd re in series nd the Thévenin resistnce is the sum of the two, R Th 4 Ω 2 Ω 6 Ω 12 A FG xmple FG stlishing the terminls of prticulr interest for the network in Fig

12 370 Network Theorems Th 2 R Th 12 A V 2 0 V 2 0 Th Th 48 V R Th 7 FG Determining R Th for the network in Fig FG Determining Th for the network in Fig FG Sustituting the Thévenin equivlent circuit in the network externl to the resistor in Fig Step 4: See Fig n this cse, since n open circuit exists etween the two mrked terminls, the current is zero etween these terminls nd through the 2 Ω resistor. The voltge drop cross is, therefore, nd Step 5: See Fig V 2 2 (0) 0 V Th V 1 1 (12 A)(4 Ω) 48 V XAMPL 9.8 Find the Thévenin equivlent circuit for the network in the shded re of the network in Fig Note in this exmple tht there is no need for the section of the network to e preserved to e t the end of the configurtion. R V 2 FG xmple 9.8. Solution: Steps 1 nd 2: See Fig V 2 FG dentifying the terminls of prticulr interest for the network in Fig

13 Th Thévenin s Theorem 371 Circuit redrwn: R Th 2 R Th Short circuited R T FG Determining R Th for the network in Fig Step 3: See Fig Steps 1 nd 2 re reltively esy to pply, ut now we must e creful to hold onto the terminls nd s the Thévenin resistnce nd voltge re determined. n Fig. 9.39, ll the remining elements turn out to e in prllel, nd the network cn e redrwn s shown. We hve R Th } (6 Ω)(4 Ω) 6 Ω 4 Ω 24 Ω Ω Th Th 1 8 V 2 Th 1 8 V FG Network of Fig redrwn. 2 FG Determining Th for the network in Fig Step 4: See Fig n this cse, the network cn e redrwn s shown in Fig Since the voltge is the sme cross prllel elements, the voltge cross the series resistors nd is 1, or 8 V. Applying the voltge divider rule gives Th 1 (6 Ω)(8 V) 6 Ω 4 Ω 48 V V R Th 2. Th 4.8 V R 4 3 FG Sustituting the Thévenin equivlent circuit for the network externl to the resistor R 4 in Fig Step 5: See Fig The importnce of mrking the terminls should e ovious from xmple 9.8. Note tht there is no requirement tht the Thévenin voltge hve the sme polrity s the equivlent circuit originlly introduced. 72 V 3 R 4 XAMPL 9.9 Find the Thévenin equivlent circuit for the network in the shded re of the ridge network in Fig FG xmple 9.9.

14 372 Network Theorems Th 72 V 3 R 4 12 Solution: Steps 1 nd 2: See Fig Step 3: See Fig n this cse, the short-circuit replcement of the voltge source provides direct connection etween c nd c in Fig. 9.45(), permitting folding of the network round the horizontl line of - to produce the configurtion in Fig. 9.45(). FG dentifying the terminls of prticulr interest for the network in Fig R Th R - } } R 4 6 Ω } 3 Ω 4 Ω } 12 Ω 2 Ω 3 Ω 5 Ω c 12 R Th R 4 3 R Th 3 R 4 12 c c,c () () FG Solving for R Th for the network in Fig Step 4: The circuit is redrwn in Fig The sence of direct connection etween nd results in network with three prllel rnches. The voltges V 1 nd V 2 cn therefore e determined using the voltge divider rule: V 1 V 2 R 4 (6 Ω)(72 V) 6 Ω 3 Ω 432 V 9 (12 Ω)(72 V) 12 Ω 4 Ω 864 V V 54 V Th 6 V R Th 5 FG Sustituting the Thévenin equivlent circuit for the network externl to the resistor in Fig V V 1 3 KVL Th R 4 FG Determining Th for the network in Fig Assuming the polrity shown for Th nd pplying Kirchhoff s voltge lw to the top loop in the clockwise direction results in nd Step 5: See Fig g C V Th V 1 - V 2 0 Th V 2 - V 1 54 V - 48 V 6 V V 2

15 Th Thévenin s Theorem 373 Thévenin s theorem is not restricted to single pssive element, s shown in the preceding exmples, ut cn e pplied cross sources, whole rnches, portions of networks, or ny circuit configurtion, s shown in the following exmple. t is lso possile tht you my hve to use one of the methods previously descried, such s mesh nlysis or superposition, to find the Thévenin equivlent circuit V 4 k R k XAMPL 9.10 (Two sources) Find the Thévenin circuit for the network within the shded re of Fig Solution: Steps 1 nd 2: See Fig The network is redrwn. Step 3: See Fig k 6 V 6 k FG xmple R Th R 4 } } 1.4 kω 0.8 kω } 4 kω } 6 kω 1.4 kω 0.8 kω } 2.4 kω 1.4 kω 0.6 kω 2 kω Step 4: Applying superposition, we will consider the effects of the voltge source 1 first. Note Fig The open circuit requires tht V 4 4 R 4 (0)R 4 0 V, nd Th V 3 R T } 4 kω } 6 kω 2.4 kω Applying the voltge divider rule gives V 3 R T 1 R T (2.4 kω)(6 V) 2.4 kω 0.8 kω 14.4 V 3.2 Th V V 4.5 V For the source 2, the network in Fig results. Agin, V 4 4 R 4 (0)R 4 0 V, nd Th V 3 R T } 0.8 kω } 6 kω kω nd V 3 R T 2 R T (0.706 kω)(10 V) kω 4 kω 7.06 V V Th V V 4 k 0.8 k R V 2 10 V 6 k R k FG dentifying the terminls of prticulr interest for the network in Fig k 4 k 2.4 k 6 k R k R Th FG Determining R Th for the network in Fig V 4 R V R k 4 k 6 V 6 k 1.4 k V 3 Th R 1 4 k 0.8 k R3 6 k 2 10 V 1.4 k V 3 Th FG Determining the contriution to Th from the source 1 for the network in Fig FG Determining the contriution to Th from the source 2 for the network in Fig

16 374 Network Theorems Th R Th Since Th nd Th hve opposite polrities, Th V 3 2 k Th Th - Th 4.5 V V 3 V (polrity of Th ) Step 5: See Fig FG Sustituting the Thévenin equivlent circuit for the network externl to the resistor in Fig n the next exmple there is oth current source nd voltge source in the configurtion to e converted into Thévenin equivlent circuit. n such cses it my e necessry to use the superposition theorem or method of nlysis to find the Thévenin voltge. Note lso tht the network outside the chosen re is more complex thn single element. n other words, portions of more complex network cn e replced y their Thévenin equivlent circuit to further reduce the complexity of the originl network. XAMPL 9.11 For the network of Fig. 9.54,. Find the Thévenin equivlent circuit for the portion of the network in the shded re.. Reconstruct the network of Fig with the Thévenin equivlent network in plce. c. Using the resulting network of prt () find the voltge V V 2 A V FG xmple V 2 A 12 Th? R Th? Solutions:. Steps 1 nd 2: See Fig Step 3: See Fig R Th 12 Ω } (4 Ω 6 Ω) 12 Ω } 10 Ω 5.45 Ω FG stlishing the terminls of interest for the network of Fig Step 4: Applying the superposition theorem, we will first find the effect of the voltge source on the Thévenin voltge using the network of Fig Applying the voltge divider rule: Th 12 Ω (18 V) 6 Ω 4 Ω 12 Ω V 9.82 V

17 Th Thévenin s Theorem R Th 12 Th 1 18 V FG Determining R Th. FG Determining the contriution of 1 to Th. 2 A 2 A 12 Th 18 () FG Determining the contriution of to Th. () R Th V V The contriution due to the current source is determined using the network of Fig. 9.58() redrwn s shown in Fig. 9.58(). Applying the current divider rule: Th 5.45 V 8 nd so tht 4 Ω (2 A) 4 Ω 18 Ω 8 22 A A Th - (12 Ω) -(0.364 A)(12 Ω) V Th Th Th 9.82 V V 5.45 V. The reconstructed network is shown in Fig c. Using the voltge divider rule: Thévenin equivlent FG Applying the Thévenin equivlent network to the network of Fig V 8 Ω (5.45 V 16 V) 5.45 Ω 8 Ω 8 (21.45) V V V nsted of using the superposition theorem, the current source could first hve een converted to voltge source nd the series elements comined to determine the Thévenin voltge. n ny event oth pproches would hve yielded the sme results. xperimentl Procedures Now tht the nlyticl procedure hs een descried in detil nd sense for the Thévenin impednce nd voltge estlished, it is time to

18 376 Network Theorems Th investigte how oth quntities cn e determined using n experimentl procedure. ven though the Thévenin resistnce is usully the esiest to determine nlyticlly, the Thévenin voltge is often the esiest to determine experimentlly, nd therefore it will e exmined first. Mesuring Th The network of Fig. 9.60() hs the equivlent Thévenin circuit ppering in Fig. 9.60(). The open-circuit Thévenin voltge cn e determined y simply plcing voltmeter on the output terminls in Fig. 9.60() s shown. This is due to the fct tht the open circuit in Fig. 9.60() dicttes tht the current through nd the voltge cross the Thévenin resistnce must e zero. The result for Fig. 9.60() is tht n generl, therefore, V oc Th 4.5 V the Thévenin voltge is determined y connecting voltmeter to the output terminls of the network. Be sure the internl resistnce of the voltmeter is significntly more thn the expected level of R Th V 20V V COM V 0 V R Th V COM A A V oc Th 4.5 V Th 4.5 V V oc Th 4.5 V 12 V () () FG Mesuring the Thévenin voltge with voltmeter: () ctul network; () Thévenin equivlent. Mesuring R Th Using An Ohmmeter n Fig. 9.61, the sources in Fig. 9.60() hve een set to zero, nd n ohmmeter hs een pplied to mesure the Thévenin resistnce. n Fig. 9.60(), it is cler tht if the Thévenin voltge is set to zero volts, the ohmmeter will red the Thévenin resistnce directly. n generl, therefore, the Thévenin resistnce cn e mesured y setting ll the sources to zero nd mesuring the resistnce t the output terminls. t is importnt to rememer, however, tht ohmmeters cnnot e used on live circuits, nd you cnnot set voltge source y putting short circuit cross it it cuses instnt dmge. The source must either e set to zero or removed entirely nd then replced y direct connection. For

19 Th Thévenin s Theorem Ω 200Ω COM R Th COM R R Th Th 0 V R R Th () () FG Mesuring R Th with n ohmmeter: () ctul network; () Thévenin equivlent. the current source, the open-circuit condition must e clerly estlished; otherwise, the mesured resistnce will e incorrect. For most situtions, it is usully est to remove the sources nd replce them y the pproprite equivlent. Using Potentiometer f we use potentiometer to mesure the Thévenin resistnce, the sources cn e left s is. For this reson lone, this pproch is one of the more populr. n Fig. 9.62(), potentiometer hs een connected cross the output terminls of the network to estlish the condition ppering in Fig. 9.62() for the Thévenin equivlent. f the resistnce of the potentiometer is now djusted so tht the voltge cross the potentiometer is one-hlf the mesured Thévenin voltge, the Thévenin resistnce must mtch tht of the potentiometer. Recll tht for series circuit, the pplied voltge will divide eqully cross two equl series resistors. f the potentiometer is then disconnected nd the resistnce mesured with n ohmmeter s shown in Fig. 9.62(c), the ohmmeter displys the Thévenin resistnce of the network. n generl, therefore, the Thévenin resistnce cn e mesured y pplying potentiometer to the output terminls nd vrying the resistnce until the output voltge is one-hlf the mesured Thévenin voltge. The resistnce of the potentiometer is the Thévenin resistnce for the network. Using the Short-Circuit Current The Thévenin resistnce cn lso e determined y plcing short circuit cross the output terminls nd finding the current through the short circuit. Since mmeters idelly hve zero internl ohms etween their terminls, hooking up n mmeter s shown in Fig. 9.63() hs the effect of oth hooking up short circuit cross the terminls nd mesuring the resulting current. The sme mmeter ws connected cross the Thévenin equivlent circuit in Fig. 9.63(). On prcticl level, it is ssumed, of course, tht the internl resistnce of the mmeter is pproximtely zero ohms in comprison to the other resistors of the network. t is lso importnt to e sure tht the resulting current does not exceed the mximum current for the chosen mmeter scle.

20 378 Network Theorems Th 20V V V COM V COM R Th 8 A 1 3 Th 2 12 V Th 2.25 V Th 4.5 V R Th () () Ω COM (c) FG Using potentiometer to determine R Th : () ctul network; () Thévenin equivlent; (c) mesuring R Th A 20A A COM R Th A COM A 3 sc Th 4.5 V sc Th 2.4 A R Th 12 V () () FG Determining R Th using the short-circuit current: () ctul network; () Thévenin equivlent.

21 Th Norton s Theorem 379 n Fig. 9.63(), since the short-circuit current is sc Th R Th the Thévenin resistnce cn e determined y R Th Th sc n generl, therefore, the Thévenin resistnce cn e determined y hooking up n mmeter cross the output terminls to mesure the short-circuit current nd then using the open-circuit voltge to clculte the Thévenin resistnce in the following mnner: R Th V oc sc (9.1) As result, we hve three wys to mesure the Thévenin resistnce of configurtion. Becuse of the concern out setting the sources to zero in the first procedure nd the concern out current levels in the lst, the second method is often chosen. 9.4 NORTON S THORM n Section 8.2, we lerned tht every voltge source with series internl resistnce hs current source equivlent. The current source equivlent cn e determined y Norton s theorem (Fig. 9.64). t cn lso e found through the conversions of Section 8.2. The theorem sttes the following: Any two-terminl liner ilterl dc network cn e replced y n equivlent circuit consisting of current source nd prllel resistor, s shown in Fig N R N FG Norton equivlent circuit. The discussion of Thévenin s theorem with respect to the equivlent circuit cn lso e pplied to the Norton equivlent circuit. The steps leding to the proper vlues of N nd R N re now listed. Norton s Theorem Procedure Preliminry: 1. Remove tht portion of the network cross which the Norton equivlent circuit is found. 2. Mrk the terminls of the remining two-terminl network. FG dwrd L. Norton. Reprinted with the permission of Lucent Technologies, nc./bell Ls. Americn (Rocklnd, Mine; Summit, New Jersey) lectricl ngineer, Scientist, nventor Deprtment Hed: Bell Lortories Fellow: Acousticl Society nd nstitute of Rdio ngineers Although interested primrily in communictions circuit theory nd the trnsmission of dt t high speeds over telephone lines, dwrd L. Norton is est rememered for development of the dul of Thévenin equivlent circuit, currently referred to s Norton s equivlent circuit. n fct, Norton nd his ssocites t AT&T in the erly 1920s re recognized s eing mong the first to perform work pplying Thévenin s equivlent circuit nd referring to this concept simply s Thévenin s theorem. n 1926, he proposed the equivlent circuit using current source nd prllel resistor to ssist in the design of recording instrumenttion tht ws primrily current driven. He egn his telephone creer in 1922 with the Western lectric Compny s ngineering Deprtment, which lter ecme Bell Lortories. His res of ctive reserch included network theory, cousticl systems, electromgnetic pprtus, nd dt trnsmission. A grdute of MT nd Columi University, he held nineteen ptents on his work.

22 380 Network Theorems Th R Th R N Th N R N N Th R Th R N R Th FG Converting etween Thévenin nd Norton equivlent circuits. 3 9 V 9 V FG xmple FG dentifying the terminls of prticulr interest for the network in Fig R N FG Determining R N for the network in Fig N N 3 9 V V 2 Short circuited 2 0 Short FG Determining N for the network in Fig N R N : 3. Clculte R N y first setting ll sources to zero (voltge sources re replced with short circuits nd current sources with open circuits) nd then finding the resultnt resistnce etween the two mrked terminls. (f the internl resistnce of the voltge nd/or current sources is included in the originl network, it must remin when the sources re set to zero.) Since R N R Th, the procedure nd vlue otined using the pproch descried for Thévenin s theorem will determine the proper vlue of R N. N : 4. Clculte N y first returning ll sources to their originl position nd then finding the short-circuit current etween the mrked terminls. t is the sme current tht would e mesured y n mmeter plced etween the mrked terminls. Conclusion: 5. Drw the Norton equivlent circuit with the portion of the circuit previously removed replced etween the terminls of the equivlent circuit. The Norton nd Thévenin equivlent circuits cn lso e found from ech other y using the source trnsformtion discussed erlier in this chpter nd reproduced in Fig XAMPL 9.12 Find the Norton equivlent circuit for the network in the shded re in Fig Solution: Steps 1 nd 2: See Fig Step 3: See Fig. 9.69, nd (3 Ω)(6 Ω) R N } 3 Ω } 6 Ω 3 Ω 6 Ω 18 Ω 2 Ω 9 Step 4: See Fig. 9.70, which clerly indictes tht the short-circuit connection etween terminls nd is in prllel with nd elimintes its effect. N is therefore the sme s through, nd the full ttery voltge ppers cross since Therefore, V 2 2 (0)6 Ω 0 V N 9 V 3 Ω 3 A Step 5: See Fig This circuit is the sme s the first one considered in the development of Thévenin s theorem. A simple conversion indictes tht the Thévenin circuits re, in fct, the sme (Fig. 9.72).

23 Th Norton s Theorem 381 N 3 A R N 2 N 3 A R N 2 R Th R N 2 Th N R N (3 A)(2 ) 6 V FG Sustituting the Norton equivlent circuit for the network externl to the resistor in Fig FG Converting the Norton equivlent circuit in Fig to Thévenin equivlent circuit. XAMPL 9.13 Find the Norton equivlent circuit for the network externl to the 9 Ω resistor in Fig Solution: Steps 1 nd 2: See Fig A 9 10 A FG xmple FG dentifying the terminls of prticulr interest for the network in Fig Step 3: See Fig. 9.75, nd R N 5 Ω 4 Ω 9 Ω Step 4: As shown in Fig. 9.76, the Norton current is the sme s the current through the 4 Ω resistor. Applying the current divider rule gives N Step 5: See Fig (5 Ω)(10 A) 5 Ω 4 Ω 50 A A 5 R N FG Determining R N for the network in Fig A R N 1 10 A 5 N 5.56 A R N 9 9 FG Determining N for the network in Fig N FG Sustituting the Norton equivlent circuit for the network externl to the resistor in Fig

24 382 Network Theorems Th XAMPL 9.14 (Two sources) Find the Norton equivlent circuit for the portion of the network to the left of - in Fig V 8 A 9 8 A 1 7 V 2 12 V FG xmple R 4 10 FG dentifying the terminls of prticulr interest for the network in Fig R N FG Determining R N for the network in Fig N 7 V Short circuited FG Determining the contriution to N from the voltge source 1. Short circuited N 8 A N N N N N FG Determining the contriution to N from the current source. Solution: Steps 1 nd 2: See Fig Step 3: See Fig. 9.80, nd (4 Ω)(6 Ω) R N } 4 Ω } 6 Ω 4 Ω 6 Ω 24 Ω 2.4 Ω 10 Step 4: (Using superposition) For the 7 V ttery (Fig. 9.81), N 1 7 V 4 Ω 1.75 A For the 8 A source (Fig. 9.82), we find tht oth nd hve een short circuited y the direct connection etween nd, nd N 8 A The result is N N - N 8 A A 6.25 A Step 5: See Fig N 6.25 A R N V R 4 10 FG Sustituting the Norton equivlent circuit for the network to the left of in Fig xperimentl Procedure The Norton current is mesured in the sme wy s descried for the short-circuit current ( sc ) for the Thévenin network. Since the Norton nd Thévenin resistnces re the sme, the sme procedures cn e followed s descried for the Thévenin network.

25 Th Mximum Power Trnsfer Theorem MAXMUM POWR TRANSFR THORM When designing circuit, it is often importnt to e le to nswer one of the following questions: Wht lod should e pplied to system to ensure tht the lod is receiving mximum power from the system? Conversely: For prticulr lod, wht conditions should e imposed on the source to ensure tht it will deliver the mximum power ville? ven if lod cnnot e set t the vlue tht would result in mximum power trnsfer, it is often helpful to hve some ide of the vlue tht will drw mximum power so tht you cn compre it to the lod t hnd. For instnce, if design clls for lod of 100 Ω, to ensure tht the lod receives mximum power, using resistor of 1 Ω or 1 kω results in power trnsfer tht is much less thn the mximum possile. However, using lod of 82 Ω or 120 Ω proly results in firly good level of power trnsfer. Fortuntely, the process of finding the lod tht will receive mximum power from prticulr system is quite strightforwrd due to the mximum power trnsfer theorem, which sttes the following: A lod will receive mximum power from network when its resistnce is exctly equl to the Thévenin resistnce of the network pplied to the lod. Tht is, R Th (9.2) n other words, for the Thévenin equivlent circuit in Fig. 9.84, when the lod is set equl to the Thévenin resistnce, the lod will receive mximum power from the network. Using Fig with R Th, we cn determine the mximum power delivered to the lod y first finding the current: Th R Th R Th L Th R Th Then we sustitute into the power eqution: Th R Th R Th Th 2R Th P L L L 2 Th (R 2R Th ) Th Th Th 4RTh 2 nd P Lmx 2 Th 4R Th (9.3) To demonstrte tht mximum power is indeed trnsferred to the lod under the conditions defined ove, consider the Thévenin equivlent circuit in Fig Before getting into detil, however, if you were to guess wht vlue of would result in mximum power trnsfer to, you might think tht the smller the vlue of, the etter it is ecuse the current reches mximum when it is squred in the power eqution. The prolem is, however, tht in the eqution P L 2 L, the lod resistnce is multiplier. As it gets smller, it forms smller product. Then gin, you might suggest lrger vlues of ecuse the output voltge increses, nd power is determined y P L V 2 L/. This time, however, the lod FG Defining the conditions for mximum power to lod using the Thévenin equivlent circuit. R Th P L 9 L Th 60 V V L FG Thévenin equivlent network to e used to vlidte the mximum power trnsfer theorem.

26 384 Network Theorems Th resistnce is in the denomintor of the eqution nd cuses the resulting power to decrese. A lnce must oviously e mde etween the lod resistnce nd the resulting current or voltge. The following discussion shows tht mximum power trnsfer occurs when the lod voltge nd current re one-hlf their mximum possile vlues. For the circuit in Fig. 9.85, the current through the lod is determined y L The voltge is determined y nd the power y V L Th R Th 60 V 9 Ω Th R Th (60 V) R Th P L L 60 V L 9 Ω 2 ( ) 3600 (9 Ω ) 2 f we tulte the three quntities versus rnge of vlues for from 0.1 Ω to 30 Ω, we otin the results ppering in Tle 9.1. Note in prticulr tht when is equl to the Thévenin resistnce of 9 Ω, the TABL 9.1 (Ω) P L (W) L (A) V L (V) ncrese 3.75 Decrese ncrese (R Th ) (Mximum) 3.33 ( mx /2) ( Th /2) Decrese 0.12 Decrese ncrese

27 Th Mximum Power Trnsfer Theorem 385 P L (W) P Lmx 100 P L R Th ( ) R Th FG P L versus for the network in Fig power hs mximum vlue of 100 W, the current is 3.33 A, or one-hlf its mximum vlue of 6.67 A (s would result with short circuit cross the output terminls), nd the voltge cross the lod is 30 V, or one-hlf its mximum vlue of 60 V (s would result with n open circuit cross its output terminls). As you cn see, there is no question tht mximum power is trnsferred to the lod when the lod equls the Thévenin vlue. The power to the lod versus the rnge of resistor vlues is provided in Fig Note in prticulr tht for vlues of lod resistnce less thn the Thévenin vlue, the chnge is drmtic s it pproches the pek vlue. However, for vlues greter thn the Thévenin vlue, the drop is gret del more grdul. This is importnt ecuse it tells us the following: f the lod pplied is less thn the Thévenin resistnce, the power to the lod will drop off rpidly s it gets smller. However, if the pplied lod is greter thn the Thévenin resistnce, the power to the lod will not drop off s rpidly s it increses. For instnce, the power to the lod is t lest 90 W for the rnge of out 4.5 Ω to 9 Ω elow the pek vlue, ut it is t lest the sme level for rnge of out 9 Ω to 18 Ω ove the pek vlue. The rnge elow the pek is 4.5 Ω, while the rnge ove the pek is lmost twice s much t 9 Ω. As mentioned ove, if mximum trnsfer conditions cnnot e estlished, t lest we now know from Fig tht ny resistnce reltively close to the Thévenin vlue results in strong trnsfer of power. More distnt vlues such s 1 Ω or 100 Ω result in much lower levels. t is prticulrly interesting to plot the power to the lod versus lod resistnce using log scle, s shown in Fig Logrithms will e discussed in detil in Chpter 22, ut for now notice tht the spcing

28 386 Network Theorems Th P (W) 100 P Lmx Liner scle P L ( ) R Th 9 Log scle FG P L versus for the network in Fig etween vlues of is not liner, ut the distnce, etween powers of ten (such s 0.1 nd 1, 1 nd 10, nd 10 nd 100) re ll equl. The dvntge of the log scle is tht wide resistnce rnge cn e plotted on reltively smll grph. Note in Fig tht smooth, ell-shped curve results tht is symmetricl out the Thévenin resistnce of 9 Ω. At 0.1 Ω, the power hs dropped to out the sme level s tht t 1000 Ω, nd t 1 Ω nd 100 Ω, the power hs dropped to the neighorhood of 30 W. Although ll of the ove discussion centers on the power to the lod, it is importnt to rememer the following: The totl power delivered y supply such s Th is sored y oth the Thévenin equivlent resistnce nd the lod resistnce. Any power delivered y the source tht does not get to the lod is lost to the Thévenin resistnce. Under mximum power conditions, only hlf the power delivered y the source gets to the lod. Now, tht sounds disstrous, ut rememer tht we re strting out with fixed Thévenin voltge nd resistnce, nd the ove simply tells us tht we must mke the two resistnce levels equl if we wnt mximum power to the lod. On n efficiency sis, we re working t only 50% level, ut we re content ecuse we re getting mximum power out of our system. The dc operting efficiency is defined s the rtio of the power delivered to the lod (P L ) to the power delivered y the source (P s ). Tht is, For the sitution where R Th, h% 2 L L 2 R T * 100% R T * 100% R Th 2R Th * 100% 1 2 h% P L P s * 100% (9.4) * 100% 50% R Th R Th R Th * 100%

29 Th Mximum Power Trnsfer Theorem η% 75 Approches 100% R Th η% k 100% ( ) FG fficiency of opertion versus incresing vlues of. For the circuit in Fig. 9.85, if we plot the efficiency of opertion versus lod resistnce, we otin the plot in Fig. 9.88, which clerly shows tht the efficiency continues to rise to 100% level s gets lrger. Note in prticulr tht the efficiency is 50% when R Th. To ensure tht you completely understnd the effect of the mximum power trnsfer theorem nd the efficiency criteri, consider the circuit in Fig. 9.89, where the lod resistnce is set t 100 Ω nd the power to the Thévenin resistnce nd to the lod re clculted s follows: L Th R Th 60 V 9 Ω 100 Ω 60 V 109 Ω ma with P RTh 2 LR Th (550.5 ma) 2 (9 Ω) 2.73 W nd P L 2 L (550.5 ma) 2 (100 Ω) 30.3 W The results clerly show tht most of the power supplied y the ttery is getting to the lod desirle ttriute on n efficiency sis. However, the power getting to the lod is only 30.3 W compred to the 100 W otined under mximum power conditions. n generl, therefore, the following guidelines pply: f efficiency is the overriding fctor, then the lod should e much lrger thn the internl resistnce of the supply. f mximum power trnsfer is desired nd efficiency less of concern, then the conditions dictted y the mximum power trnsfer theorem should e pplied. A reltively low efficiency of 50% cn e tolerted in situtions where power levels re reltively low, such s in wide vriety of electronic systems, where mximum power trnsfer for the given system is usully more importnt. However, when lrge power levels re involved, such s t generting plnts, efficiencies of 50% cnnot e tolerted. n fct, gret del of expense nd reserch is dedicted to rising power generting nd trnsmission efficiencies few percentge points. Rising n efficiency level of 10 MkW power plnt from 94% to 95% ( 1% increse) cn sve 0.1 MkW, or 100 million wtts, of power n enormous sving. P Th 60 V Power flow P Th R Th FG xmining circuit with high efficiency ut reltively low level of power to the lod. P L

30 388 Network Theorems Th N R N R N FG Defining the conditions for mximum power to lod using the Norton equivlent circuit. n ll of the ove discussions, the effect of chnging the lod ws discussed for fixed Thévenin resistnce. Looking t the sitution from different viewpoint, we cn sy if the lod resistnce is fixed nd does not mtch the pplied Thévenin equivlent resistnce, then some effort should e mde (if possile) to redesign the system so tht the Thévenin equivlent resistnce is closer to the fixed pplied lod. n other words, if designer fces sitution where the lod resistnce is fixed, he or she should investigte whether the supply section should e replced or redesigned to crete closer mtch of resistnce levels to produce higher levels of power to the lod. For the Norton equivlent circuit in Fig. 9.90, mximum power will e delivered to the lod when R N (9.5) This result [q. (9.5)] will e used to its fullest dvntge in the nlysis of trnsistor networks, where the most frequently pplied trnsistor circuit model uses current source rther thn voltge source. For the Norton circuit in Fig. 9.90, P Lmx 2 NR N 4 (W) (9.6) XAMPL 9.15 A dc genertor, ttery, nd lortory supply re connected to resistive lod in Fig For ech, determine the vlue of for mximum power trnsfer to.. Under mximum power conditions, wht re the current level nd the power to the lod for ech configurtion? c. Wht is the efficiency of opertion for ech supply in prt ()? d. f lod of 1 kω were pplied to the lortory supply, wht would the power delivered to the lod e? Compre your nswer to the level of prt (). Wht is the level of efficiency? e. For ech supply, determine the vlue of for 75% efficiency. R int 2.5 R int 0.05 R int V 12 V 040 V () dc genertor () Bttery (c) Lortory supply FG xmple Solutions:. For the dc genertor, R Th R int 2.5 Ω

31 Th Mximum Power Trnsfer Theorem 389 For the 12 V cr ttery, For the dc lortory supply,. For the dc genertor, P Lmx R Th R int 0.05 Ω R Th R int 20 Ω 2 Th 4R Th For the 12 V cr ttery, P Lmx 2 Th 4R Th For the dc lortory supply, P Lmx 2 Th 4R Th 2 4R int 2 4R int 2 4R int (120 V)2 4(2.5 Ω) 1.44 kw (12 V)2 4(0.05 Ω) 720 W (40 V)2 4(20 Ω) 20 W c. They re ll operting under 50% efficiency level ecuse R Th. d. The power to the lod is determined s follows: nd L R int 40 V 20 Ω 1000 Ω 40 V 1020 Ω ma P L 2 L (39.22 ma) 2 (1000 Ω) 1.54 W The power level is significntly less thn the 20 W chieved in prt (). The efficiency level is h% P L P s * 100% 1.54 W s * 100% 1.54 W 1.57 W * 100% 98.09% 1.54 W (40 V)(39.22 ma) * 100% which is mrkedly higher thn chieved under mximum power conditions leit t the expense of the power level. e. For the dc genertor, h P o P s R Th (h in deciml form) nd h R Th h(r Th ) hr Th h (1 - h) hr Th nd hr Th 1 - h (9.7) For the ttery, 0.75(2.5 Ω) (0.05 Ω) Ω 0.15 Ω

32 390 Network Theorems Th For the lortory supply, 0.75(20 Ω) Ω XAMPL 9.16 The nlysis of trnsistor network resulted in the reduced equivlent in Fig ma R s 40 k FG xmple Find the lod resistnce tht will result in mximum power trnsfer to the lod, nd find the mximum power delivered.. f the lod were chnged to 68 kω, would you expect firly high level of power trnsfer to the lod sed on the results of prt ()? Wht would the new power level e? s your initil ssumption verified? c. f the lod were chnged to 8.2 kω, would you expect firly high level of power trnsfer to the lod sed on the results of prt ()? Wht would the new power level e? s your initil ssumption verified? Solutions:. Replcing the current source y n open-circuit equivlent results in R Th R s 40 kω Restoring the current source nd finding the open-circuit voltge t the output terminls results in Th V oc R s (10 ma)(40 kω) 400 V For mximum power trnsfer to the lod, with mximum power level of R Th 40 kω P Lmx 2 Th 4R Th (400 V)2 4(40 kω) 1 W. Yes, ecuse the 68 kω lod is greter (note Fig. 9.86) thn the 40 kω lod, ut reltively close in mgnitude. L Th R Th 400 V 40 kω 68 kω kω 3.7 ma P L 2 L (3.7 ma) 2 (68 kω) 0.93 W 48 V R s 3 1 Yes, the power level of 0.93 W compred to the 1 W level of prt () verifies the ssumption. c. No, 8.2 kω is quite it less (note Fig. 9.86) thn the 40 kω vlue. L Th R Th 400 V 40 kω 8.2 kω 400 V 48.2 kω P L 2 L (8.3 ma) 2 (8.2 kω) 0.57 W 8.3 ma Yes, the power level of 0.57 W compred to the 1 W level of prt () verifies the ssumption. dc supply FG dc supply with fixed 16 Ω lod (xmple 9.17). XAMPL 9.17 n Fig. 9.93, fixed lod of 16 Ω is pplied to 48 V supply with n internl resistnce of 36 Ω.

33 Th Mximum Power Trnsfer Theorem 391. For the conditions in Fig. 9.93, wht is the power delivered to the lod nd lost to the internl resistnce of the supply?. f the designer hs some control over the internl resistnce level of the supply, wht vlue should he or she mke it for mximum power to the lod? Wht is the mximum power to the lod? How does it compre to the level otined in prt ()? c. Without mking single clcultion, find the vlue tht would result in more power to the lod if the designer could chnge the internl resistnce to 22 Ω or 8.2 Ω. Verify your conclusion y clculting the power to the lod for ech vlue. Solutions:. L P Rs R s 48 V 36 Ω 16 Ω 48 V 52 Ω 2 LR s (923.1 ma) 2 (36 Ω) W P L 2 L (923.1 ma) 2 (16 Ω) W ma. Be creful here. The quick response is to mke the source resistnce R s equl to the lod resistnce to stisfy the criteri of the mximum power trnsfer theorem. However, this is totlly different type of prolem from wht ws exmined erlier in this section. f the lod is fixed, the smller the source resistnce R s, the more pplied voltge will rech the lod nd the less will e lost in the internl series resistor. n fct, the source resistnce should e mde s smll s possile. f zero ohms were possile for R s, the voltge cross the lod would e the full supply voltge, nd the power delivered to the lod would equl P L V2 L (48 V)2 16 Ω 144 W which is more thn 10 times the vlue with source resistnce of 36 Ω. c. Agin, forget the impct in Fig. 9.86: The smller the source resistnce, the greter is the power to the fixed 16 Ω lod. Therefore, the 8.2 Ω resistnce level results in higher power trnsfer to the lod thn the 22 Ω resistor. For R s 8.2 Ω nd nd L R s 48 V 8.2 Ω 16 Ω 48 V 24.2 Ω A P L 2 L (1.983 A) 2 (16 Ω) W For R s 22 Ω L R s 48 V 22 Ω 16 Ω 48 V 38 Ω A P L 2 L (1.263 A) 2 (16 Ω) W XAMPL 9.18 Given the network in Fig. 9.94, find the vlue of for mximum power to the lod, nd find the mximum power to the lod. Solution: The Thévenin resistnce is determined from Fig. 9.95: R Th 3 Ω 10 Ω 2 Ω 15 Ω 6 A FG xmple V R Th FG Determining R Th for the network externl to resistor in Fig

34 392 Network Theorems Th 6 A 6 A V 2 V 1 0 V V 6 A 0 2 V 3 0 V Th FG Determining Th for the network externl to resistor in Fig so tht nd R Th 15 Ω The Thévenin voltge is determined using Fig. 9.96, where V 1 V 3 0 V nd V 2 2 (6 A)(10 Ω) 60 V Applying Kirchhoff s voltge lw gives -V 2 - Th 0 Th V 2 60 V 68 V 128 V with the mximum power equl to P Lmx 2 Th 4R Th (128 V)2 4(15 Ω) W 9.6 MLLMAN S THORM Through the ppliction of Millmn s theorem, ny numer of prllel voltge sources cn e reduced to one. n Fig. 9.97, for exmple, the three voltge sources cn e reduced to one. This permits finding the current through or voltge cross without hving to pply method such s mesh nlysis, nodl nlysis, superposition, nd so on. The theorem cn est e descried y pplying it to the network in Fig Bsiclly, three steps re included in its ppliction. R eq eq FG Demonstrting the effect of pplying Millmn s theorem. Step 1: Convert ll voltge sources to current sources s outlined in Section 8.2. This is performed in Fig for the network in Fig G 1 G G 2 G G 3 G 3 ( 1 ( 2 ) ( 3 ) ) FG Converting ll the sources in Fig to current sources.

35 Th Millmn s Theorem 393 Step 2: Comine prllel current sources s descried in Section 8.2. The resulting network is shown in Fig. 9.99, where T nd G T G 1 G 2 G 3 Step 3: Convert the resulting current source to voltge source, nd the desired single-source network is otined, s shown in Fig n generl, Millmn s theorem sttes tht for ny numer of prllel voltge sources, eq T G T { 1 { 2 { 3 { g{ N G 1 G 2 G 3 g G N T G T FG Reducing ll the current sources in Fig to single current source. or eq { 1G 1 { 2 G 2 { 3 G 3 {g{ N G N G 1 G 2 G 3 g G N (9.8) The plus-nd-minus signs pper in q. (9.8) to include those cses where the sources my not e supplying energy in the sme direction. (Note xmple 9.19.) The equivlent resistnce is R eq 1 G T eq T G T R eq 1 G T 1 G 1 G 2 G 3 g G N (9.9) FG Converting the current source in Fig to voltge source. n terms of the resistnce vlues, eq { 1 { 2 { 3 { g{ N R N g 1 R N (9.10) 1 nd R eq g 1 R N (9.11) Becuse of the reltively few direct steps required, you my find it esier to pply ech step rther thn memorizing nd employing qs. (9.8) through (9.11). XAMPL 9.19 Using Millmn s theorem, find the current through nd voltge cross the resistor in Fig Solution: By q. (9.10), eq The minus sign is used for 2 > ecuse tht supply hs the opposite polrity of the other two. The chosen reference direction is therefore tht of 1 nd 3. The totl conductnce is unffected y the direction, nd V 3 16 V FG xmple V L 3 V L

36 394 Network Theorems Th eq R eq V 3 V L FG The result of pplying Millmn s theorem to the network in Fig L 10 V 5 Ω - 16 V 4 Ω 8 V 2 Ω eq 1 5 Ω 1 4 Ω 1 2 Ω 2 A 0.95 S 2.11 V 1 with R eq 1 5 Ω 1 4 Ω 1 2 Ω 2 A - 4 A 4 A 0.2 S 0.25 S 0.5 S S The resultnt source is shown in Fig , nd with L 1.05 Ω 2.11 V 1.05 Ω 3 Ω 2.11 V 4.05 Ω 0.52 A V L L (0.52 A)(3 Ω) 1.56 V V 2 10 V 2 XAMPL 9.20 Let us now consider the type of prolem encountered in the introduction to mesh nd nodl nlysis in Chpter 8. Mesh nlysis ws pplied to the network of Fig (xmple 8.14). Let us now use Millmn s theorem to find the current through the 2 Ω resistor nd compre the results. Solutions:. Let us first pply ech step nd, in the () solution, q. (9.10). Converting sources yields Fig Comining sources nd prllel conductnce rnches (Fig ) yields FG xmple T A 5 3 A 15 3 A 5 3 A 20 3 A G T G 1 G 2 1 S 1 6 S 6 6 S 1 6 S 7 6 S 1 5 A A 3 2 T 20 3 A G T 7 6 S 2 FG Converting the sources in Fig to current sources. FG Reducing the current sources in Fig to single source. R eq eq 7 V 2 FG Converting the current source in Fig to voltge source. Converting the current source to voltge source (Fig ), we otin eq T G T 20 3 A 7 6 S nd R eq 1 G T S (6)(20) (3)(7) V 40 7 V 6 7 Ω

37 Th Sustitution Theorem 395 so tht 2Ω eq R eq 40 7 V 6 7 Ω 2 Ω 40 7 V 6 7 Ω 14 7 Ω which grees with the result otined in xmple Let us now simply pply the proper eqution, q. (9.10): nd eq 5 V 1 Ω 10 V 6 Ω 1 1 Ω 1 6 Ω 1 R eq 1 1 Ω 1 6 Ω 30 V 6 Ω 10 V 6 Ω 6 6 Ω 1 6 Ω Ω 1 6 Ω which re the sme vlues otined ove S 40 V 20 Ω 2 A 40 7 V 6 7 Ω The dul of Millmn s theorem (Fig. 9.97) ppers in Fig t cn e shown tht eq nd R eq, s in Fig , re given y eq { 1 { 2 { 3 (9.12) nd R eq (9.13) The derivtion ppers s prolem t the end of the chpter eq R eq FG The dul effect of Millmn s theorem. 9.7 SUBSTTUTON THORM The sustitution theorem sttes the following: f the voltge cross nd the current through ny rnch of dc ilterl network re known, this rnch cn e replced y ny comintion of elements tht will mintin the sme voltge cross nd current through the chosen rnch. More simply, the theorem sttes tht for rnch equivlence, the terminl voltge nd current must e the sme. Consider the circuit in Fig , in which the voltge cross nd current through the rnch 30 V 3 A 12 V FG Demonstrting the effect of the sustitution theorem.

38 396 Network Theorems Th 3 A 3 A 12 V 3 A 12 V 2 12 V 6 V 2 A V FG quivlent rnches for the rnch - in Fig re determined. Through the use of the sustitution theorem, numer of rnches re shown in Fig Note tht for ech equivlent, the terminl voltge nd current re the sme. Also consider tht the response of the reminder of the circuit in Fig is unchnged y sustituting ny one of the equivlent rnches. As demonstrted y the single-source equivlents in Fig , known potentil difference nd current in network cn e replced y n idel voltge source nd current source, respectively. Understnd tht this theorem cnnot e used to solve networks with two or more sources tht re not in series or prllel. For it to e pplied, potentil difference or current vlue must e known or found using one of the techniques discussed erlier. One ppliction of the theorem is shown in Fig Note tht in the figure the known potentil difference V ws replced y voltge source, permitting the isoltion of the portion of the network including, R 4, nd R 5. Recll tht this ws siclly the pproch used in the nlysis of the ldder network s we worked our wy ck towrd the terminl resistnce R 5. V R 4 R 5 V R 4 R 5 FG Demonstrting the effect of knowing voltge t some point in complex network. The current source equivlence of the ove is shown in Fig , where known current is replced y n idel current source, permitting the isoltion of R 4 nd R 5. R 4 R 5 R 4 R 5 FG Demonstrting the effect of knowing current t some point in complex network.

39 Th Reciprocity Theorem 397 Recll from the discussion of ridge networks tht V 0 nd 0 were replced y short circuit nd n open circuit, respectively. This sustitution is very specific ppliction of the sustitution theorem. 9.8 RCPROCTY THORM The reciprocity theorem is pplicle only to single-source networks. t is, therefore, not theorem used in the nlysis of multisource networks descried thus fr. The theorem sttes the following: The current in ny rnch of network due to single voltge source nywhere else in the network will equl the current through the rnch in which the source ws originlly locted if the source is plced in the rnch in which the current ws originlly mesured. n other words, the loction of the voltge source nd the resulting current my e interchnged without chnge in current. The theorem requires tht the polrity of the voltge source hve the sme correspondence with the direction of the rnch current in ech position. () c d () c d FG Demonstrting the impct of the reciprocity theorem. n the representtive network in Fig (), the current due to the voltge source ws determined. f the position of ech is interchnged s shown in Fig (), the current will e the sme vlue s indicted. To demonstrte the vlidity of this sttement nd the theorem, consider the network in Fig , in which vlues for the elements of Fig () hve een ssigned. The totl resistnce is nd with R T } ( R 4 ) 12 Ω 6 Ω } (2 Ω 4 Ω) 12 Ω 6 Ω } 6 Ω 12 Ω 3 Ω 15 Ω s R T 45 V 15 Ω 3 A 3 A A For the network in Fig , which corresponds to tht in Fig (), we find R T R 4 } 4 Ω 2 Ω 12 Ω } 6 Ω 10 Ω nd s 45 V R T 10 Ω 4.5 A (6 Ω)(4.5 A) so tht 12 Ω 6 Ω 4.5 A 1.5 A 3 which grees with the ove. s 45 V 12 2 R 4 FG Finding the current due to source s R 4 R T 45 V FG nterchnging the loction of nd of Fig to demonstrte the vlidity of the reciprocity theorem.

40 398 Network Theorems Th The uniqueness nd power of this theorem cn est e demonstrted y considering complex, single-source network such s the one shown in Fig d c c d FG Demonstrting the power nd uniqueness of the reciprocity theorem k 6 V 2 4 k 10 V 6 k R k R Th FG Network to which PSpice is to e pplied to determine Th nd R Th. Th 9.9 COMPUTR ANALYSS Once you understnd the mechnics of pplying softwre pckge or lnguge, the opportunity to e cretive nd innovtive presents itself. Through yers of exposure nd tril-nd-error experiences, professionl progrmmers develop ctlog of innovtive techniques tht re not only functionl ut very interesting nd truly rtistic in nture. Now tht some of the sic opertions ssocited with PSpice hve een introduced, few innovtive mneuvers will e mde in the exmples to follow. PSpice Thévenin s Theorem The ppliction of Thévenin s theorem requires n interesting mneuver to determine the Thévenin resistnce. t is mneuver, however, tht hs ppliction eyond Thévenin s theorem whenever resistnce level is required. The network to e nlyzed ppers in Fig nd is the sme one nlyzed in xmple 9.10 (Fig. 9.48). Since PSpice is not set up to mesure resistnce levels directly, 1 A current source cn e pplied s shown in Fig , nd Ohm s lw cn e used to determine the mgnitude of the Thévenin resistnce in the following mnner: 0 R Th 0 ` V s V s ` ` s 1 A ` 0 V s 0 (9.14) n q. (9.14), since s 1A, the mgnitude of R Th in ohms is the sme s the mgnitude of the voltge V s (in volts) cross the current source. The result is tht when the voltge cross the current source is displyed, it cn e red s ohms rther thn volts. When PSpice is pplied, the network ppers s shown in Fig Flip the voltge source 1 nd the current source y right-clicking on the source nd choosing the Mirror Verticlly option. Set oth voltge sources to zero through the Disply Properties dilog ox otined y doule-clicking on the source symol. The result of the Bis Point simultion is 2 kv cross the current source. The Thévenin resistnce is therefore 2 kω etween the two terminls of the network to the left of the current source (to mtch the results of xmple 9.10). n totl, y

41 Th Computer Anlysis 399 FG Using PSpice to determine the Thévenin resistnce of network through the ppliction of 1 A current source. setting the voltge source to 0 V, we hve dictted tht the voltge is the sme t oth ends of the voltge source, replicting the effect of shortcircuit connection etween the two points. For the open-circuit Thévenin voltge etween the terminls of interest, the network must e constructed s shown in Fig The resistnce of 1 T ( 1 million MΩ) is considered lrge enough to represent n open circuit to permit n nlysis of the network using PSpice. PSpice does not recognize floting nodes nd genertes n error signl if connection is not mde from the top right node to ground. Both voltge sources re now set on their prescried vlues, nd simultion results in 3 V cross the 1 T resistor. The open-circuit Thévenin voltge is therefore 3 V, which grees with the solution in xmple Mximum Power Trnsfer The procedure for plotting quntity versus prmeter of the network is now introduced. n this cse, the output power versus vlues of lod resistnce is used to verify tht mximum power is delivered to the lod when its vlue equls the series Thévenin resistnce. A numer of new steps re introduced, ut keep in mind tht the method hs rod ppliction eyond Thévenin s theorem nd is therefore well worth the lerning process. The circuit to e nlyzed ppers in Fig The circuit is constructed in exctly the sme mnner s descried erlier except for the vlue of the lod resistnce. Begin the process y strting New Project leled PSpice 9-3, nd uild the circuit in Fig For the moment, do not set the vlue of the lod resistnce. The first step is to estlish the vlue of the lod resistnce s vrile since it will not e ssigned fixed vlue. Doule-click on the vlue of RL, which is initilly 1 kω, to otin the Disply Properties dilog

42 400 Network Theorems Th FG Using PSpice to determine the Thévenin voltge for network using very lrge resistnce vlue to represent the open-circuit condition etween the terminls of interest. ox. For Vlue, type in {Rvl} nd click in plce. The rckets (not prentheses) re required, ut the vrile does not hve to e clled Rvl it is the choice of the user. Next select the Plce prt key to otin the Plce Prt dilog ox. f you re not lredy in the Lirries list, choose Add Lirry nd dd SPCAL to the list. Select the SPCAL lirry nd scroll the Prt List until PARAM ppers. Select nd then Plce Prt to otin rectngulr ox next to the cursor on the screen. Select spot ner Rvl, nd deposit the rectngle. The result is PARAMTRS: s shown in Fig Next doule-click on PARAMTRS: to otin Property ditor dilog ox, which should hve SCHMATC1:PAG1 in the second column from the left. Now select the New Property option from the top list of choices. An Undo Wrning!! dilog ox will pper. Select Yes to continue. An Add New Property dilog ox will pper in which the Nme: is entered s Rvl nd the Vlue: s 1. Then OK nd the Undo Wrning!! dilog ox will pper gin (to relly e sure you wnt to do it!) nd the Yes selected gin. f you now move the position control t the ottom of the screen to the left (only slightly) you will see Rvl/1 s new column in the SCHMATC1:PAG1 listing. Now select Rvl/1 y clicking on Rvl to surround Rvl y dshed line nd dd lck ckground round the 1. Choose Disply to produce the Disply Properties dilog ox, nd select Nme nd Vlue followed y OK. Then exit the Property ditor dilog ox y selecting PAG1* in the row ove the schemtic to disply the screen in Fig Note tht now the first vlue (1 Ω) of Rvl is displyed.

43 Th Computer Anlysis 401 FG Using PSpice to plot the power to for rnge of vlues for. We re now redy to set up the simultion process. Select the New Simultion Profile key to open the New Simultion dilog ox. nter DC Sweep under Nme followed y Crete. A linking Simultion Setting-Rvl dilog ox will then pper t the ottom of the screen tht cn e selected so it will pper in full size on the screen. After selecting Anlysis, select DC Sweep under the Anlysis type heding. Then leve the Primry Sweep under the Options heding, nd select Glol prmeter under the Sweep vrile. The Prmeter nme should then e entered s Rvl. For the Sweep type, the Strt vlue should e 1 Ω; ut if we use 1 Ω, the curve to e generted will strt t 1 Ω, leving lnk from 0 to 1 Ω. The curve will look incomplete. To solve this prolem, select Ω s the Strt vlue (very close to 0 Ω) with n ncrement of Ω. nter the nd vlue s 31 Ω to ensure clcultion t Ω. f we used 30 Ω s the end vlue, the lst clcultion would e t Ω since Ω 1 Ω Ω, which is eyond the rnge of 30 Ω. The vlues of RL will therefore e Ω, Ω, Ω, c Ω, Ω, nd so on, lthough the plot will look s if the vlues were 0 Ω, 1 Ω, 2 Ω, 29 Ω, 30 Ω, nd so on. Click OK, nd select the Run PSpice key, which will ctivte the nlysis nd result in linking yellow screen t the ottom of the window. Select nd the plot will pper s shown in Fig Note tht there re no plots on the grph, nd tht the grph extends to 40 Ω rther thn 30 Ω s desired. t did not respond with plot of power versus RL ecuse we hve not defined the plot of interest for the computer. To do this, select the Add Trce key (the key tht hs red curve peking in the middle of the plot) or Trce-Add Trce from the top menu r. ither choice results in the Add Trces dilog ox.

44 402 Network Theorems Th FG Plot resulting from the dc sweep of for the network in Fig efore defining the prmeters to e displyed. FG A plot of the power delivered to in Fig for rnge of vlues for extending from 0 Ω to 30 Ω. The most importnt region of this dilog ox is the Trce xpression listing t the ottom. The desired trce cn e typed in directly, or the quntities of interest cn e chosen from the list of Simultion Output Vriles nd deposited in the Trce xpression listing. To find the power to RL for the chosen rnge of vlues for RL, select W(RL) in the listing; it then ppers s the Trce xpression. Click OK, nd the plot in Fig ppers. Originlly, the plot extended from 0 Ω to 40 Ω. We reduced the rnge to 0 Ω to 31 Ω y selecting Plot-Axis Settings-X Axis-User Defined 0 to 31-OK. Select the Toggle cursor key (which hs n rrow set in lue ckground) t the top of the dilog ox nd seven options will open to the right of the key tht include Cursor Pek, Cursor Trough, Cursor Slope, Cursor Min, Cursor Mx, Cursor Point, nd Cursor Serch. Select Cursor Mx (the fifth one over), nd the Proe Cursor dilog ox on the screen will revel where the pek occurred nd the power

45 Th Computer Anlysis 403 level t tht point. n the Proe Cursor dilog ox the first column titled Trce Color revels the color of the trce on the W(RL) plot. This ecomes importnt when there is more thn one trce on the screen. The next column titled Trce Nme is leled X vlues nd gives the loction on the horizontl xis for the point of interest Y1. Note tht it is pproximtely 9 Ω to mtch the point of mximum power to the lod RL. The next line revels tht the power W(RL) is 100W t 9 Ω. There re other options ville in the Proe Cursor dilog ox y scrolling to the right. t is possile tht the Proe Cursor ox will not pper s seprte entity on the screen ut simply s n ttchment t the ottom of the response screen. t cn e isolted y deleting the dilog oxes to the right nd left nd then right-clicking the Toggle Cursor key. By simply unchecking the Allow Docking option the Proe Cursor dilog ox will pper s seprte entity s otined ove. t cn then e moved to ny loction on the screen. A second cursor cn e generted y rightclicking the mouse on the Cursor Point option nd moving it to resistnce of 30 Ω. The result is power level of W, s shown on the plot. Notice lso tht the plot generted ppers s listing t the ottom left of the screen s W(RL). Multisim Superposition Let us now pply superposition to the network in Fig , which ppered erlier s Fig. 9.2 in xmple 9.1, to permit comprison of resulting solutions. The current through is to e determined. With the use of methods descried in erlier chpters for the ppliction of Multisim, the network in Fig results, which 36 V A FG Applying Multisim to determine the current 2 using superposition. FG Using Multisim to determine the contriution of the 36 V voltge source to the current through.

46 404 Network Theorems Th llows us to determine the effect of the 36 V voltge source. Note in Fig tht oth the voltge source nd current source re present even though we re finding the contriution due solely to the voltge source. Otin the voltge source y selecting the Plce Source option t the top of the left toolr to open the Select Component dilog ox. Then select POWR_SOURCS followed y DC_POWR s descried in erlier chpters. You cn lso otin the current source from the sme dilog ox y selecting SGNAL_CURRNT under Fmily followed y DC_CURRNT under Component. The current source cn e flipped verticlly y right-clicking the source nd selecting Flip Verticl. Set the current source to zero y left-clicking the source twice to otin the DC_CURRNT dilog ox. After choosing Vlue, set Current() to 0 A. Following simultion, the results pper s in Fig The current through the 6 Ω resistor is 2 A due solely to the 36 V voltge source. The positive vlue for the 2 A reding revels tht the current due to the 36 V source is down through resistor. For the effects of the current source, the voltge source is set to 0 V s shown in Fig The resulting current is then 6 A through, with the sme direction s the contriution due to the voltge source. The resulting current for the resistor is the sum of the two currents: T 2 A 6 A 8 A, s determined in xmple 9.1. FG Using Multisim to determine the contriution of the 9 A current source to the current through.