Battery-aware Static Scheduling for Distributed Real-time Embedded Systems
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- Dana Newton
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1 Battery-aware Statc Schedulng for Dstrbuted Real-tme Embedded Systems Jong Luo and Nraj K. Jha Deartment of Electrcal Engneerng Prnceton Unversty, Prnceton, NJ, {jongluo, Abstr Ths aer addresses battery-aware statc schedulng n batteryowered dstrbuted real-tme embedded systems. As suggested by revous work, reducng the dscharge current level and shang ts dstrbuton are essental for extendng the battery lfesan. We roose two battery-aware statc schedulng schemes. The frst one otmzes the dscharge ower rofle n order to maxmze the utlzaton of the battery caacty. The second one targets dstrbuted systems comosed of voltage-scalable rocessng elements (PEs). It erforms varable-voltage schedulng va effcent slack tme re-allocaton, whch hels reduce the average dscharge ower consumton as well as flatten the dscharge ower rofle. Both schemes guarantee the hard real-tme constrants and recedence relatonshs n the real-tme dstrbuted embedded system secfcaton. Based on revous work, we develo a battery lfesan evaluaton metrc whch s aware of the shae of the dscharge ower rofle. Our exermental results show that the battery lfesan can be ncreased by u to 29% by otmzng the dscharge ower fle alone. Our varable-voltage scheme ncreases the battery lfesan by u to 76% over the non-voltage-scalable scheme and by u to 56% over the varable-voltage scheme wthout slack-tme reallocaton. 1. Introducton Battery-owered ortable systems have been wdely used n many alcatons, such as moble comutng, wreless communcatons, nformaton alances, wearable comutng as well as varous ndustral and mltary alcatons. As systems become more comlex and ncororate more functonalty, they become more ower-hungry. Thus, reducng energy consumton and extendng battery lfesan have become a crtcal asect of desgnng battery-owered systems. Hgh-erformance battery-owered dstrbuted embedded systems are generally comosed of a network of heterogeneous rocessng elements (PEs). The PEs can be general-urose rocessors, alcaton-secfc ntegrated crcuts, feld rogrammable gate arrays or analog crcuts. The nut secfcatons of such systems are tycally n the form of task grahs. A task grah s a drected acyclc grah n whch each node s assocated wth a task and each edge s assocated wth the amount of data that must be transferred between the two Acknowledgment: Ths work was suorted by DARPA under contr no. DAAB07-00-C-L516. Permsson to make dgtal or hard coes of all or art of ths work for ersonal or classroom use s granted wthout fee rovded that coes are not made or dstrbuted for roft or commercal advantage and that coes bear ths notce and the full ctaton on the frst age. To coy otherwse, or reublsh, to ost on servers or to redstrbute to lsts, requres ror secfc ermsson and/or a fee. DAC 2001, June 18-22, 2001, Las Vegas, Nevada, USA. Coyrght 2001 ACM /01/0006 $5.00. connected tasks. The erod assocated wth a task grah ndcates the tme nterval after whch t executes agan. A hard deadlne, the tme by whch the task assocated wth the node must comlete ts executon, exsts for every snk node and some ntermedate nodes. All the hard deadlnes must be met. The embedded system can be a mult-rate system,.e., t may contan multle tasks grahs wth dfferent erods. The goal of real-tme schedulng algorthms s to guarantee the deadlnes of erodc task grahs whle honorng the recedence relatonsh among tasks. Due to the mortance of energy n battery-owered systems, the schedulng scheme should be energy -aware and battery-effcent as well. Many system-level ower otmzaton technques have been resented n the lterature. The reresentatve work ncludes voltage scalng [9,10,11], whch refers to varyng the seed of a rocessor by changng the clock frequency along wth the suly voltage, and ower management, whch refers to the use of owerdown modes when a rocessor or devce s dle n order to reduce ower consumton [7,8]. Instead of focusng on reducng ower consumton alone, researchers have begun to study the battery behavor and the effect of the battery dscharge attern on the battery caacty as well [1,2,5,6]. Ths aer addresses the ssue of battery-aware varable-voltage schedulng for mult-rate real-tme dstrbuted embedded systems. The goal of our schedulng algorthm s to extend the battery lfesan whle meetng the hard real-tme constrants and recedence relatonshs among tasks. The schedulng algorthm s able to vary the voltage of PEs that are voltage scalable n order to reduce the ower consumton, and manage the ower rofle of the whole system n order to acheve mroved battery effcency. Our work s motvated by the deas resented n [2,5], whch suggest that reducng the dscharge current level and shang ts dstrbuton are essental for reducng the battery caacty loss. The reducton of the average dscharge current level s acheved through voltage scalng and PE shutoff. The otmzaton of the dscharge current rofle s acheved through a seres of schedule transformatons startng from an ntally vald schedule. The schedule transformatons am to shae the dscharge current rofle to mrove the utlzaton of the deal battery caacty, whle mantanng the valdty of the orgnal schedule. Our work has several contrbutons: (1) We smultaneously address the ssues of otmzng the overall ower consumton rofle of the dstrbuted embedded system to mrove the battery effcency, and guaranteeng the hard real-tme constrants and recedence relatonshs whch are tradtonal tasks n real-tme dstrbuted schedulng. Ths has not been done n any revous work. (2) For dstrbuted embedded systems consstng of voltagescalable PEs, we erform varable-voltage schedulng va effcent slack tme allocaton, whch hels reduce the average dscharge ower consumton as well as flatten the dscharge ower rofle, whle stll guaranteeng the hard real-tme constrants and recedence relatonshs. Therefore, the scheme s very owerful n maxmzng the battery lfesan. 2. Battery Behavor Models The caacty of a battery cell can be defned n terms of amerehours or watt-hours [4]. Many fors nfluence the erformance
2 charerstcs and the ual caacty that can be drawn from the battery. Normally, the battery caacty decreases as the dscharge current ncreases. Fg. 1 shows the curve of battery caacty versus the dscharge current,.e., the dscharge rate. The load current s reresented as the value normalzed to the battery's rated caacty. The work n [5] exlores the f that battery effcency s nfluenced by the average dscharge current as well as the average dscharge current rofle. They defne the ual ower drawn out of the battery as = ( V * I / c( I))* P( I) di (1) where I s the average dscharge current for some erod of tme. P (I) s the robablty densty functon of I. V s the dscharge voltage and s assumed to be fxed. c(i) s the utlzaton for, whch s the rato of the battery caacty (n terms of watt-hours) at dscharge current I to the deal battery caacty CPA 0. Hence, t can reresent the battery effcency comared to the deal condton. The duraton of battery servce lfe should equal CPA 0 dvded by. Ths work shows that even under the constrant that the average ower consumton s the same,.e., ave = V * Iave = V * I * P( I) di s constant, dfferent dscharge ower: current dstrbutons stll lead to dfferent. The maxmum battery lfe s acheved when the varance of the dscharge current (1) (1) (5) dstrbuton s mnmzed. Ther results are suorted by exermental study based on PSPICE smulatons. Rated caacty, % (5) (1) (1) t8(5) 100 Fg. 3 Orgnal vald schedule for Examle 1 90 ower: o 10 C o 20 C o 20 C Dscharge rate (C rate) Fg. 1 Performance of C / LNO2 Lthum-Ion AA-sze cell at varous temeratures and dscharge rates The work n [2] studes the effect of ntermttent dscharges on the caacty of Lthum rechargeable batteres and demonstrates that eak ower redcts battery caacty better than average ower. The work n [6] emloys a cycle-accurate battery model and evaluates the nstantaneous battery caacty on a cycle-bycycle bass. The battery recovery effect n communcaton devces s studed n [1]. 3. Motvatonal Examles Ths secton resents two examles that motvate our work n ths aer. We use Equaton (1) to evaluate the ual ower drawn from the battery. If the battery cell voltage s assumed to be nearly constant, the relatonsh between the battery caacty and the dscharge current would hold for dscharge ower as well. In ths secton, we use Peukert s formula [4], an emrcal equaton to evaluate the relatonsh between the battery caacty and the dscharge current α c ( I) = k / I (2) where k and α are constants. We assume α = Examle 1: Fg. 2 gves an embedded system secfcaton consstng of three task grahs. Assume for smlcty that all these have a erod of 16.0 seconds. The embedded dstrbuted system mlementng the task grahs conssts of two PEs, PE1 and PE2, connected by a bus. Fgs. 3 and 4 gve two feasble schedules for one erod. The worst-case executon tme of,,,,, and t8 on ther allocated PE are all 4 seconds, whle the worst-case executon tme of on ts allocated PE s 2 seconds. The executon tme of nter-pe communcaton edge on the bus s also 2 seconds. The average ower consumton number for each scheduled event s shown n brackets n the schedule, e.g., for t s 5 unts. Based on the tradtonal assumton n dstrbuted comutng, we assume ntra-pe communcatons,, e3, e4 and e5, all take zero tme. We assume both PE1 and PE2 are buffered. e3 e4 Deadlne: 16 Deadlne: 16 Deadlne: 16 e5 Perod: 16 t8 Deadlne: 16 Fg. 2 Task grahs for Examle (1) (5) (1) (1) t8(5) Fg. 4 New vald schedule for Examle 1 (5) (1) For smlcty, we assume that the ower consumton n the shut-off state (shaded arts n the schedule) s zero and that there s no overhead n enterng and leavng ths state. Note, that our algorthm, whch s resented later, does not need to make the above assumtons. The overall dscharge ower of the system s the summaton of all the ower consumtons n all the PEs and buses. For the schedule n Fg. 3, the dscharge ower dstrbuton s aroxmately P ( = 10) = 1/ 2 and P ( = 2) = 1/ 2, whle for the schedule n Fg. 4, the dscharge ower dstrbuton s P ( = 6) = 1. Usng Equatons (1) and (2), the ual ower drawn from the battery n the schedule n Fg. 3 s 17.23*c, whle the value for the schedule n Fg. 4 s 14.70*c, where c s some constant. The latter schedule results n a 15% reducton n the ual ower drawn out of the battery, and corresondngly a 17% mrovement n the battery lfesan. Examle 2 below s used to llustrate the effect of voltage scalng n real-tme dstrbuted embedded systems comosed of voltage-scalable PEs. The relatonshs among clock erod, suly voltage and ower consumton, whch s used n ths examle to calculate ower consumton, are resented next. The rocessor clock erod, T, can be exressed n terms of the suly voltage, V dd, and threshold voltage, V t, as follows: T = kvdd /( Vdd Vt )2 (3)
3 where k s a constant. We assume V t = 0.8V. The rocessor ower,, can be exressed n terms of the frequency, f, swtched caactance, N, and the suly voltage, V dd, as: 1 2 = fnv 2 dd (4) Examle 2: Consder the task grahs shown n Fg. 5. Fg. 6(a) gves an as-soon-as-ossble feasble statc schedule on a dstrbuted system consstng of PEs, PE1 and PE2, connected by a bus. Assume a ower suly voltage of 3.3V. The worst-case executon tme of,,, and on ther allocated PE are all 0.2 seconds. The worst-case executon tme of and on ther allocated PE are both 0.3 seconds. The executon tme of nter-pe communcaton edges and are both 0.1 seconds. We assume the average ower consumton for each task s 1 unt, whle the average ower consumton for each nter-pe communcaton edge s 0.2 unt. Fg. 7(a) gves a new feasble schedule after schedule slots nterchangng and shftng of the schedule n Fg. 6(a). Deadlne: 1.2 Perod: 1.2 Deadlne: 0.5 Deadlne: 1.2 Deadlne: 1.2 Fg. 5 Task grahs for Examle a. Orgnal feasble schedule b. Corresondng varable-voltage schedule Fg. 6 Orgnal schedule and the corresondng varablevoltage schedule for Examle b. Corresondng varable- b. Corresondng varable-voltage schedule Fg. 7 New Schedule after schedule slot shftng and swang and the corresondng varable-voltage schedule Fg. 6 Orgnal schedule and the corresondng varable-voltage a. Orgnal feasble schedule a. New feasble schedule We erform voltage scalng on these two schedules by extendng the executon tme of the tasks to ther latest fnsh tme. The new schedules are shown n Fg. 6(b) and Fg. 7(b), resectvely. For examle, n Fg. 6(a), s scheduled at tme nstant 0.2. Snce t can fnsh as late as tme nstant 0.6, the seed of PE1 can be scaled down by a rato of ( ) / 0.3 for. Corresondngly, the suly voltage can be scaled down from 3.3V to 2.8V, extendng the ual runnng length of from 0.3 to 0.4. In Fg. 6(b), the workng voltages for task,,,,, and are 3.3, 2.8, 3,3, 3.3, 1.8, 2.8, and 2.7V, resectvely. In Fg. 7(b), the workng voltage for tasks,, and are all 3V, whle for task, and are all 2.3V. The erformance metrcs for the dfferent schedules, ncludng the average ower consumton and battery servce lfe evaluated by Equaton (2) usng average ower consumton, are shown n Table 1. In Table 1, c s some constant. Table 1: Performance charerstcs of dfferent schedules Schedule Overall average ower consumton of the system Servce lfe evaluated based on average ower consumton Fg. 6(a) * c Fg. 6(b) * c Fg. 7(b) * c Comared to the schedule n Fg. 6(a), the schedule n Fg. 6(b) results n a 23% reducton n average system ower consumton and a 50% mrovement n battery servce lfe evaluated based on average ower consumton. For the schedule n Fg. 7(b), there s a 30% reducton n the average system ower consumton and a 71% mrovement n battery servce lfe evaluated based on average ower consumton, comared to the schedule n Fg. 6(a). Ths examle shows, not sursngly, that voltage scalng reduces system ower consumton and ncreases the battery lfesan. Moreover, a more effcent voltage scalng scheme can lead to better results, as the dfference between Fg. 6(b) and Fg. 7(b) shows. 4. Statc Resource Allocaton, Assgnment and Schedulng The statc resource allocaton, task/communcaton assgnment and schedulng algorthms we use are from a system synthess tool resented n [12]. It uses a slack-based lst schedulng algorthm to generate statc PE and communcaton lnk schedules for each task and communcaton event along the hyererod, whch s the least common multle of all the task grah erods n a mult-rate system secfcaton. It s well known that there exsts a feasble schedule for the erodc task grahs f and only f there exsts a feasble schedule for the hyererod [15]. A slack-based lst schedulng scheme s used n the nner-loo of system synthess n order to generate a cost-effcent dstrbuted archtecture and a feasble schedule. The schedulng scheme s not otmzed for battery-aware ower consumton. We modfy the statc schedule n a ost-rocessng stage through a seres of schedule transformatons, whch we dscuss n Sectons 5 and Battery-aware Schedulng Scheme In ths secton, we resent a battery-effcent schedulng scheme whch ams to otmze the system dscharge ower rofle. Heurstcs to otmze the battery effcency, as suggested n Secton 3, are based on mnmzaton of the eak ower consumton and reducton of the varance of the dscharge current rofle. The goal of our schedulng scheme s to reduce the overall average of the ual ower drawn out of the battery, s evaluated by, whch
4 1 hyererod ( t) = dt hyererod 0 c ( t) where (t) s the ower consumton at tme t, and c (t) s the battery utlzaton for evaluated at tme t. Note that Equaton (5) s just a varaton of Equaton (1). (t) s the summaton of all the ower consumtons n all the PEs and buses, or any other system comonent whch draws ower from the battery. Thus, we assume ( t) = ( t). Other comonents of system ower ( all PEs all buses) consumton can be easly ncororated as well, whch normally can be reresented as a fxed contrbuton. For each task, we assume we know ts average ower consumton and ts worst-case executon tme through smulaton and analyss tools [16,17]. The energy consumton of a PE n the dle erod of a system enterng slee state can be modeled as EC = e * e + w * w + ( e w )* [8], where e ( w ) s the delay overhead and ( ) s the ower consumton n enterng e w (leavng) slee state, and s the ower consumton n ths state. A PE always assumes a slee state that mnmzes EC. Frst, we defne some varables and functons that are used later n resentng our heurstcs. We defne event_lst as a lst of statcally scheduled events n the order of ther start tmes on each PE or bus for one hyererod. sched s an array of event_lst for all the PEs and buses. The scheduled event can be a erodc task or a communcaton event. In the statc schedule, every event s charerzed by a start tme, a fnsh tme, and a duraton, whch s the worst-case executon tme for that event. For a scheduled event, next_event s the next scheduled event n the same event_lst. For a task, n-edges (out-edges) refers to all the nter- PE communcaton edges enterng (comng out of) the task, where nter-pe communcaton edges refer to those edges for whch the arent task and chld task are assgned to dfferent PEs. A deadlne may be assocated wth a task. For a task, fnsh _ constrant ( ) = mn(mnj out edges( ) j start, deadlne, ( next_ event) start) The battery-aware schedule otmzaton scheme s comosed of two arts. The ntal schedule s frst otmzed through global shftng wth a goal to reduce the eak ower consumton and to ncrease the flexblty n the schedule. Then local schedule transformatons are emloyed to otmze the dscharge ower rofle. The detals of the schedulng scheme are resented n subsectons 5.1 and Battery-aware local schedule transformatons In the battery-aware local schedule transformaton scheme, we frst rank the tme ont along the hyererod n the order of (t). Then from the hghest ower consumton tme ont to the lowest ont, we try to nterchange adjacent events or shft forward or shft backward events around that tme ont, wth a goal to reduce cost functon evaluated by Equaton (5). In order to guarantee the valdty of the schedule n each transformaton, f nterchangng two scheduled events and j, or shftng forward a scheduled event, or shftng backward a scheduled event j volates the recedence relatonsh, we evaluate the ossblty of shftng forward the out-edges of and/or shftng backward the nedges of j for exly the amount needed n case and j are tasks, or shftng forward the chld task of and/or shftng backward the arent task of j exly for the amount needed n case and j are communcaton events, and take nto consderaton these effects on as well. No local schedule transformaton s erformed f t volates the recedence relatonsh or hard tmng constrants, or t does not reduce. After each round of transformatons, the ower rofle s re-ranked and the above rocess reeats untl sched s no longer changed. The followng examle llustrates the (5) scheme. Examle 3: Consder the task grahs n Fg. 2 and the ntal schedule n Fg. 3 once agan. Fg. 8 llustrates the stes nvolved n alyng the above-mentoned method to the schedule n Fg. 3. The rankng of tme erods n terms of ower rofle (t) ntally s {(0,4),(12,16),(4,8),(8,10),(10,12)}. There are four stes nvolved. In the frst ste, and are nterchanged to reduce the ower consumton n tme erod (0,4). Smlarly, n the second ste, and t8 are nterchanged. Then t8 s shfted backward to deal wth tme erod (10,12). The resultng schedule s shown n Fg. 8(b). The rankng of tme erods n terms of (t) s then udated. In the second round, s shfted forward to relax the current eak ower consumton n tme erod (8, 10). The resultng schedule s shown n Fg. 4. At each ste, s reduced (5) (1) (5) (1) (1) (1) a. Orgnal schedule (1) (1) (1) (5) t8(5) b. New schedule after frst three stes Fg. 8 The schedule transformaton stes for the task grahs n Fg Global shftng scheme The above local transformaton scheme s greedy, and s deendent uon a good ntal soluton. Ths can be llustrated through Examle 4. Examle 4: Fg. 9 shows an embedded system secfcaton consstng of three task grahs. Fg. 10(a) gves a feasble statc schedule on a dstrbuted system consstng of two PEs, PE1 and PE2, connected by a bus. The worst-case executon tme of,,,, and on ther allocated PE are all 2 seconds, whle the worst-case executon tme of and t8 on ther allocated PE are both 1 second. The executon tme of nter-pe communcaton edge on the bus s 1 second. The ower consumton number for each scheduled event s shown n brackets n the schedule. There s no oortunty for local movements n order to reduce n the schedule of Fg. 10(a). However, the schedule s not otmal for battery effcency. e3 e4 Deadlne: 4 Deadlne: 8 Deadlne: 8 e5 t8 Perod: 8 Deadlne: 8 Fg. 9 Task grahs for Examle 4 In order to get a good ntal soluton, we rocess the schedule through a battery-aware global shftng stage, whch tres to shft the schedule slots n a global manner wth the goal of reducng the eak ower consumton and ncreasng the flexblty n the (3) (1) t8(5) (4) (2) (5) (1)
5 schedule. Ths rocess starts from an ntal schedule where every scheduled event s shfted backward to ts as early as ossble oston. Then we create an event rocessng queue and ntalze t by nsertng the last event on every event_lst whch does not have out-gong communcaton edges. Then we try to shft the tasks and communcaton events n the rocessng queue as late as ossble, so long as n the new oston where the tasks and communcaton events are shfted to, the overall average ower consumton for that duraton does not exceed some gven threshold value (ower_threshold), whle the negatve effect, f any, resultng from the changng of the groung of dle erods, are less than some threshold value (sde_effect_threshold). If there s no such oston, we shft forward the scheduled events to the best oston n terms of the reducton n. A new task or communcaton event s added nto the rocessng queue f ts next_event and all those events whch have data deendency on t have fnshed shftng. Shftng forward as late as ossble hels ncrease the flexblty of the overall schedule so that more oortuntes can be oened u for further schedule transformaton. The global shftng scheme s llustrated through Examle 4. In the ntal schedule n Fg. 10(a), there are no vald local movements ossble to reduce. We take the average ower consumton (4.675) as the ower_threshold and assume the sde_effect_threshold s zero. Durng global shftng, frst, t8 s shfted to the as-late-as-ossble slot. The average ower consumton for the new tme erod (7, 8) of t8 s 4, hence, the ower_threshold s not exceeded. Smlarly, s shfted as late as ossble to tme erod (6,7). Then s shfted as late as ossble to (5,6). After ths global shftng rocedure, the new schedule s shown n Fg. 10(b). Now and can be nterchanged to reduce, wthout volatng the recedence relatonshs and hard real-tme constrants. The fnal schedule s shown n Fg. 10(c). Comared to the schedule n Fg. 10(a), the varance of the dscharge ower rofle s reduced n the schedule n Fg. 10(c) (5) (1) (2) (3) (1) (1) a. Intal schedule t8(1) (5) (1) (2) (3) (1) (1) b. New schedule after global shftng (1) (5) (2) (3) b. New schedule after global shftng (1) (1) c. Fnal schedule after schedule nterchangng Fg. 10 Battery-aware otmzaton for Examle 4 t8(1) t8(1) 6. Varable-voltage Schedulng Scheme Some embedded systems may be comosed of voltage-scalable PEs, for examle, Crusoe rocessors [14]. Snce voltage scalng has a hgh otental for reducng system energy consumton, our algorthm s tuned to facltate the ossblty of scalng down the voltage for each task whenever ossble. We defne slack tme for each scheduled task as the dfference between ts fnsh_constrant and ts fnsh tme. The slack tme n the dstrbuted schedule makes t ossble to scale down the voltage wthout sacrfcng the real-tme constrant. Our schedulng scheme tres to allocate the slack tme n a close-to otmal way to mrove the erformance of the consequent voltage scalng. Assume for each task, d s ts executon tme lus ts slack tme, e s ts executon tme, and s ts ower consumton under maxmum voltage V max. For a PE, total_slack s the summaton of the slack tmes of all the tasks on that PE n the ntal schedule, and total_duraton s the summaton of the executon tmes of all the tasks on that PE. We use total_slack to aroxmate the total avalable slack tme for all the tasks. Usng Equatons (3) and (4) to evaluate the effects of voltage scalng, for a task, the seed reducton rato should be scale = d / e, and the corresondng workng voltage should be e e 2 2 V V = ( Vt + ) + ( + Vt ) Vt, where β = 2 * max. d * β d * β 2 ( Vmax V t ) Our objectve s to mnmze the energy consumton of all the tasks after voltage scalng, whch s energy= * ( d / scale ) * ( V / V = max ) * e * V / Vmax (6) all tasks under the constrant d = total= total_ duraton+ total_ slack d e If the threshold voltage V t s close to zero, the otmal soluton can be aroxmated by d e. e 3 d = total*, so long as e 3 The allocaton of slack tme s erformed through global schedule shftng and schedule slots nterchangng to match the otmal slack assgnment, whch s d e for task. 7. Exermental Results In ths secton, we resent the exermental results. The task grahs n our examle are generated wth the ad of a randomzed task grah generator, TGFF [13]. In the frst exerment, we evaluate the erformance of our battery-aware schedulng scheme resented n Secton 5. The ual ower consumton drawn out of the battery s evaluated by Equaton (5), where c (t ) s evaluated usng the short-term average ower consumton. The duraton of the short-term average should match the order of the battery s tme constant for resonse to the change of the dscharge rate, whch s assumed to be 1 second [2]. The evaluaton of the battery effcency s based on data extred from the secfcatons for Lthum-Ion Polymer batteres n [3]. We evaluate two test sets, a and b, based on the same four task grahs. For the urose of evaluaton, we set the rated battery caacty (n terms of W-hours) for test set a(b) to be 2X(1.67X) of the average ower consumton of the system. The results for the orgnal schedule and the schedule otmzed n terms of the dscharge ower rofle are comared n Table 2. In ave Table 2, s the average ower consumton of the system. The otmzed schedule results n an mrovement of battery lfesan n the range of 8.5% to 16.6% and 12.6% to 28.8% for test sets a and b, resectvely. Ths exerment shows that wthout sacrfcng the erformance constrants and ntroducng overheads nto the system, the shang of the dscharge ower rofle alone can hel boost the battery erformance effectvely. The otmzaton scheme would be more owerful under strngent dscharge condtons, for examle, at lower temeratures or lmted battery caacty, where the battery caacty loss s more ronounced when the dscharge rate s hgh. As shown for test set
6 b, as the rated battery caacty decreases comared to test set a, the otmzaton of the battery dscharge ower rofle s more effectve n ncreasng battery erformance. In the second exerment, we evaluate the erformance of our varable-voltage schedulng scheme resented n Secton 6. We comare three schemes: (1) non-varable-voltage scheme, (2) varable-voltage schedulng wthout slack tme re-allocaton, and (3) varable-voltage schedulng wth slack tme re-allocaton. We evaluate both the battery erformance wth and wthout consderng the shae of the dscharge ower rofle. The exermental results are shown n Table 3 for another set of task grahs. Scheme (3) acheves an average ower reducton n the range of 17% to 38% and 14% to 31% comared to Scheme (1) and Scheme (2), resectvely. In terms of the battery lfesan evaluated usng, Scheme (3) results n an mrovement n the range of 26% to 76% and 20% to 56% over Scheme (1) and Scheme (2), resectvely. In terms of the battery lfesan comuted as the battery caacty (evaluated usng average ower consumton) dvded by average ower consumton, Scheme (3) results n an mrovement n the range of 23% to 68% and 17% to 50% over Scheme (1) and Scheme (2), resectvely. It can be observed that the mrovement s more ronounced when the shae of the dscharge ower rofle s taken nto consderaton,.e., the evaluaton s based on, whch ndcates our scheme s helful n reducng both the average dscharge ower level and ts varance. Thus, the scheme s very owerful n boostng the battery erformance. Table 2: Comarson of dfferent schedulng schemes for battery-aware ower consumton Test #tasks # PEs / # ave Battery buses (mw) / Battery lfesan (mw) lfesan(hours) ncrease Nonotmzed Otmzed (%) 1(a) 71 2/ / / % 2(a) 114 8/ / / % 3(a) 94 6/ / / % 4(a) 146 6/ / / % 1(b) 71 2/ / / % 2(b) 114 8/ / / % 3(b) 94 6/ / / % 4(b) 146 6/ / / % 8. Conclusons In ths aer, we resented two schemes to otmze the battery lfesan n battery-owered real-tme embedded dstrbuted systems by reducng the average dscharge ower rofle and shang ts dstrbuton. One scheme otmzes the dscharge ower rofle. Another scheme erforms varable-voltage schedulng va effcent slack-tme re-allocaton n the dstrbuted system comosed of voltage-scalable PEs. It hels reduce the average dscharge ower consumton as well as mnmze the varance of the dscharge ower rofle. Both schemes ncrease the battery lfesan whle stll guaranteeng the real-tme constrants Test #tasks #PEs/ #buses and recedence relatonshs n the dstrbuted embedded system, based on an evaluaton metrc whch s aware of the shae of the dscharge ower rofle. In future work, the evaluaton metrc should ncororate the battery recovery effect as well. References [1] C.F. Chassern and R.R. Rao, Pulse battery dscharge n communcaton devces, n Proc. Moblcom, , Aug [2] T. Martn, Balancng batteres, ower and erformance: System ssues n CPU seed-settng for moble comutng, Ph.D. Dssertaton, Carnege Mellon Unversty, Deartment of Electrcal and Comuter Engneerng, Aug [3]htt:// [4] H. D. Lnden, Handbook of Batteres, 2 nd ed., McGraw-Hll, New York, [5] M. Pedram and Q. Wu, "Desgn consderatons for batteryowered electroncs," n Proc. Desgn Automaton Conf., , June [6] T. Smunc, L. Benn and G. De Mchel, Energy effcent desgn of battery owered embedded systems, n Proc. Int. Sym. Low Power Electroncs and Desgn, , Aug [7] Q. Qu and M. Pedram, Dynamc ower management based on contnuous-tme Markov decson rocesses, n Proc. Desgn Automaton Conf., , June [8] E. Y. Chung, L. Benn, and G. De Mchel, Dynamc ower management usng adatve learnng tree, n Proc. Int. Conf. Comuter-Aded Desgn, , Nov [9] I. Hong, D. Krovsk, G. Qu, M. Potkonjak, and M. B. Srvastava, Power otmzaton of varable-voltage core-based systems, IEEE Trans. Comuter-Aded Desgn, vol. 18, no. 12, , Dec [10] Y. Shn and K. Cho, Power conscous fxed rorty schedulng for hard real-tme systems, n Proc. Desgn Automaton Conf., , June [11] J. Luo and N. K. Jha, Power-conscous jont schedulng of erodc task Grahs and aerodc tasks n dstrbuted real-tme embedded systems, n Proc. Int. Conf. Comuter-Aded Desgn, , Nov [12] R. P. Dck and N. K. Jha, MOCSYN: Multobjectve corebased sngle-ch system synthess, n Proc. Desgn Automaton & Test n Euroe Conf., , Mar [13] R. P. Dck, D. L. Rhodes, and W. Wolf, TGFF: Task grahs for free, n Proc. Int. Worksho Hardware/Software Codesgn, , Mar [14] htt:// [15] E. L. Lawler and C. U. Martel, Schedulng erodcally occurrng tasks on multle rocessors, Informaton Processng Letters, vol. 7,. 9-12, Feb [16] Y. S. L, S. Malk, and A.Wolfe, Performance estmaton of embedded software wth nstructon cache modelng, n Proc. Int. Conf. Comuter-Aded Desgn, , Nov [17] W. Ye, N. Vjaykrshan, M. Kandemr, and M. J. Irwn, The desgn and use of SmlePower: A cycle-accurate energy estmaton tool, n Proc. Desgn Automaton Conf., , June Table 3: Comarson of dfferent voltage-scalng and non-voltage-scalng schemes (mw) / Battery lfesan Battery lfesan (evaluated by ) ncrease (%) Ave. ower consumton (mw) / Battery lfesan evaluated by average ower consumton (hours) evaluated by (hours) (1) (2) (3) (3) vs. (1) (3) vs. (2) (1) (2) (3) /1 136/ / / % 29.4% 107/1.8 92/ / /6 500/ / / % 19.6% 425/ / / /16 476/ / / % 23.7% 413/ / / /10 302/ / / % 33.3% 260/ / / /16 490/ / / % 55.7% 416/ / /3.03
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