REZUMAT TEZĂ DE DOCTORAT

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1 Investeşte în oameni! FONDUL SOCIAL EUROPEAN Programul Operaţional Sectorial Dezvoltarea Resurselor Umane Axa prioritară: 1 Educaţia şi formarea profesională în sprijinul creşterii economice şi dezvoltării societăţii bazate pe cunoaştere Domeniul major de intervenţie: 1.5 Programe doctorale si postdoctorale în sprijinul cercetării Titlul proiectului: Proiect de dezvoltare a studiilor de doctorat în tehnologii avansate- PRODOC Cod Contract: POSDRU 6/1.5/S/5 Beneficiar: Universitatea Tehnică din Cluj-Napoca FACULTATEA DE ELECTRONICĂ, TELECOMUNICAȚII ȘI TEHNOLOGIA INFORMAȚIEI Ing. RAUL CIPRIAN ONEȚ REZUMAT TEZĂ DE DOCTORAT BASEBAND SIGNAL PROCESSING FOR INTEGRATED RADIO RECEIVERS Conducător științific Prof.dr.ing. MARINA ȚOPA Comisia de evaluare a tezei de doctorat: Președinte: - Prof.dr.ing. Gabriel Oltean - Secretar științific, Facultatea de Electronică, Telecomunicații și Tehnologia Informației, Universitatea Tehnică din Cluj-Napoca Membri: - Prof.dr.ing. Marina Țopa - Conducător științific, Facultatea de Electronică, Telecomunicații și Tehnologia Informației, Universitatea Tehnică din Cluj-Napoca - Conf. dr. ing. Ana Rusu - Referent, Royal Institute of Technology, Stockholm, Suedia; - Prof.dr. ing. Mircea Bodea - Referent, Universitatea Politehnica din București; - Conf.dr.ing. Marius Neag - Referent, Facultatea de Electronică, Telecomunicații și Tehnologia Informației, Universitatea Tehnică din Cluj-Napoca.

2 1. MOTIVATION Technological innovations in the communication fields from the last decades have a large impact on modern society. Mobile communications, television, internet changed many factors of modern life. The tremendous development of silicon industry has led to low-price and user friendly (light and small) mobile radios, accessible to (almost) everyone. The nowadays demands of a mobile phone are, apart from its basic function, to receive radio transmissions (analog FM or digital DAB), digital TV transmissions (T-DMB, DVB-H, ISDB-T), shortrange wireless broadband connectivity (WLAN), high area coverage, high-mobility wireless connectivity (WiMAX, LTE) and also to have auxiliary functions like determining location by using GPS system, all with low-power, small area and low-price constraints. The integration of more and more functions into one mobile device, by adding new components is not suitable, due to the above-mentioned constraints; the solution is to have multistandard integrated circuits. In the last couple of years several providers have developed such chips but only for the digital side of the receiver. No such solution has been reported for the tuner the section between the antenna and the analog-to-digital converter (ADC), that detects the signal and conditions it to better suit the ADC. Recently, a few design companies have proposed solutions for pairs of standards, such as the T-DMB and DVB-H (both using OFDM modulation) or Bluetooth and GPS. Also, several proposals for transceivers/receivers that can support multiple standards, based on programmable and reconfigurable blocks, have been presented in the literature: WiMAX and LTE, WiMAX and WLAN, and also software defined radio transceivers. But even these achievements are a long way from a comprehensive, all-inclusive, solution a tuner IC able to receive all broadcasts potentially useful to a mobile phone user. 2. SCOPE OF THE THESIS This thesis proposes new directions in the analysis and design of multistandard integrated radio receivers, dealing with four major topics: - methodologies for system level analysis of a radio receiver that can optimize the analog/digital signal processing ratio, considering power consumption and area - methods for determining the small-signal loop gain of OpAmp-based feedback circuits through frequency-domain SPICE simulations - topologies of programmable and reconfigurable blocks for analog baseband of multistandard radio receivers: channel filters and variable gain amplifiers - circuit-level solutions with transistor-level implementations for competitive variable gain amplifiers 1

3 3. THESIS ORGANIZATION CHAPTER 2 presents Matlab models for an OFDM signal generator, for the signal path within a DVB-T receiver and for the DSP block; basic parameters gain, bandwidth, frequency characteristic for channel filter model and also additional features noise, nonlinearity, gain imbalance and quadrature errors for the mixer models, quantization error for the analog-to-digital converter are modeled. A new method was also proposed together with a new metric DwrtR, for analyzing the effects various block nonidealities have on the receiver, when considering unwanted signals such as the adjacent channels and out-of-band blockers. CHAPTER 3 presents an analysis and comparison of four methods for determining the loop gain of OpAmp-based feedback circuits through AC SPICE simulations: Cadence STB analysis, Rosenstark-based, V AC and L BIG C BIG methods. Analytical analysis is provided and simulations are run using standard models for the all four types of OpAmps (V-V, I-V, V-I and I-I) and a two port network closing a series-shunt feedback around the OpAmp. CHAPTER 4 introduces an analysis method of the universal biquad structures that considers the effects the parasitic capacitances from the nodes without placed capacitors have. A new OTA-C universal biquad architecture is proposed, capable of realizing transfer functions from the usual lowpass and band-pass to transfer functions with imaginary and complex zeroes. Also, the new structure provides a way of resonating out the main parasitic capacitance, pushing most of its effects out of the band of interest. CHAPTER 5 presents the design of low-power multistandard variable gain amplifiers. Two voltage-controlled VGA architectures, suitable for WLAN/WiMAX/LTE, and several fully differential circuit implementations are proposed. Novel circuit solutions for controlling the output common mode voltages are given. Measurement results for a silicon implementation of a VGA architecture are provided. CHAPTER 6 draws the final conclusions and major contributions of this thesis. 4. CONCLUSIONS AND CONTROBUTIONS CHAPTER 2. System-level design of nowadays digitally-oriented radio receivers requires the use of detailed models, capable of representing accurately the entire signal path, including the digital signal processing chain. They should not only provide a set of specs for each block but also comparisons between alternative solutions, including measures for optimizing the partitioning between analog and digital signal processing. Traditional system-level design is based on level plans that yield the SNR 2

4 or SINAD of a receiver. Two of the most important shortcomings of this approach are: i). the effect of the unwanted signals such as the adjacent channels and possible blockers are difficult to estimate and ii). standard numerical-analyses performed by Matlab or Spice-simulators in transient analysis operate with total signals and do not explicitly separate the wanted part of the signal; therefore they cannot relate to the SNR/SINAD. Moreover, the level plans are easy to use for analog blocks but not straightforward for digital blocks; this leads to artificial breaking of the signal path analysis at analog/digital border, leaving out the digital filters. In chapter 2, a Matlab model for the signal path within a DVB-T receiver was presented; the models for the blocks cover the basic parameters gain, bandwidth, noise and nonlinearity and also parameters for the blocks with specific functions: mixing product with gain imbalance and quadrature errors are added for the mixer models, frequency characteristics for the channel filter models and quantization the analog-to-digital converter model. A new method for analyzing the effects various block nonidealities have on the receiver, when considering unwanted signals such as the adjacent channels and out-of-band blockers was developed; it is based on a direct, sample-by-sample, comparison between a reference signal obtained by using a reference version of the receiver, for which some aspects are idealized and the real signal, obtained by using the complete receiver model and considering all signals, wanted and unwanted, present at the receiver antenna. The method has been demonstrated on two application examples: in the first example the effect of LNA noise and nonlinearity was analyzed, with the view of determining the complete set of (NF, O1dBCP) pairs for which this effect remains bellow a set limit. The second example presented the effect of block nonidealities over the receiver output in the presence of strong adjacent channel signals, by comparison with the ideal situation, in which no unwanted signal was applied. By repeating this analysis for several types of analog and digital channel filters one can determine in a systematic way the best partitioning of the channel filtering between the analog and digital domains. The Matlab model of the signal path within the OFDM radio receiver and the new method for analyzing the effects various block nonidealities have on the receiver, the DwrtR metric, were reported in [1], [3]. CHAPTER 3. The next step is the block level/circuit level design of the integrated radio receiver. Feedback circuits are widely used in baseband analog signal processing chain. Intrinsic or applied by the designer, feedback is present in the majority of electronic circuits. A critical concern when designing feedback circuits is achieving stability. Stability of a feedback circuit is analyzed by estimating the phase and module margins, measures derived from the small-signal loop gain of the analyzed circuit, usually called T. There are several methods for deriving T analytically which imply breaking the feedback loop; the closed-loop operation conditions need to be assured, by taking into account the loading effect of the feedback network. The analytical methods for determining the loop gain are not directly applicable for the loop gain measurement through simulations: breaking the loop gain can modify the DC operating point of the circuit, thus changing its small-signal parameters. Also, the loading effects of the feedback network can be difficult to determine through simulations. In Chapter 3, three methods for determining the small-signal loop gain for OpAmp-based feedback circuits through AC simulations are analyzed: V AC method which uses an independent voltage source with 3

5 DC=0 and AC=1 to break the loop the L Big C Big method which breaks the loop and shorts one of the OpAmp inputs to ground by using inductances and capacitors with very large values and the T R method based on the Rosenstark theorem. The methods are then compared through simulations against the Cadence STB analysis. The methodology for analyzing the methods is: deriving analytically their loop gains and verifying if the following obvious requirements are satisfied: the loop gain should not depend on the point the loop is broken condition satisfied only by the Rosenstark-based method - and the circuit configuration of the method should not cancel the effects of the OpAmp s input impedances as it is the case of the L BIG C BIG method. The other criterion for analyzing the methods is verifying that the phase margin obtained through simulations with the four methods is in good correspondence with the step response of the analyzed circuits verified for an extended set of circuits. We have found simulation examples that show that this criterion was satisfied only by the Rosenstark-based and STB methods. All four OpAmp types currently available commercially have been considered: the traditional OpAmp (V-V OA), the current-feedback OpAmp (CFB-OA), the Operational Transconductance Amplifier (OTA) and the Current-Current Amplifier (I-I OA) with asymmetrical inputs. Recommendations for designers are made based on both analytical and simulation results. The V AC method can be used if two conditions are met: i) the feedback two-port is purely resistive and ii) the point at which the loop is broken is chosen by taking into account the relationship between the values of the OpAmp input/output impedances and the feedback network equivalent impedances. In particular, for OpAmps with naturally large input impedances such as the traditional V-V OpAmp and the OTA for most practical circuits the loop should be broken at the inverting input of the OpAmp rather than at its output. The opposite applies to the CFB-OA, where for most practical cases it is better to use the VAC method by breaking the loop at the output of the OpAmp. The I-I OA is a special case, for which no clear pattern was found, hence no conclusion could be drawn. Similarly, the L Big C Big method can be used if two conditions are met: i) the feedback two-port is purely resistive and ii) the OpAmps have large input impedances such as V-V OpAmp and the OTA, that have naturally large input impedances. The analyses on the methods for determining the loop gain through AC simulations were reported in [2], [6] and [10]. CHAPTER 4. Universal biquads are structures able to implement several second-order transfer functions with a minimum of adjustments. Among the various active cells and implementation techniques that have been proposed, the OTA-C (also called Gm-C) technique, which uses linear transconductors and (usually) grounded capacitances, is one of the most popular, because it is particularly well suited for silicon integration and results in circuits able to operate up to hundreds of MHz. A common problem affecting the universal biquads reported so far is their relatively high sensitivity to parasitic capacitances compared to the simple biquad structures that realize only one or two transfer functions. Most of the universal biquads reported so far have a more complicated structure, comprising at least one node without a placed capacitance; the parasitics associated with those nodes can degrade significantly the performance of the biquads, they can even change the nature of their transfer functions. 4

6 Chapter 4 proposes a new structure of an OTA-C universal biquad that provides, with minimum of adjustments, not only the most usual transfer functions low-pass, band-pass, all-pass- but also transfer functions with imaginary and complex zeroes. There are several advantages of this new structure: first, the main parasitic capacitances appear in parallel with the placed ones, therefore the effect of parasitics can be minimized by pre-distorting the value of the placed capacitors; second, the main parameters of the biquadratic transfer functions can be electronically tuned through the transconductance values; third, it provides a way of resonating out the main parasitic capacitance, pushing most of its influence out of the band of interest. The new structure and a simulation example realized with an OTA model were presented in [9]. CHAPTER 5. Two novel VGA architectures were presented, both derived from the standard two-gm cells structure, by adding a third Gm cell, connected at the input of the VGA and a voltage controlled current amplifier at the output of the third Gm-cell, for performing the continuous gain variation. The second proposed VGA architecture is derived from the first one, by replacing the resistor-connected Gm-cell with a passive resistor. This improvement increases linearity and reduces power consumption, noise and DC offset. Both VGA architectures present relatively small variations of the bandwidth and linearity parameters with the gain setting, and also bandwidth programmability through digital controls; these features make the proposed architectures suitable for multistandard radio receivers. In order to reduce the common mode noise and even order distortions and to increase the output voltage swing, the designed circuits are fully differential. Three transistor-level implementations are proposed for the 3-Gm architecture, all implemented in a standard 0.18 um CMOS process. The first transistor-level implementation used simple differential pairs for realizing the Gm cells; and the voltage-controlled current amplifier was realized by using a differential current steering circuit the same solution was used for all the circuit implementations of the VGA architectures proposed in this chapter. A new circuit for controlling the output common mode voltage, that does not require placing additional circuitry in the signal path for sensing the output common mode voltage, was introduced. The simulation results show that the circuit covers a gain range from 0dB to 18dB while handling an output voltage swing of 800mV ppdiff without significant distortions. The VGA bandwidth is 30MHz, for a capacitive load of 1pF at each output, referred to ground. The main advantages of this circuit implementation are the reduced power consumption and reduced area, due to the fact that the Gmcells are realized using simple differential pairs. The second transistor implementation, based on Gm-cells realized with highly linear transconductors, is covering a gain range form 0dB to 18dB while handling signals with amplitudes up to 800mV pkpkdiff without significant distortions; it exhibits bandwidths above 30MHz while driving capacitive loads of 1pF between each output and GND. New circuit for controlling the output common-mode voltage is proposed; note that this circuit does not require the placement of additional circuitry in the differential signal path. This solution is fairly general, it can be used for circuits implemented with similar Gm cores and that have the input of such a Gm core connected to each of their internal nodes. 5

7 The third transistor-level implementation of the proposed 3 Gm-VGA consists of only two instantiations of the same high-linearity Gm core and three scaled output stages. The area and power consumption are reduced, and the VGA noise and linearity are improved, by sharing one core between two output stages. The core is optimized for linearity and it is not affected by the gain setting; the VGA gain is varied through a voltage-controlled current attenuator implemented by using a differential current steering scheme. The simulation results demonstrate that it can cover the gain range of -6dB to +24dB while handling signals with amplitudes up to 1V ppdiff without significant distortions; the bandwidth is determined by the (programmable) capacitance placed at the output; its value remains above 40MHz while driving up to 1pF. Power consumption is 7mW for gains up to 18dB; for higher gains it goes up to 12mW, both considering a supply voltage of 1.8V. A transistor-level implementation based on a high-linearity Gm-core was proposed for the 2-Gm voltage-controlled amplifier. The VGA architecture uses only one instantiation of the Gm-core and two scaled outputs, like the last implementation of the 3-Gm VGA discussed above. A new circuit for controlling the output common-mode voltage is proposed, that does not require the placement of additional circuitry in the differential path. The VGA was fabricated in 0.15um CMOS process. Post-layout simulations show that the VGA can cover a gain range from -3dB to 30dB, while consuming 4.2mA from 1.8V supply voltage. The VGA bandwidth is 60MHz. The circuit can handle up to 1V ppdiff without significant distortions. When compared with the recently published VGA s, the designed VGA achieves among the best linearity, settling time and area performance, and competitive performance for the other parameters. Measurement simulations are very similar with the post-layout simulations. The proposed VGAs, reported in [5], [7] and [8], are well suited for multistandard radio receivers (WLAN, WiMAX, LTE), as the bandwidth and linearity are largely independent of the gain setting, and both gain and bandwidth can be programmed through digital controls. 6

8 Appendix LIST OF PUBLICATIONS [1] R. Oneţ, V. Popescu, M. Neag, M. Ţopa, and S. McDonagh, Matlab Modeling and Analysis of the Signal Path in Zero-IF DVB-T / H Radio Receivers, Electronics and Telecommunications (ISETC), 2010, 9th International Symposium in, 2010, pp [2] Oneţ, R., Neag, M., Kovacs, I., Topa, M., A comparative analysis of three methods for determining the small-signal loop gain of OpAmp-based circuits through Spice simulations.in submitted. [3] R. Onet and M. Neag, Matlab Modeling of the Main Blocks Within the Analog Signal Path of a DVB- H Radio Receiver, Novice Insights in Electronics, Communications and Information Technology, [4] R.C. Onet, M. Neag, and M. Topa, Comparison between three structures of high speed low-voltage and low-dropout linear regulators, th International Symposium for Design and Technology of Electronics Packages (SIITME), Sep. 2009, pp [5] Neag, M., Oneţ, R., Rusu, A., Kovacs, I., Topa, M., A Novel Highly Linear Voltage-Controlled Amplifier for WLAN, WiMAX and LTE radio receivers in submitted. [6] M. Neag, R. Onet, and M.D. Topa, Analysing the Stability of Circuits based on Operational Amplifiers by using Frequency-Domain Simulations, Acta Technica Napocensis, vol. 51, 2010, pp [7] M. Neag, I. Kovacs, R. Onet, and M. Topa, Novel Voltage-Controlled Amplifiers for Multistandard Integrated Radio Receivers, Acta Tehnica Napocensis Electronics and Telecommunications, vol. 50, 2009, pp [8] M. Neag, I. Kovacs, R. Onet, and M. Topa, A voltage-controlled amplifier based on Gm cells for multistandard OFDM integrated receivers, EUROCON-International Conference on Computer as a Tool (EUROCON), 2011 IEEE, IEEE, 2011, p [9] M. Neag, R. Onet, and M. Topa, A new OTA-C universal biquad resonates out the main parasitic capacitance, 2009 European Conference on Circuit Theory and Design (ECCTD), Aug. 2009, pp [10] M. Neag, R. Onet, R. Groza, and M. Topa, Analysing the stability of series-shunt circuits based on voltage- and current- feedback OpAmps through SPICE AC simulations, 2010 IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR), IEEE, 2010, pp [11] B.S. Kirei, M. Topa, M. Neag, and R.C. Onet, I/Q Imbalance Compensation Algorithm based on Neural Networks, Journal of Automation Mobile Robotics and Intelligent Systems, vol. 3, 2009, p [12] I. Kovács, R. Onet, and M. Neag, A Programmable Gain Amplifier With Optimized Frequency Compensation, Novice Insights in Electronics, Communications and Information Technology, vol. 6, 2009, pp [13] I. Sărăcuţ, V. Popescu, R. Oneţ, and M. Neag, Optimization of the Channel Filter in OFDM Radio Receivers by Using Genetic Algorithms, Electronics and Telecommunications (ISETC), 2010, 9th International Symposium in, 2010, pp