Lab Experiment No. 4

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1 Lab Experiment No. Kirchhoff s Laws I. Introduction In this lab exercise, you will learn how to read schematic diagrams of electronic networks, how to draw and use network graphs, how to transform schematics into actual component connections, correct ways to layout a breadboard connection of a network, how to connect the DMM to network components, and the verification of KCL and KVL. II. Experiment Procedure Four resistive networks N through N are shown on the following pages. Each network is accompanied with its oriented graph, a simplified connection diagram, and a photo of its suggested breadboard layout. Your job in this lab experiment is to fill out the three tables included with each network with the following data: (where x denotes the network number; eg, x = for network, x = for network, etc.) (a) Table x. (variable map) measure and record i. the of each network element, ii. the voltage across each network element with node polarities, and iii. the current through each voltage source with node polarities. (b) Table x. (variable map) calculate and record i. the current through each resistor using Ohm s law, and ii. the power dissipated by each element. (c) Table x. (KCL) calculate and record i. the total current into each node, ii. the total current out of each node, and iii. verification of KCL at each node. (d) Table x. (KVL) calculate and record i. the total clockwise voltage drop around each circuit, ii. the total counter clockwise voltage drop around each circuit, and iii. verification of KVL for each circuit. III. Lab Report The report for this lab experiment must be word-processed and contain the following items Title Page. Introduction. Procedure. Results. Discussions. (a) Comment with respect to accuracy versus convenience on the application of Ohm s law to determine element current. Conclusion. Provide detailed comments and discussions on the items listed below for each resistor network. (a) Does the total power dissipated equal the total power supplied? Explain why or why not. (b) Are the network laws KCL and KVL verified? Explain any discrepancies. Appendix. References.

2 IV. Resistor Networks Network N v V Agilent E0A V V 0V R K e V e R N G v R K (a) (b) (c) Figure. (a) Network N (b) Graph G of N (c) Component connections Figure. Breadboard layout of N

3 Table. Voltage, current, and power map for N voltage current Specified + (V) + Calculated (A) power (W) R KΩ V 0V Table. Kirchhoff current law Node into (I in ) (A) out of (I out ) (A) KCL (I in I out ) (A) Table. Kirchhoff voltage law Circuit Total cw voltage drop (V cw ) (V) Total ccw voltage drop (V ccw ) (V) KVL (V cw V ccw ) (V) V, R

4 Network N R K v e R v V Agilent E0A V V 9V R K e V e R R N K v G e R v R R (a) (b) R. (a) Network N (b) Graph G of N (c) Component connections (c) Figure Figure. Breadboard layout of N

5 Table. Voltage, current, and power map for N voltage current Specified + (V) + Calculated (A) power (W) R KΩ R KΩ R KΩ V 0V Table. Kirchhoff current law Node into (I in ) (A) out of (I out ) (A) KCL (I in I out ) (A) Table. Kirchhoff voltage law Circuit Total cw voltage drop (V cw ) (V) Total ccw voltage drop (V ccw ) (V) KVL (V cw V ccw ) (V) V, R, R, R

6 Network N R.9K R.K v e R v e R v V V K 9.K R e V e R e R R R.7K.K v G e R v e R v N (a) (b) V Agilent t E0A V R R R R R (c) Figure. (a) Network N (b) Graph G of N (c) Component connections Figure. Breadboard layout of N

7 Table. Voltage, current, and power map for N voltage current Specified + (V) + Calculated (A) power (W) R.9KΩ R.KΩ R 9.KΩ R.KΩ KΩ R.7KΩ V V Table. Kirchhoff current law Node into (I in ) (A) out of (I out ) (A) KCL (I in I out ) (A) Table. Kirchhoff voltage law Circuit Total cw voltage drop (V cw ) (V) Total ccw voltage drop (V ccw ) (V) KVL (V cw V ccw ) (V) V, R,, R, R, R, R V, R, R, R, R, R

8 Network N V V e V R R 8K 7K e R e R v v v R 0K V 0V R 0K e R e V e R R.K R 7 K v e R v e R v N.7K G (a) e R7 (b) V Agilent E0A V R R R R R 7 R (c) Figure. (a) Network N (b) Graph G of N (c) Component connections

9 Figure. Breadboard layout of N Table. Voltage, current, and power map for N voltage current Specified + (V) + Calculated (A) power (W) R 0KΩΩ R 8KΩΩ R 7KΩΩ R 0KΩΩ KΩΩ R.KΩΩ R 7.7KΩΩ V V V 0V

10 Table. Kirchhoff current law Node into (I in ) (A) out of (I out ) (A) KCL (I in I out ) (A) Table. Kirchhoff voltage law Circuit Total cw voltage drop (V cw ) (V) Total ccw voltage drop (V ccw ) (V) KVL (V cw V ccw ) (V) R, R, V, R V, R, R, R, V, R R,, R 7

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