Summer 2015 Examination
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1 Summer 2015 Examination Subject Code: Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate may vary but the examiner may try to assess the understanding level of the candidate. 3) The language errors such as grammatical, spelling errors should not be given more Importance (Not applicable for subject English and Communication Skills. 4) While assessing figures, examiner may give credit for principal components indicated in the figure. The figures drawn by candidate and model answer may vary. The examiner may give credit for any equivalent figure drawn. 5) Credits may be given step wise for numerical problems. In some cases, the assumed constant values may vary and there may be some difference in the candidate s answers and model answer. 6) In case of some questions credit may be given by judgement on part of examiner of relevant answer based on candidate s understanding. 7) For programming language papers, credit may be given to any other program based on equivalent concept. 1
2 1. a) Attempt any SIX of the following: 12 marks i. Draw input and output waveform, when the input signal is applied to the inverting input terminal of OP- AMP. Ans i. (Input Waveform-1Mark, Output Waveform- 1Mark) ii) Draw output waveforms for active differentiator for sine and square wave input. Ans ii. (O/P Waveform for Sine Input- 1Mark, O/P Waveform for Square Input- 1Mark) iii) State the need of signal conditioning and signal processing. Ans iii. (Need of Signal Conditioning- 1Mark, Need of Signal Processing- 1Mark) In an instrumentation system, a transducer is used for sensing various parameters. The output of transducer is an electrical signal proportional to the physical quantity sensed such as pressure, temperature etc. However the transducer output cannot be used directly as an input to the rest of the instrumentation system. 2
3 In many applications, the signal needs to be conditioned and processed. The signal conditioning can be of different types such as rectification, clipping, clamping etc. Sometimes the input signal needs to undergo certain processing such as integration, differentiation, amplification etc. iv) Draw pin diagram of IC LM324. Ans iv.(correct Pin diagram- 2Marks) Pin diagram of IC LM 324 v. Draw the output waveforms of inverting ZCD with sine wave input is 5V PP Ans v. (Correct O/P Waveform- 2marks) Fig: Output waveforms of inverting ZCD with sine wave input is 5V PP 3
4 vi. Classify filters based on frequency response characteristics. Ans vi. (Classification- 2Marks) Fig: Classification of filters based on their frequency response characteristics. vii. Give the relation between roll off rate and order of filter. Ans vii. (Correct Relation ½ mark each) Order of Filter Roll off Rate 1 20dB/ decade 2 40dB/ decade 3 60dB/ decade 4 80 db/ decade viii. Define multivibrator and give its classification. Ans viii. (Definition- 1Mark, Classification- 1 Mark) Multivibrator: An electronic circuit in which the output continuously changes between two states i.e. stable and unstable state is known as multivibrator. Depending upon number of stable or unstable states, there are three types of multivibrator: i. Astable multivibrator. ii. Monostable multivibrator. iii. Bistable multivibrator. 4
5 b. Attempt any TWO of the following: 8 marks i. Define the following parameters of OP- AMP and give their ideal values. 1. CMRR 2. Input offset voltage 3. Slew rate 4. Supply voltage rejection ratio. Ans i. (Each Definition- 1Mark) 1. CMRR: It defined as the ratio of differential gain to the common mode gain. It is the ability of an amplifier to reject the common mode signal. Ideally CMRR= 2. Input offset voltage (V io ): It is the input voltage that must be applied between both the input terminals of op- amp to make output offset voltage zero. Ideally value = 0 3. Slew Rate: It is defined as the maximum rate of change of output voltage per unit time. Ideally Slew Rate = 4. Supply voltage rejection ratio: It is defined as the ratio of change of input offset voltage to the change in one supply voltage while keeping other supply voltage constant. Ideally, SVRR= 0 ii. Draw the block diagram of OP- AMP. State the function of each block. Ans ii. (Block Diagram- 2Marks, Function of each block ½ marks) Fig: Block diagram of OP- AMP 1. An op- amp is a direct coupled differential amplifier usually consisting of one or more differential amplifier and followed by level shifter and output stage. 5
6 2. Input stage: In this stage dual input balanced output differential amplifier is used. Due to this circuit the voltage gain and input resistance of op amp increases to a high value. 3. Intermediate stage: This stage uses dual input unbalanced output differential amplifier. This stage is driven by the output of the first stage. 4. Level shifting stage: In this stage common emitter follower circuit is used. If the output of intermediate stage is shifted above or below the DC level, the level shifter stage brings back the signal to its original position. 5. Output stage: This stage uses complementary symmetry push pull amplifier. This stage provides low output resistance and hence increases the current supplying capability of opamp and also this stage increases the output voltage swing. iii. Draw ideal and practical voltage transfer characteristics of OP- AMP. Ans iii. (Ideal- 2Marks, Practical- 2Marks) Ideal voltage transfer characteristics of an ideal OP- AMP Voltage transfer curve of practical OP- AMP 6
7 2. Attempt any FOUR of the following: 16 marks a. Compare open loop and closed loop configuration of OP- AMP with respect to input resistance, output resistance, bandwidth and application. Ans a. (4 points- 4marks) Sr. No Parameter Open loop configuration Closed loop configuration 1 Input resistance Very High Depends on the circuit 2 Output resistance Low Very Low 3 Bandwidth High Very High 4 Application Comparator Linear amplifier, oscillators etc b. Draw the circuit of Op- Amp without feedback in inverting mode. Derive the output voltage. Ans b. (Circuit diagram 2 marks, Derivation 2 marks) As the non-inverting terminal is connected to ground V 1 =0 As the voltage drop across R S is zero (as current drawn by the OP- AMP is zero) the voltage at the inverting terminal. V 2 = V S The differential voltage V d = V 1 V 2 = 0- V s Therefore V d = - V S Therefore the output voltage is given by, V o = A V x V d Therefore, V o = A V X - V S Therefore, V o = - A V V S. 7
8 c. Design a circuit of OP- Amp for the following input and output waveforms. Refer Figure No.1 Ans c. (Derivation 2 marks, Design diagram 2 marks) The required circuit is a non-inverting amplifier with gain of 10 The output voltage is given by, V o = (1+R F /R 1 ) V i But 1+R F /R 1 = 10..(given) Therefore, R F /R 1 = 9 Therefore, R F = 9 R 1 Let R 1 = 1kΩ Therefore, R F = 9 kω 8
9 d. Draw the circuit diagram and output waveform for sine and square wave input for output voltage. Ans d. (Circuit Diagram 2 marks, correct waveforms 1 mark each) Circuit Diagram Fig: Input output voltage waveform for a square wave input 9
10 Fig: Input and output voltage waveforms for a sine wave input e. Using Op-Amp, draw the circuit to show the output V 0 = 3(V 1-2V 2 ) where V 1 and V 2 are input voltages. Ans e. (Derivation 2 marks, Design Diagram 2 marks) V o =3(V 1-2V 2 ) =3V 1-6V 2 Therefore, V o = (R F /R 1 )V 1 (R F /R 2 )V 2 Now, R F /R 1 =3 Therefore, choose R F =30KΩ and R 1 = 10KΩ R F /R 1 = 30/10 = 3 Now, - R F /R 2 = -6 Therefore, R 2 = 5KΩ RF = R3 = 30KΩ The required circuit is, 10
11 f. If R 1 = 2KΩ, R F = 100KΩ, V CC = + 15V and rms input voltage, V i = 20 mv. Calculate output voltage in inverting and non- inverting mode. Ans f. (Inverting output 2 marks, Non-inverting output 2 marks) Given: R 1 = 2KΩ, R F = 100KΩ, V CC = + 15V and rms input voltage, V i = 20 mv 1. Output voltage for an inverting amplifier: For an inverting amplifier the output voltage, V 0 = A VF X V i Therefore, V 0 = - (R F / R 1 ) x V i Substituting the values we get, V 0= -100 /2 x 20x 10-3 = -1V.Ans 2. Output voltage for the non-inverting amplifier: For the non-inverting amplifier the expression for output voltage is, V 0 = A VF X V i = [1+ R F /R 1 ] x V i Substituting the values we get, V 0 = [1+ 100/2] x 20x 10-3 = 1.02V Ans 11
12 3. Attempt any FOUR of the following: 16 marks a. Draw the circuit diagram of instrumentation amplifier using 3 OP- AMPs. Give the expression at the output of each OP- AMP. Ans a. (Diagram 2 marks, Expression of 1 st and 2 nd Op-Amp 1 mark, final Op-Amp 1 Mark) Fig: Instrumentation amplifier using three Op-Amp Vo 1 = [1+R 1 /R 2 ] V 1 R 1 /R 2 V 2 Vo 2 = [1+R 1 /R 2 ] V 2 R 1 /R 2 V 1 V o = Vo 2 - Vo 1 = [1+ 2 R 1 / R 2 ] (V 2 - V 1 ) 12
13 b. Draw and explain the circuit of V to I converter with floating load using OP- AMP. Ans b. (Diagram: 2Marks; Explanation: 2Marks) The input voltage is applied to the non-inverting (+) input terminal of the OP- AMP. Load resistance R L is connected in place of the feedback resistor R F (in the conventional noninverting amplifier) This circuit is also called as current series negative feedback amplifier. This is because the feedback voltage across R 1 is proportional to the output current I o and appears in series with the input voltage. Apply KVL to the input loop V in = V d +V f But as the open loop gain A v of this OP- AMP is very large V d 0 Therefore V in = V F But V in = R 1 x I o (as I B 0) Therefore I o = V in / R 1 13
14 c. Draw the circuit diagram of sample and Hold circuit using OP- AMP. Ans c. (Any relevant correct diagram 4 marks) (OR) 14
15 d. Draw circuit diagram of temperature compensated log amplifier using OP- AMP. Ans d. (Any relevant correct diagram 4 marks) Circuit diagram of temperature compensated log amplifier using OP- AMP e. Explain working of active negative peak detector with neat circuit and waveforms. Ans e. (Diagram: 2 Marks; Working: 1 Mark, waveform: 1 mark) (OR) During the positive half cycle, the potential B at point P is positive. Hence, Diode D 1 is reverse biased and D 2 is forward biased. Hence D 2 by passes the positive voltage towards ground and capacitor C remains un-charged. During negative half cycle, potential P becomes negative, hence D 1 is forward biased. Now, capacitor C starts charging for negative half cycle. And it charges up till the negative peak value. As, the capacitor charges for the negative half cycle, hence, it is called as negative peak detector. 15
16 The MOSFET switch connected across the capacitor is to reset the circuit. By turning on this switch momentarily, we can discharge the capacitor completely. f. Identify the following waveforms. Label the circuit name and draw the circuit diagram for the same (Refer Figure No.2) Ans f. (Identification & labeling 2 marks, Correct circuit 2 marks) The above waveforms are input and output waveform of Schmitt Trigger. 16
17 4. Attempt any FOUR of the following 16 marks a. Draw the circuit diagram and waveforms for non-inverting comparator using OP-AMP. Ans a. (Circuit Diagram: 2M; Waveforms: 2M) Circuit Diagram for non-inverting comparator using OP-AMP Waveforms for non- inverting comparator using OP-AMP 17
18 b. Draw the circuit diagram of second order high pass Butterworth filter with frequency response. Give expression for cut off frequency and gain. Ans b. (Circuit 2 marks, response 1 mark, expression ½ mark each) Cut-off Frequency = Gain = 1 + c. Design a first order Butterworth low pass filter for pass band gain 2 and cut- off frequency 10KHz. Ans c. (Any relevant design with correct formula 2 marks, final design circuit 2 marks) Given: Pass band gain ( = 2 Cut-off Frequency ) = 10 khz Pass band Gain ( is given by the formula = 1 + Here, = 2 Therefore, 2= 1+ So, 1 = 18
19 Therefore, = Let = 10kΩ Therefore, = 10kΩ Assume C = 0.01uF But = But = 10 khz Therefore, 10 khz = So, R = Therefore, R = 1.59kΩ. d. State two merits and two demerits of active filters over passive filters. Ans d. (any 2 merits 2 marks, 2 demerits 2 marks) Merits: 1. Gain and frequency adjustment 2. No loading problem 3. Cost is less Demerits: 1. Stability consideration limits the uses of most of the filters below 100kHz. 2. The selectivity and the centre frequency are often very sensitive function of gain of op- amp or absolute value of feedback. 19
20 3. To obtain required absolute tolerance control, active filter requires additional process steps such as the use of thin film or hybrid technology. e. Draw a neat circuit diagram of all pass filter and explain its working. Ans e. (Diagram: 2Marks; Explanation: 2Marks) Fig: All pass filter It is a special type of filter which passes all the frequency components of the input signal to output without any attenuation. But it introduces a predictable phase shift for different frequencies of the input signal. The all pass filters are also called as delay equalizers or phase correctors. Figure shows an all pass filter with R F =R 1. The input signal is applied to both the input of the OP-AMP. f. Suggest and draw OP- AMP based filter circuit to fulfill following response. (Refer Figure NO.3) Figure 3. 20
21 Ans f. (Naming of circuit 1 mark, circuit diagram 3 marks) The given diagram is the frequency response of Wide Bandpass Filter. 5) Attempt any FOUR of the following: 16 marks a. Draw the circuit diagram of touch plate switch using IC 555 and describe its operation. Ans a. (Circuit Diagram- 2Marks, Operation- 2Marks) Fig: Touch switch circuit diagram 21
22 A touch plate (push to ON) is used to turn on the timer and active the relay. As soon as touch plate is switched ON (pushed), a trigger pulse is produced and applied to pin no. 2 of IC 555, and the output of IC 555 goes high. It will remain high for a period of T ON = 1.1 R A C. The high output of IC 555 activates the transistor Q 1 which in turn energize the relay coil, and closes the N.O (Normally open) contact of the relay. b. Calculate the value of UTP and LTP for Schmitt trigger using IC 555 if V CC = 15V Ans b. (Correct Value of UTP- 2Marks, Correct Value of LTP- 2Marks) Given : V CC = 15V, UTP=?, LTP=? UTP= 2/3 V CC = 2/3 x 15 =10V LTP= 1/3 Vcc= 1/3 x 15= 5V Therefore, UTP= 10V & LTP= 5V c. Design Monostable multivibrator using IC 555 for pulse width t p = 10ms. Draw the designed circuit. Ans c. (Derivation: 2 Marks, Circuit Diagram: 2Marks) Given: t p =10mS Step1: For a monostable multivibrator: Pulse width, t p = 1.1 RC Assume, C= 0.1μF Therefore, 10 x 10-3 =1.1 x R x 0.1 x 10-6 Therefore, R= 10 x 10-3 / 1.1 x 0.1 x 10-6 = 90.9 kω 22
23 d. Draw and explain block diagram of PLL. Ans d. (Block diagram- 2Marks, Explanation:2Marks) Phase locked loop consists of: A phase detector or phase comparator A low pass filter An error amplifier A voltage controlled oscillator (VCO) Phase detector or phase comparator: The two points to a phase detector or comparator are the input voltage V s at frequency f s and the feedback voltage from a voltage controlled oscillator (VCO) at the frequency f o 23
24 The phase detector compares these two signals and produces a dc voltage V e which is proportional to the phase difference between f s and f o. The output voltage V e of the phase detector is called as error voltage. This error voltage is then applied to a low pass filter. Low pass filter: The low pass filter removes the high frequency noise present in the phase detector output and produces output and produces a ripple free dc voltage. This dc voltage is amplified to an adequate level by the amplifier and applied to a voltage controlled oscillator (VCO). The dc amplifier output voltage is called as the control voltage V C. Voltage controlled oscillator (VCO): The control voltage V C is applied at the input of a VCO. The output frequency of VCO is directly proportional to the dc control voltage V C. The VCO frequency f o is compared with the input frequency f s by the phase detector and it (VCO frequency) is adjusted continuously until it is equal to the input frequency f s i.e. f o = f s The three states of operation through which the VCO undergoes are: Free running: There is no control on VCO output frequency f o Capture: The comparison of f o and f s begins. The control voltage V c starts adjusting f o to bring it closer to f s. Phase lock: When f o is exactly equal to f s the PLL is said to be phase locked. Once locked. One locked f o = f s except for a finite phase difference φ e. Draw and explain the working of FM demodulator using PLL. Ans e.( Figure- 2Marks, Explanation-2Marks) 24
25 Operation: The FM signal which is to be demodulated is applied at the input of the PLL. As the PLL is locked to the FM signal, the VCO starts tracking the instantaneous frequency in the FM input signal. The error voltage produced at the output of the amplifier is proportional to the deviation of input frequency from the centre frequency of FM. Thus the ac component of the error voltage represents the modulating signal. Thus at the error amplifier output we get demodulated FM output. The FM demodulator using PLL ensures a highly linear relationship between the instantaneous input frequency and VCO control voltage (error amplifier output) f. Draw and explain the circuit diagram of multiplier using PLL. Ans f. (Diagram- 2Marks, Explanation- 2Marks) Figure shows block diagram of a frequency multiplier using PLL. A divide by N network is connected externally between the VCO output and phase comparator input. Since the output of the divider network is locked to the input frequency f s, the VCO actually operates at a frequency which is N times higher than f s. Therefore, f o = Nf s The multiplying factor can be obtained by proper selection of the scaling factor N. 25
26 6. Attempt any FOUR of the following: 16 marks a. Draw the circuit diagram of Astable multivibrator using IC741 and describe its working. Ans a. (Circuit Diagram-2Marks, Working- 2Marks) Let the voltage on the capacitor C is zero when power is applied to the circuit. Therefore initially voltage at the inverting (- ) input terminal is zero, V 2 = 0. Note that V 2 will be equal to the capacitor voltage V c (V 2 - V c ) Due to some output offset voltage present at the output of the OP- AMP, the voltage V 1 at the non- inverting (+ ) terminal is non zero and will have a value that depends on the output offset voltage and the values of resistances R 1 and R 2. Hence the differential input voltage V d is equal to the voltage V 1 Operation from 0 to t 1 : The voltage V 1 will start driving the OP- MAP output towards saturation. For eg, if V 1 is positive initially then it will drive the compartor output to +V sat (As V d is positive). With the OP- AMP output equal to +Vsat the capacitor C starts charging through R and V C starts increasing exponentially in the positive direction as shown The voltage V 1 across R 1 V 1 = R 1 / (R 1 + R 2 ) V sat therefore V 1 = β V sat where, β = R 1/ R 1 + R 2 β is the feedback factor. Operation from t 1 to t 2 : At t = t 1 the capacitor voltage V c is equal to βv sat. 26
27 As soon as the voltage on C becomes slightly more positive than V 1, the differential voltage V d changes its polarity and the OP- AMP output will suddenly switch to a negative saturation -V sat. Due to this sudden changeover voltage V 1 also becomes negative as V 1 = R 1 / (R 1 + R 2 ) V sat V 1 = - β V sat The capacitor C starts discharging through R and the output stage of the OP- AMP. As soon as V C becomes slightly more negative than V 1, the differential voltage polarity will be at t= t 2 reversed and the OP- AMO output will suddenly switch to a positive saturation i.e. +V sat This process will repeat itself to generate a square waveform at the output of OP- AMP. The equivalent circuits along with the output voltage waveforms. b. Draw the circuit diagram of Wein bridge oscillator using IC 741 and give expression for frequency of oscillation. Ans b. (Circuit Diagram 3 marks, Expression 1 mark) The expression for oscillator frequency is F = 1/2π RC 27
28 c. Draw the circuit diagram and waveforms of Bistable multivibrator using IC 555. Ans c. (Circuit Diagram- 2Marks, Waveforms- 2Marks) 28
29 d. Draw and explain the circuit diagram of phase shift oscillator using IC741. Ans d. (Circuit Diagram- 2 Marks, Explanation- 2Marks) The Op- Amp is used as an inverting amplifier. Therefore it introduces a phase shift of between its input and output. The output of the inverting amplifier is applied at the input of the RC phase shift network. As discussed earlier, this network attenuates the signal at its input and feeds it to the amplifier input. The level of attenuation is decided by the feedback factor β. The gain of the inverting amplifier is decided by the values of R F and R 1. This gain is adjusted in such a way that the product Aβ is slightly greater than 1. It can be proved that the value of feedback factor β at the frequency of oscillations is β =1/29. For sustained oscillations, the loop gain Aβ 1. Therefore, in order to make the loop gain Aβ 1, the gain of the inverting amplifier A should be greater than or equal to 29. Gain of the inverting amplifier is given by A = R F / R 1 Therefore, R F / R 1 29 or R F 29R 1 These values of R F and R 1 will insure sustained oscillations. The expression for frequency of oscillations of an RC phase shift oscillator using OP- AMP is given by f o = 1/ 2π RC 29
30 e. Draw the circuit diagram of Monostable multivibrator using OP- AMP and describe its working. Ans e. (Circuit Diagram- 2 Marks, Working- 2Marks) The connection of a diode in parallel with the timing capacitor C in an astable multivibrator circuit may be used to prevent the inverting input of the op- amp from going positive, thus, resulting in monostable multivibrator. In the stable state, the amplifier circuit is at positive saturation (V os ). In this condition, terminal b is clamped to ground by diode D 1 and terminal a is positive with respect to ground. A narrow negative triggering pulse can be introduced through D 2 to the non-inverting terminal. R 3 is assumed to be greater than D 2 so that its loading effect may be neglected. The diode D 2 avoids any positive noise spike present in the triggering line. 30
31 f. Draw a neat circuit diagram of VCO using IC 555 and explain its working. Ans f. (Circuit Diagram- 2 Marks, Working- 2Marks) Fig: Circuit diagram of VCO using IC 555 The constant current source/ sink block is used to charge and discharge the externally connected timing capacitor C T linearly. The value of charging and discharging current is dependent on the control voltage V C applied at pin number (5) modulating input. This current can also be changed by varying the external timing resistor R T. The potential difference between pins (5) and (6) I almost zero. That means these pins are equipotential. Therefore if we increase the modulating voltage V C at pin number (5), the voltage at pin number (6) will increase with the same amount. This reduces the voltage drop across R T and reduces the charging current. The voltage across the capacitor is thus triangular wave. This triangular wave is applied to a buffer A 1. The buffer is connected in order to avoid to avoid any possible loading of the capacitor. The buffer output is taken out at pin number (4) as triangular wave output. The buffer output is also applied to a Schmitt trigger A 2, which converts the triangular wave into square waveform. Resistors R a and R b is a potential divider generating the reference levels for the upper and lower trigger voltages. This square wave is inverted by inverter A 3 and made available at pin number (3). 31
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