Transformer less Dc Dc Converter with high Step up Voltage gain Method

Transcription

1 International Journal of Engeerg Trends and Technology- olumeissue3- Transformer less Dc Dc Converter with high Step up oltage ga Method KRaja Gopal, B Gavaskar Reddy, Menkateswara Reddy 3, SSrikanth 4, KSuresh 5 Professor, RK College Of Engeerg, ijayawada, India Associate Professor & Head, RK College of Engeerg, ijayawada, India 3 Research scholar, Osmania University, Hyderabad, India 4 MTech (EEE), Mother Theresa Institute of Science & Technology, Satthupalli, India 5 Associate Professor & Head, Chalapathi Institute of Technology, Guntur, India ABSTRACT A new circuit is proposed for a steep step-up of the le voltage It tegrates a switched-capacitor (SC) circuit with a boost converter An SC circuit can achieve any voltage ratio, allowg for a boost of the put voltage to high values It is un regulated to allow for a very high efficiency The boost stage has a regulation purpose It can operate at a relatively low duty cycle, thus avoidg diode-reverse recovery problems The new circuit is not cascade terconnection of the two power stages; their operation is tegrated The simplicity and robustness of the solution, the possibility of gettg higher voltage ratios than cascadg boost converters, without usg transformers with all their problems, and the good overall efficiency are the benefits of the proposed converter Keywords SC, voltage ratio, converters, transformers I INTRODUCTION The Recent emergg technology requires dc-to-dc converters with a steep voltage ratio For example, high-tensity discharge lamps (HID) for automobile headlamps require steppg up the typical - battery voltage to about - output voltage, at 35- W power [] The telecommunication dustry needs to teract with the computer dustry its desire to use the telecom frastructure to provide Internet services The telecom equipment uses a - bus distributed power system, backed by a 48- dc battery plant The formation dustry uses unterruptible power supplies, but the backup time provided by them is not enough; a better choice for providg longer reverse time is to use the - telecom power supply and to boost it to the necessary 38- termediate dc bus This application requires no isolation the dc-to-dc step-up front-end, sce the isolation is provided by the followg stages, which transform the 38- bus to the voltages required by the Servers for data processg The DC-DC fly back converter is a very simple structure with high step-up voltage ga and electrical isolation, but the active switch of this converter will suffer high voltage stress due to the leakage ductance of the transformer For recyclg the energy of the leakage ductance and mimizg the voltage stress on the active switch, some energyregeneration techniques have proposed to clamp the voltage stress on the active switch and to recycle the eakage-ductance energy The coupled ductor techniques provide solutions to achieve high voltage ga, low voltage stress on the active switch, and high efficiency without the penalty of high duty ratio Some literatures research the transformer less DC-DC converters, which clude the cascade boost type, the quadratic boost type, the voltage-lift type, the ISSN: Page 43

2 International Journal of Engeerg Trends and Technology- olumeissue3- capacitor-diode voltage multiplier type and the boost type tegratg with switched-capacitor technique However, these types are all complex and higher cost The modified boost type with switchedductor technique is shown Fig The structure of this converter is very simple Only one power stage is used this converter However, this converter has two issues: (i) Three power devices exist the current-flow path durg the switch-on period, and two power devices exist the currentflow path durg the switch-off period (ii) The voltage stress on the active switch equals the output voltage A transformer less DC-DC high step-up converter is proposed this paper, as shown Fig (a) Compared with the converter, proposed converter I has the followg merits: (i) Two power devices exist the current-flow path durg the switch-on period, and one power device exists the current-flow path durg the switch-off period (ii) The voltage stresses on the active switches are less than the output voltage (iii) Under the same operatg conditions, cludg put voltage, output voltage, and output power, the current stress on the active switch durg the switch-on period equals a half of the current stress on the active switch of the converter For gettg higher step-up voltage ga, the other DCDC converters are also presented this paper, as shown Figs (b) and (c) These three proposed DC-DC converters utilize the switchedductor technique, which two ductors with same level of ductance are charged parallel durg the switch-on period and are discharged series durg the switch-off period, to achieve high step-up voltage ga without the extremely high duty ratio The operatg prciples and steady-state analysis are discussed the followg sections To analyze the steady-state characteristics of the proposed converters, some conditions are assumed as: () All components are ideal The on-state resistance RDS (ON) of the active switches, the forward voltage drop of the diodes, and the ESRs of the ductors and capacitors are ignored () All capacitors are sufficiently large, and the voltages across the capacitors can be treated as constant Fig Transformer less DC-DC high step-up converter II PROPOSED CONERTER I Fig (a) shows the circuit configuration of proposed converter I, which consists of two active switches (S and S ), two ductors ( and ) that have the same level of ductance, one output diode Do, and one output capacitor Co Switches S and S are controlled simultaneously by usg one control signal Fig 3 shows some typical waveforms obtaed durg contuous conduction mode (CCM) and discontuous conduction mode (DCM) The operatg prciples and steady-state analysis of CCM and DCM are presented detail as follows (A) CCM Operation The operatg modes can be divided to two modes, defed as modes and (I) Mode [t, t ]: Durg this time terval, switches S and S are turned on The equivalent circuit is shown Fig 4(a)Inductors and are charged parallel from the DC source, and the energy stored output capacitor Co is released to the load Thus, the voltages across and are given as = = () (II) Mode [t, t ]: Durg this time terval, S and S are turned off The equivalent circuit is shown Fig 4(b) The DC source, and are seriesconnected to transfer the energies to Co and the load Thus, the voltages across and are derived as - o = = () By usg the volt-second balance prciple on and, the followg equation can be obtaed: (3) ISSN: Page 44

3 International Journal of Engeerg Trends and Technology- olumeissue3- T, dt o dt Simplifyg (3), the voltage ga is given by (4) o D Mocm = D From Fig 3(a), the voltage stresses on S, S and Do are derived as o s = s = Do = o + (5) (B) DCM Operation The operatg modes can be divided to three modes, defed as modes,, and 3 (I) Mode [t, t ]: The operatg prciple is same as that for mode of CCM operation The two peak currents of and can be found as (6) I p = I p = DTs, where is the ductance of and (II) Mode [t, t ]: Durg this time terval, S and S are turned off The equivalent circuit is shown Fig 4(b) The DC source, and are series-connected to transfer the energies to Co and the load Inductor currents i and i are decreased to zero at t = t Another expression of I P and I P is given as o I p = I p = DT s (7) (III) Mode 3 [t, t 3 ]: Durg this time terval, S and S are still turned off The equivalent circuit is shown Fig 4(c) The energies stored and are zero Thus, only the energy stored Co is discharged to the load From (6) and (7), D is derived as follows: D D = (8) Fig Proposed high step-up DC-DC converters, (a) converter I, (b) converter II, and (c) converter III From Fig 3(b), the average value of output-capacitor current durg each switchg period is given by (9) DTSI p IoTs I co = DI p Io Ts Substitutg (6) and (8) to (9), Ico is derived as D T ( s o I co = ) R ISSN: Page 45

4 International Journal of Engeerg Trends and Technology- olumeissue3- () Sce Ico equals zero under steady state, equation () can be re-written as follows: D T ( ) s R o () Then, the normalized ductor time constant is defed as T f s, R () where fs is the switchg frequency (fs=/ts) Substitutg () to (), the voltage ga is given by (3) M DCM 4 D T III PROPOSED CONERTER II Fig (b) shows the circuit configuration of proposed converter II, which is proposed converter I with one voltage lift circuit Thus, two ductors ( and ) with the same level of ductance are also adopted this converter Switches S and S are controlled simultaneously by one control signal Fig 6 shows some typical waveforms of CCM and DCM Also, the operatg prciples and steady-state analysis of CCM and DCM are presented as follows (A) CCM Operation The operatg modes can be divided to two modes, defed as modes and (I) Mode [t, t ]: Durg this time terval, S and S are turned on The equivalent circuit is shown Fig 7(a) and are charged parallel from the DC source, and the energy stored Co is released to the load Also, capacitor C is charged from the DC source Thus, the voltages across,, and C are given as (4) C (II) Mode [t, t ]: Durg this time terval, S and S are turned off The equivalent circuit is shown ig 7(b) The DC source,, C, and are seriesconnected to transfer the energies to Co and the load Thus, the voltages across and are derived as (5) c o o By usg the volt-second balance prciple on and, the followg equation can be obtaed as dt T (6) dt Simplifyg (7), the voltage ga is given by M CCM D (7) From Fig 6(a), the voltage stresses on S, S, D, and Do are derived as S S D D (8) (B) DCM Operation The operatg modes can be divided to three modes, defed as modes,, and 3 (I) Mode [t, t ]: The operatg prciple is the same as that for mode of CCM operation The two peak currents of and can be found as P P DT S (9) (II) Mode [t, t ]: Durg this time terval, S and S are turned off The equivalent circuit is shown Fig 7(b) The DC source,, C, and are series-connected to transfer the energies to Co and the load The values for i and i are decreased to zero at t = t Another expression of Ip and Ip is given as () ISSN: Page 46

5 International Journal of Engeerg Trends and Technology- olumeissue3- c DT p p s DT s (III) Mode 3 [t, t 3 ]: Durg this time terval, S and S are still turned off The equivalent circuit is shown Fig 7(c) The energies stored and are zero Thus, only the energy stored Co is discharged to the load From () and (), D is derived as follows: () From Fig 6(b), the average output-capacitor current durg each switchg period is given by () Substitutg () and () to (3), Ico is derived as Fig 6 Some typical waveforms for proposed converter II, (a) CCM operation, and (b) DCM operation (3) Sce Ico equals zero under steady state, equation (4) can be re-written as follows: (4) Thus, the voltage ga is given by ISSN: Page 47

6 International Journal of Engeerg Trends and Technology- olumeissue3- [4] N P Papanikolaou and E C Tatakis, Active voltage clamp flyback converters operatg CCM mode under wide load variation, IEEE Trans Ind Electron, vol 5, no 3, pp 63-64, Jun 4 AUTHORS PROFIE Fig 7 Equivalent circuits of proposed converter II, (a) switches ON, (b) switches OFF, and (c) switches OFF DCM operation I CONCUSION This paper has studied three novel transformers less DCDC converters with high step-up voltage ga The structures of the proposed converters are very simple Sce the voltage stresses on the active switches are low, active switches with low voltage ratgs and low on-state resistance levels RDS(ON) can be selected The steady-state analyses of voltage ga and boundary operatg condition are discussed detail Fally, to illustrate the theoretical analysis, a 4 W prototype circuit of proposed converter I is built the laboratory Menkateswara Reddy, workg as Associate Professor & Head, Deptof EEE at ikas College of Engeerg and Technology, Affiliated to JNTUK, Kakada, AP, India My Research terest cludes Power Electronics and Applications Power Systems Suresh Kornepati, workg as Associate Professor & Head, Deptof EEE at Chalapathi Institute of Technology, Motadaka, Guntur, AP, India My Research terest cludes Power Systems S Srikanth Pursug his MTech(EEE) at Mother therissa stitute of Science and Technology Satthupally, khammam Dist, AP, India My Research terest cludes Power Electronics B Gavaskar Reddy workg as Associate Professor & Head, Deptof EEE at RK College of Engeerg, Affiliated to JNTUK, Kakada, AP, India My Research terest cludes Control sytems,industrial drives K Raja Gopal workg as Professor, Deptof EEE at RK College of Engeerg, Affiliated to JNTUK, Kakada, AP, India My Research terest cludes Power Systems, Industrial drives and Facts REFERENCES [] B Bryant and M K Kazimierczuk, oltage-loop power-stage transfer functions with MOSFET delay for boost PWM converter operatg CCM, IEEE Trans Ind Electron, vol 54, no, pp , Feb 7 [] X Wu, J Zhang, X Ye, and Z Qian, Analysis and derivations for a family ZS converter based on a new active clamp ZS cell, IEEE Trans Ind Electron, vol 55, no, pp , Feb 8 [3] D C u, K W Cheng, and Y S ee, A sgleswitch contuous conduction-mode boost converter with reduced reverse-recovery and switchg losses, IEEE Trans Ind Electron, vol 5, no 4, pp , Aug 3 ISSN: Page 48