STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5

Transcription

1 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 N-channel 800 V, 0.19 Ω typ., 19.5 A MDmesh K5 Power MOSFETs in D 2 PAK, TO-220FP, TO-220 and TO-247 packages Datasheet production data TAB Features TAB 1 D 2 PAK 3 TO-220FP Order code STB25N80K5 STF25N80K5 STP25N80K5 STW25N80K5 V T Jmax R DS(on) max I D 800 V < Ω 19.5 A P TOT 250 W 40 W 250 W TO-220 TO-247 Figure 1. Internal schematic diagram Industry s lowest R DS(on) x area Industry s best figure of merit (FoM Ultra low gate charge 100% avalanche tested Zener-protected Applications Switching applications Description AM01476v1 These very high voltage N-channel Power MOSFETs are designed using MDmesh K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Table 1. Device summary Order code Marking Package Packaging STB25N80K5 D 2 PAK Tape and reel STF25N80K5 STP25N80K5 25N80K5 TO-220FP TO-220 Tube STW25N80K5 TO-247 October 2014 DocID Rev 3 1/23 This is information on a product in full production. 23

2 Contents STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package mechanical data STB25N80K5, D 2 PAK STF25N80K5, TO-220FP STP25N80K5, TO STW25N80K5, TO Packaging information Revision history /23 DocID Rev 3

3 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter D 2 PAK, TO-220, TO-247 TO-220FP Unit V GS Gate- source voltage ± 30 V I D Drain current (continuous) at T C = 25 C (1) A I D Drain current (continuous) at T C = 100 C (1) A (2) I DM Drain current (pulsed) (1) A P TOT Total dissipation at T C = 25 C W I AR E AS V iso dv/dt (3) Max current during repetitive or single pulse avalanche (pulse width limited by T jmax ) Single pulse avalanche energy (starting T J = 25 C, I D =I AS, V DD = 50 V) Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s;t C =25 C) T j Operating junction temperature T stg Storage temperature 1. Limited by package. 2. Pulse width limited by safe operating area. 3. I SD 19.5 A, di/dt 100 A/µs, V Peak V (BR)DSS 6.5 A 200 mj 2500 V Peak diode recovery voltage slope 6 V/ns -55 to 150 C Table 3. Thermal data Symbol Parameter Value TO-220 TO-247 D 2 PAK TO-220FP Unit R thj-case Thermal resistance junction-case max R thj-amb Thermal resistance junction-amb max (1) R thj-pcb Thermal resistance junction-pcb max 30 C/W 1. When mounted on 1inch² FR-4 board, 2 oz Cu. DocID Rev 3 3/23

4 Electrical characteristics STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 2 Electrical characteristics (T CASE = 25 C unless otherwise specified). Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage (V GS = 0) Zero gate voltage drain current (V GS = 0) I D = 1 ma 800 V V DS = 800 V 1 µa V DS = 800 V, Tc=125 C 50 µa I GSS Gate body leakage current (V DS = 0) V GS = ± 20 V ±10 µa V GS(th) Gate threshold voltage V DS = V GS, I D = 100 µa V R DS(on) Static drain-source on resistance V GS = 10 V, I D = 10 A Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V DS =100 V, f=1 MHz, V GS = pf C rss Reverse transfer capacitance pf C o(tr) (1) Equivalent capacitance time related V GS = 0, V DS = 0 to 640 V pf (2) Equivalent capacitance C o(er) pf energy related R G Intrinsic gate resistance f = 1 MHz open drain Ω Q g Total gate charge V DD = 640 V, I D = 19.5 A nc Q gs Gate-source charge V GS =10 V - 10 nc Q gd Gate-drain charge (see Figure 19) - 25 nc 1. Time related is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS 2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as C oss when V DS increases from 0 to 80% V DSS 4/23 DocID Rev 3

5 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Electrical characteristics Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time ns t r Rise time V DD = 400 V, I D = 10 A, R G =4.7 Ω, V GS =10 V ns t d(off) Turn-off delay time (see Figure 21) ns t f Fall time ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current A I SDM Source-drain current (pulsed) - 78 A V (1) SD Forward on voltage I SD = 19.5 A, V GS =0-1.5 V t rr Reverse recovery time I SD = 19.5 A, V DD = 60 V ns Q rr Reverse recovery charge di/dt = 100 A/µs, - 11 μc I RRM Reverse recovery current (see Figure 20) A t rr Reverse recovery time I SD = 19.5 A,V DD = 60 V ns Q rr Reverse recovery charge di/dt=100 A/µs, Tj=150 C - 13 μc I RRM Reverse recovery current (see Figure 20) - 43 A 1. Pulsed: pulse duration = 300µs, duty cycle 1.5% Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)GSO Gate-source breakdown voltage I GS = ± 1 ma, I D = V The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD capability of the device. The Zener voltage is appropriate for efficient and cost-effective intervention to protect the device integrity. These integrated Zener diodes thus eliminate the need for external components. DocID Rev 3 5/23

6 Electrical characteristics STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for D 2 PAK Figure 3. Thermal impedance for D 2 PAK and TO-220 ID (A) AM15722v1 1μs 10 1 Operation in this area is Limited by max RDS(on) 10 μs 100 μs 1ms 10ms Tj=150 C Tc=25 C Single pulse VDS(V) Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP ID (A) AM15723v Operation in this area is Limited by max RDS(on) 10 μs 100 μs 1ms 10ms 0.1 Tj=150 C Tc=25 C Single pulse VDS(V) Figure 6. Safe operating area for TO-220 Figure 7. Normalized B VDSS vs temperature ID (A) AM15724v1 BVDSS (norm) 1.1 ID=1 ma AM15733v Operation in this area is Limited by max RDS(on) 10 μs 100 μs 1ms 10ms Tj=150 C Tc=25 C Single pulse VDS(V) TJ( C) 6/23 DocID Rev 3

7 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Electrical characteristics Figure 8. Safe operating area for TO-247 Figure 9. Thermal impedance for TO-247 ID (A) AM15725v Operation in this area is Limited by max RDS(on) 10 μs 100 μs 1ms 10ms Tj=150 C Tc=25 C Single pulse VDS(V) Figure 10. Output characteristics ID (A) V 10V 15 7V V VDS(V) Figure 12. Static drain-source on-resistance 9V 8V AM15726v1 ID Figure 11. Transfer characteristics (A) AM15727v VDS=20V VGS(V) Figure 13. Gate charge vs gate-source voltage RDS(on) (Ω) 0.3 AM15734v1 AM15728v1 VGS VDS (V) (V) 12 VDS VGS=10V ID(A) Qg(nC) DocID Rev 3 7/23

8 Electrical characteristics STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Figure 14. Capacitance variations C (pf) VDS(V) Figure 16. Normalized on-resistance vs temperature AM15729v1 Ciss Coss Crss Figure 15. Output capacitance stored energy Eoss(μJ) VDS(V) Figure 17. Source-drain diode forward characteristics AM15730v1 RDS(on) (norm) 2.5 VGS=10V ID=10A AM15731v1 VSD (V) 1 TJ=50 C AM15732v TJ=25 C TJ=150 C TJ( C) ISD(A) 8/23 DocID Rev 3

9 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Test circuits 3 Test circuits Figure 18. Switching times test circuit for resistive load Figure 19. Gate charge test circuit VDD VGS VD RG RL D.U.T μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM01468v1 AM01469v1 Figure 20. Test circuit for inductive load switching and diode recovery times Figure 21. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=100μH μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM01470v1 Pw AM01471v1 Figure 22. Unclamped inductive waveform Figure 23. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf ID IDM 0 90% 10% VDS 10% 90% VDD VDD VGS 90% AM01472v1 0 10% AM01473v1 DocID Rev 3 9/23

10 Package mechanical data STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 10/23 DocID Rev 3

11 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Package mechanical data 4.1 STB25N80K5, D 2 PAK Figure 24. D²PAK (TO-263) drawing _U DocID Rev 3 11/23

12 Package mechanical data STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Table 9. D²PAK (TO-263) mechanical data Dim. mm Min. Typ. Max. A A b b c c D D D E E E e 2.54 e H J L L L R 0.4 V /23 DocID Rev 3

13 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Package mechanical data Figure 25. D²PAK footprint (a) Footprint a. All dimension are in millimeters DocID Rev 3 13/23

14 Package mechanical data STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 4.2 STF25N80K5, TO-220FP Figure 26. TO-220FP drawing _Rev_K_B 14/23 DocID Rev 3

15 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Package mechanical data Table 10. TO-220FP mechanical data Dim. mm Min. Typ. Max. A B D E F F F G G H L2 16 L L L L L Dia DocID Rev 3 15/23

16 Package mechanical data STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 4.3 STP25N80K5, TO-220 Figure 27. TO-220 type A drawing 16/23 DocID Rev 3

17 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Package mechanical data Table 11. TO-220 type A mechanical data Dim. mm Min. Typ. Max. A b b c D D E e e F H J L L L L P Q DocID Rev 3 17/23

18 Package mechanical data STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 4.4 STW25N80K5, TO-247 Figure 28. TO-247 drawing _H 18/23 DocID Rev 3

19 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Package mechanical data Table 12. TO-247 mechanical data Dim. mm. Min. Typ. Max. A A b b b c D E e L L L P R S DocID Rev 3 19/23

20 Packaging information STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 5 Packaging information Figure 29. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T Top cover tape P0 D P2 E B1 K0 B0 F W For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R User direction of feed Bending radius AM08852v1 20/23 DocID Rev 3

21 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 Packaging information REEL DIMENSIONS Figure 30. Reel 40mm min. T Access hole At slot location D B C A N Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 Table 13. D²PAK (TO-263) tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A A 330 B B 1.5 D C D D 20.2 E G F N 100 K T 30.4 P P Base qty 1000 P Bulk qty 1000 R 50 T W DocID Rev 3 21/23

22 Revision history STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 6 Revision history Table 14. Document revision history Date Revision Changes 17-Jul First release. 04-Jun Oct Modified: I AR, E AS, dv/dt on Table 2, R DS(on) value on Table 4, entire values on Table 5, 6 and 7 Updated: Section 4: Package mechanical data Minor text changes Updated: Table 11 and Figure 27 Document status promoted from preliminary data to production data Updated title, description and features in cover page. Updated Figure 12: Static drain-source on-resistance. Updated Section 4.1: STB25N80K5, D 2 PAK and Section 4.4: STW25N80K5, TO-247 Minor text change 22/23 DocID Rev 3

23 STB25N80K5, STF25N80K5, STP25N80K5, STW25N80K5 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved DocID Rev 3 23/23