Synchronization of single-channel stepper motor drivers reduces noise and interference
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1 hronizaion of single-channel sepper moor drivers reduces noise and inerference n mos applicaions, a non-synchronized operaion causes no problems. However, in some cases he swiching of he wo channels inerfere, causing audible noise and vibraions from he moor. By synchronizing he swiching in he wo channels, inerference and noise will be cancelled. hronizaion of New JRC s sepper moor drivers The single channel sepper moor drivers NJM31 and NJM30A are no synchronized in he ypical applicaion of fig. 1, i.e. he PWM swiching of one channel is oally independen of he oher cannel. Noe ha he Dual channel drivers (NJM31/ 32/ 33/34 and 35) all are synchronized by design. The basic operaion of he PWM swiching is described in he daa shee of each circui. mprovemens by synchronizaion From he elecrical poin of view, synchronizaion 180 ou of phase gives some major improvemens. Wih wo channels free-running, he peak supply curren will be he sum of he curren in he wo channels, as shown in figure 2. When synchronized 180 ou of phase, he wo channels will never be on a he same ime. Peak supply curren is hen equal o he peak value of one channel. Higher-order harmonics will also be significanly reduced in ampliude. This means a reduced need for power supply filering, or beer filering from he same filering componens. Magneically coupled noise o nearby circuiry will also be reduced as he peak curren and higher order harmonics are reduced. +5 V +5 V Phase A Channel 1{ 1A 0A 8 V V V Phase R CC MM M B 1 NJM30A 0 M A 1 15 Sepper Moor 56 kω +5 V +5 V Phase B Channel 2{ 1B 0B 8 V 1 Phase R V CC M B 1 NJM30A 0 M 15 A 2 4, kω Diodes are UF 4001 or BYV2 rr < 100ns Figure 1. Typical sepper moor driver applicaion wih NJM30A.
2 Curren Channel 1 moor curren Channel 2 moor curren Supply curren Figure 2. Typical supply curren wih wo channels free-running. Curren Channel 1 moor curren Channel 2 moor curren Supply curren Figure 3. Timing diagram wih wo channels during synchronized operaion. V T 1.2 V 0.6 V Channel 2 moor curen off Timing pin volage, V T f pulled low, oupu will urn on. Figure 4. Moor curren and V T volage vs.ime. The design Fig. 3 shows he iming diagram during synchronized operaion. Channel 1 is designaed he maser, and channel 2 he slave. When synchronized, he off-ime of he slave will no be conrolled by he inernal monosable flip-flop, bu by he urn-off of he maser. By increasing he iming capacior value (and hereby increasing he off-imeof he slave), he maser will always give he urn-on rigger pulse before he monosable. As long as he oal duy cycle (he sum of channel 1 & 2 duy cycles), are less han 100%, he wo channel will never be urned on simulaneously. The operaion of he monosable flip-flop is shown in fig 4. n he moor curren oupu-on sae, he V T volage is consanly kep a abou 1.2 V a he T (Timing) pin. When he moor peak curren is reached, he monosable flipflop is riggered, and V T decreases as discharges hrough R T. A V T =0.6 V a comparaor reses he monosable flip-flop, and urns he oupu on again. An exernal sinking oupu conneced o he T-pin could discharge in a very shor ime, and induce an immediae urn-on. The circui diagram is shown in figure 5. A 403 CMOS Schmi rigger NAND-gae and some exernal componens form an edge deecor o generae he sync pulses. Gae #1 deecs he off-sae of channel 1. The volage divider resisor nework including and R2 reduces he inpu volage swing o equal he 403 supply volage. f is below 15 V, 403 can be fed by, and he volage divider nework could be omied.
3 n he off-sae boh M A1 and M A2 are high (= ) giving a low oupu of gae #1. Gae #2 invers he signal, and sends i hrough a high pass filer, acing as a posiive edge deecor. For each posiive ransiion of gae #2 (occurring when channel 1 is urned off), a shor negaive pulse is generaed a he oupu of gae #3. The oher inpu of gae #3 () may be used as a disable inpu. The diode a he oupu of gae #3 makes i a sinking oupu. A each negaive pulse a gae #3 oupu, he capacior of 1.5 nf is discharged, and he oupu of he driver accordingly urned on. +5V Phase A Channel 1A 1{ 0A 8 V Phase R V CC M B 1 NJM 0 30A M A 1 15 Sepper Moor 56 kω 403 #2 #1 R2 10 kω 10 kω +5V 1N4148 Phase B 1B Channel 2{ 0B #3 1N nf 56 kω 8 V R V 1 Phase CC M B 1 NJM30A 0 M 15 A R T Diodes are UF 4001 or BYV2 rr < 100ns Figure 5. Two NJM30A in synchronized operaion using a maser/slave configuraion. Vcc R2 R4 C2 T1 C1 T2 T3 C3 CT RC R3 R5 R6 R GND Figure 6. hronising circui Schemaics.
4 V RC 1/ fosc V V RC- 1/ fsync Figure. Signal a he RC inpu and sync pulse, wihou sync pulse, sync pulse and wih syncpulse. Vcc RC C1 D2 CT D1 GND Figure 8. hronise circui for an square wave sync signal. hronising he RC Oscillaor On NJM31 o NJM3 Mehod 1 To synchronise he RC oscillaor wih an exernal signal You will need some exra ransisors, resisors and capaciors. The synchronising circui in figure 6 works o synchronise wo RC oscillaors or o synchronise he RC oscillaor wih an exernal sync pulse. The free RC oscillaor frequency mus be lower han he sync frequency. For componen value se able below. T1, T3 BC548B T2 BC558B,R5 1k resisor R2,R3,R4 10k resisor R6 40k resisor R 24 resisor,ct Should be chosen afer he sync. frequency.
5 n order o ge he sync circui o work properly he free oscillaor frequency should be as close as possible o he sync frequency. is also imporan ha he negaive slope of he RC signal (see figure ) is minimum 1 µs in order o have he RS flip flop in he sepper moor driver circui se. To calculae your free oscillaor frequency f osc you can use he approximaion formula below: f osc = 1 / ( 0. R T ) f your ime ( see figure ) is o shor, less han 1 µs, hen you can enlarge i by increasing he value of and a he same ime decrease he value of R T o keep he same frequency f osc. This mehod is also useful if you wan o synchronise wo RC oscillaors. You mus chose one o be he maser and he oher o be slave. The maser oscillaor mus have a higher frequency han he slave oscillaors. The same synchronise circui as in figure 6 can be used. Mehod 2 Wih one capacior and wo diodes you can synchronise he RC oscillaor wih an exernal square wave. C1 = 10 nf D1,D2 = 1N4148 = 24 Ω.
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