Outline. Digital Control. Lecture 3

Transcription

1 Outline

2 Outline Outline 1 ler Design 2

3 What have we talked about in MM2? Sampling rate selection Equivalents between continuous & digital Systems

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8 Outline ler Design Emulation Method for 1 ler Design Emulation Method for 2

9 ler Design ler Design Emulation Method for Digital controller can be obtained using: Emulation, which finds the discrete equivalent of a continuous controller Direct discrete design (next lecture)

10 ler Design Frequency Issues Emulation Method for Continuous Systems For a minimum-phase transfer function, the phase is uniquely determined by the magnitude curve: G(jω) n 9 where n is the slope of G(jω) in units of decade of amplitude Discrete Systems The amplitude and phase relationship is lost! The prediction of stability from the amplitude curve alone for minimum-phase systems is lost It is typically necessary to determine both magnitude and phase for discrete systems

11 ler Design Emulation Method Emulation Method for 1 A continuous controller is designed 2 Sample time is selected 3 Discrete equivalent is computed 4 Evaluation of design

12 Outline ler Design 1 ler Design Emulation Method for 2

13 ler Design Case Study: Antenna Control General System Model: J θ + B θ = T c + T d Discarding the disturbances T d gives the transfer function: where a = B J Design Specifications: Θ(s) U(s) = 1 s ( s a + 1) =.1 and u(t) = Tc(t) B. Overshoot to a step input less than 16% (PM 55) Settling time to 1% in less than 1s Tracking error to ramp of slope.1 rad sec less than.1rad Sampling time to give at least 1 samples in a rise-time

14 ler Design Lead Compensator Design for Antenna (FC pp. 375) Step 1 Design the low frequency gain K with respect to the steady-state error specification Antenna system case: K = 1 Step 2 Determine the needed phase lead sys=tf(1,[1 1 ]); margin(sys) PM=18 at ω =.38

15 ler Design Lead Compensator Design for Antenna (FC pp. 375) Step 3 Using lead contribution of φ max = 45 should result in PM=63 which is 8 more than needed. Step 4 Determine: α = 1 sinφ max 1 + sinφ max = 1 sin sin45 =.1716 Step 5 T = 1 = 1 ω max α ω n = 2 α 2.92 α = Giving a zero in s = 1 T =.19 and a pole in s = 1 αt = 1.11.

16 ler Design Lead Compensator Design for Antenna (FC pp. 375) Step 6 Draw the compensated frequency response, check PM Using the formulation: we use: sysd=tf([5.3 1],[.9 1]) sysc=sys*sysd margin(sysc) step(feedback(sysc,1)) D(s) = Ts + 1 αts + 1

17 ler Design Lead Compensator Design for Antenna (FC pp. 375) 4 Bode Diagram Gm = Inf db (at Inf rad/sec), Pm = 56.3 deg (at.55 rad/sec) 1.4 Step Response System: untitled1 Time (sec): 5.65 Amplitude: 1.16 Magnitude (db) System: untitled1 Time (sec): 13.3 Amplitude: Amplitude.8.6 Phase (deg) Frequency (rad/sec) Time (sec) Figure: Frequency response Figure: Step response

18 ler Design Lead Compensator Design for Antenna (FC pp. 375) Step 7 Step 7: Iterate on the design until all specifications are met sysd=tf([1 1],[1 1]) sysc=sys*sysd margin(sysc) syscl=feedback(sysc,1) step(syscl)

19 ler Design Lead Compensator Design for Antenna (FC pp. 375) Bode Diagram Step Response Magnitude (db) Amplitude System: syscl Time (sec): 3.63 Amplitude: 1.16 System: syscl Time (sec): 8.75 Amplitude: Phase (deg) Frequency (rad/sec) Time (sec) Figure: Frequency response Figure: Step response

20 ler Design Digital Lead Compensator for Antenna - Fast Sampling Continuous lead controller Digitization - Fast Sample Rate D(s) = 1s + 1 s + 1 sysc=tf(1,[1 1 ]); lead=tf([1 1],[1 1]); syslead=sysc*lead; Ts=1/2; leadd1=c2d(lead,ts, zoh ); sysd=c2d(sysc,ts, zoh ); syscld=feedback(sysd*leadd1,1); step(syscld)

21 ler Design Digital Lead Compensator for Antenna - Fast Sampling 1.4 Step Response 1.2 System: syscldfast Time (sec): 3.65 Amplitude: 1.18 Amplitude System: syscldfast Time (sec): 8.75 Amplitude: Time (sec)

22 ler Design Digital Lead Compensator for Antenna - Slow Sampling Continuous lead controller Digitization - Slow Sample Rate D(s) = 1s + 1 s + 1 sysc=tf(1,[1 1 ]); lead=tf([1 1],[1 1]); syslead=sysc*lead; Ts=1/2; leadd1=c2d(lead,ts, zoh ); sysd=c2d(sysc,ts, zoh ); syscld=feedback(sysd*leadd1,1); step(syscld)

23 ler Design Digital Lead Compensator for Antenna - Slow Sampling 1.4 System: syscldslow Time (sec): 3.35 Amplitude: 1.35 Step Response 1.2 Amplitude System: syscldslow Time (sec): 13.5 Amplitude: Time (sec)

24 ler Design Effect of Sample Time on Step Response Step Response Continuous Fast sampling Slow sampling 1 Amplitude Time (sec)

25 ler Design Effect of Sample Time on Frequency Response 5 Bode Diagram Magnitude (db) 5 1 Phase (deg) Continuous Fast sampling Slow sampling Frequency (rad/sec)

26 ler Design Effect of Sample Time on Pole Locations 1 Pole Zero Map System: untitled1 Pole : i Damping:.5 Overshoot (%): 16.3 Frequency (rad/sec): 1 System: syscldslow Pole : i Damping:.3 Overshoot (%): 37.3 Frequency (rad/sec): 1.9 Imaginary Axis.2.2 System: syscldfast Pole : i Damping:.482 Overshoot (%): 17.7 Frequency (rad/sec): Real Axis

27 ler Design Incorporating Sampling Delay in System Continuous System G(s) = 1 s(1s + 1) Continuous System with Delay G d (s) = 2/T 1 s + 2/T s(1s + 1)

28 ler Design Lead Compensator for System using Slow Sampling Rate Inserting T = 1/2 G d (s) = 2/T 1 s + 2/T s(1s + 1) 4 = s(s + 4)(1s + 1)

29 ler Design Lead Compensator Design for Antenna Step 1 Design the low frequency gain K with respect to the steady-state error specification Steady-state unchanged from original system: K = 1 Step 2 Determine the needed phase lead sys=tf(1,[ ]); margin(sys) PM=14 at ω =.38

30 ler Design Lead Compensator Design for Antenna Step 3 Using lead contribution of φ max = 5 should result in PM=64 which is 9 more than needed. Step 4 Determine: α = 1 sinφ max 1 + sinφ max = 1 sin5 1 + sin5 =.1325 Step 5 T = 1 ω max α = 1.4 (.1325) = Giving a zero in s = 1 T =.1456 and a pole in s = 1 αt = 1.99.

31 ler Design Lead Compensator Design for Antenna Step 6 Draw the compensated frequency response, check PM Using the formulation: we use: sysd=tf([6.9 1],[.9 1]) sysc=sys*sysd margin(sysc) step(feedback(sysc,1)) D(s) = Ts + 1 αts + 1

32 ler Design Lead Compensator Design for Antenna 5 Bode Diagram Gm = 16.9 db (at 2.5 rad/sec), Pm = 48.6 deg (at.67 rad/sec) 1.4 System: untitled1 Time (sec): 4.76 Amplitude: 1.21 Step Response Magnitude (db) System: untitled1 Time (sec): 13.6 Amplitude: Amplitude.8.6 Phase (deg) Frequency (rad/sec) Time (sec) Figure: Frequency response Figure: Step response

33 ler Design Lead Compensator Design for Antenna Step 7 Step 7: Iterate on the design until all specifications are met sysd=tf([7.5 1],[.68 1]) sysc=sys*sysd margin(sysc) syscl=feedback(sysc,1) step(syscl)

34 ler Design Lead Compensator Design for Antenna Bode Diagram Step Response Magnitude (db) System: syscl Time (sec): 3.9 Amplitude: 1.16 System: syscl Time (sec): 7 Amplitude: 1.1 System: syscl Time (sec): 11.6 Amplitude: Amplitude.8.6 Phase (deg) Frequency (rad/sec) Time (sec) Figure: Frequency response Figure: Step response

35 ler Design Digital Lead Compensator for Antenna - Slow Sampling Continuous lead controller Digitization - Slow Sample Rate D(s) = 7.5s s + 1 sysc=tf(1,[1 1 ]); lead=tf([7.5 1],[.68 1]); syslead=sysc*lead; Ts=1/2; leadd1=c2d(lead,ts, zoh ); sysd=c2d(sysc,ts, zoh ); syscld=feedback(sysd*leadd1,1); step(syscld)

36 ler Design Digital Lead Compensator for Antenna - Comparison Bode Diagram Step Response Magnitude (db) Continuous Slow sampling Compensated slow sampling Phase (deg) Continuous Slow sampling Compensated slow sampling Amplitude Frequency (rad/sec) Time (sec) Figure: Frequency response Figure: Step response

37 ler Design Discretization in Matlab Matlab sysd=c2d(sys,ts,method) method: zoh : Zero order hold foh : First order hold (academic) tustin : Bilinear approximation (trapezoidal) prewarp : Tustin with a specific frequency used for prewarp matched : Matching continuous poles with discrete

38 ler Design Discretization of Lead Compensator - Fast Sample Rate Bode Diagram Step Response ZOH Tustin Matched Magnitude (db) Phase (deg) ZOH Tustin Matched Amplitude Frequency (rad/sec) Time (sec) Figure: Frequency response Figure: Step response

39 ler Design Discretization of Lead Compensator - Fast Sample Rate Pole Zero Map ZOH Tustin Matched Imaginary Axis Real Axis

40 ler Design Discretization of Lead Compensator - Slow Sample Rate Bode Diagram Step Response Magnitude (db) ZOH Tustin Matched Phase (deg) ZOH Tustin Matched Amplitude Frequency (rad/sec) Time (sec) Figure: Frequency response Figure: Step response

41 ler Design Discretization of Lead Compensator - Slow Sample Rate Pole Zero Map Imaginary Axis π/T.9π/T π/t π/t.7π/t.6π/t.5π/t.4π/t π/t.2π/t ZOH Tustin Matched.1π/T.2.9π/T.1π/T.4.6.8π/T.2π/T.8.7π/T.3π/T.6π/T.4π/T 1.5π/T Real Axis

42 ler Design Some important things to remember Discretization of compensator Use the method suited for implementation in the system Discrete equivalent of plant Use method corresponding to implementation (usually ZOH) Simulink can combine discrete compensator with continuous plant (digitization of plant not necessary)

43 ler Design Book: Problem 7.4 Problem 7.5 Problem 7.7