IRFB38N20DPbF IRFS38N20DPbF IRFSL38N20DPbF

Transcription

1 IRFB38N20DPbF IRFS38N20DPbF IRFSL38N20DPbF Applications High frequency DC-DC converters Plasma Display Panel Benefits Low Gate-to-Drain Charge to Reduce Switching Losses Fully Characterized Capacitance Including Effective C OSS to Simplify Design, (See App. Note AN1001) Fully Characterized Avalanche Voltage and Current Lead-Free HEXFET Power MOSFET Key Parameters V DS 200 V V DS(Avalanche) min. 260 V R DS(on) 10V 54 m T J max 175 C D S D G TO-220AB IRFB38N20DPbF D S G D2 Pak IRFS38N20DPbF D S G D TO-262 Pak IRFSL38N20DPbF G D S Gate Drain Source Base part number Package Type Standard Pack Form Quantity Orderable Part Number IRFB38N20DPbF TO-220 Tube 50 IRFB38N20DPbF IRFSL38N20DPbF TO-262 Tube 50 IRFSL38N20DPbF IRFS38N20DPbF D2-Pak Tube 50 IRFS38N20DPbF Tape and Reel Left 800 IRFS38N20DTRLPbF Absolute Maximum Ratings Symbol Parameter Max. Units I T C = 25 C Continuous Drain Current, V 10V 43* I T C = 100 C Continuous Drain Current, V 10V 30* A I DM Pulsed Drain Current 180 P A = 25 C Maximum Power Dissipation 3.8 W P C = 25 C Maximum Power Dissipation 300* W Linear Derating Factor 2.0* W/ C V GS Gate-to-Source Voltage ± 30 V dv/dt Peak Diode Recovery dv/dt 9.5 V/ns T J Operating Junction and -55 to T STG Storage Temperature Range C Soldering Temperature, for 10 seconds (1.6mm from case) 300 Mounting torque, 6-32 or M3 screw 10 lbf in (1.1N m) Thermal Resistance Symbol Parameter Typ. Max. Units R JC Junction-to-Case 0.47* R CS Case-to-Sink, Flat, Greased Surface 0.50 R JA Junction-to-Ambient 62 C/W R JA Junction-to-Ambient ( PCB Mount, steady state) 40 * R JC (end of life) for D2Pak and TO-262 = 0.50 C/W. This is the maximum measured value after 1000 temperature cycles from -55 to 150 C and is accounted for by the physical wear out of the die attach medium. Notes through are on page

2 T J = 25 C (unless otherwise specified) IRFB/S/SL38N20DPbF Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Voltage 200 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.22 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance V GS = 10V, I D = 26A V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µA I DSS Drain-to-Source Leakage Current 25 V µa DS =200 V, V GS = 0V 250 V DS = 160V,V GS = 0V,T J =150 C Gate-to-Source Forward Leakage 100 V I GSS na GS = 30V Gate-to-Source Reverse Leakage -100 V GS = -30V T J = 25 C (unless otherwise specified) gfs Forward Trans conductance 17 S V DS = 50V, I D = 26A Q g Total Gate Charge I D = 26A Q gs Gate-to-Source Charge nc V DS = 100V Q gd Gate-to-Drain Charge V GS = 10V t d(on) Turn-On Delay Time 16 V DD = 100V t r Rise Time 95 I D =26A ns t d(off) Turn-Off Delay Time 29 R G = 2.5 t f Fall Time 47 V GS = 10V C iss Input Capacitance 2900 V GS = 0V C oss Output Capacitance 450 V DS = 25V C rss Reverse Transfer Capacitance 73 ƒ = 1.0MHz pf C oss Output Capacitance 3550 V GS = 0V, V DS = 1.0V ƒ = 1.0MHz C oss Output Capacitance 180 V GS = 0V, V DS = 160V ƒ = 1.0MHz C oss eff. Effective Output Capacitance 380 V GS = 0V, V DS = 0V to 160V Avalanche Characteristics Parameter Min. Typ. Max. Units E AS Single Pulse Avalanche Energy 460 mj I AR Avalanche Current 26 A E AR Repetitive Avalanche Energy 390 mj V DS (Avalanche) Repetitive Avalanche Voltage 260 V Diode Characteristics Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol I S 44 (Body Diode) showing the A Pulsed Source Current integral reverse I SM 180 (Body Diode) p-n junction diode. V SD Diode Forward Voltage 1.5 V T J = 25 C,I S = 26A,V GS = 0V t rr Reverse Recovery Time ns T J = 25 C,I F = 26A Q rr Reverse Recovery Charge C di/dt = 100A/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S +L D ) Notes: Repetitive rating; pulse width limited by max. junction temperature. starting T J = 25 C, L = 1.3mH, R G = 25, I AS = 26A. I SD 26A, di/dt 390A/µs, V DD V (BR)DSS, T J 175 C. Pulse width 300µs; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. This is only applied to TO-220AB package. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN

3 I D, Drain-to-Source Current ) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFB/S/SL38N20DPbF VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 5.0V V µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) µs PULSE WIDTH Tj = 175 C V DS, Drain-to-Source Voltage (V) Fig. 1 Typical Output Characteristics Fig. 2 Typical Output Characteristics I D = 44A 3.0 T J = 25 C T J = 175 C V DS = 15V 300µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics R DS(on), Drain-to-Source On Resistance (Normalized) V GS = 10V T, Junction Temperature ( J C) Fig. 4 Normalized On-Resistance vs. Temperature

4 I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance(pF) V GS, Gate-to-Source Voltage (V) IRFB/S/SL38N20DPbF V GS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd Ciss I D = 26A V DS = 160V V DS = 100V Coss Crss V DS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 175 C T J = 25 C µsec 1msec 1.00 V GS = 0V V SD, Source-toDrain Voltage (V) Tc = 25 C Tj = 175 C Single Pulse 10msec V DS, Drain-toSource Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area

5 I D, Drain Current (A) IRFB/S/SL38N20DPbF Fig 10a. Switching Time Test Circuit T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10b. Switching Time Waveforms 1 Thermal Response (Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) P DM t 1 t 2 Notes: 1. Duty f actor D = t 1 / t 2 2. Peak T J = P DM x Z thjc + T C t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

6 IRFB/S/SL38N20DPbF 900 I D 15V 720 TOP BOTTOM 11A 19A 26A V DS L DRIVER R G D.U.T + I AS - V DD A 20V tp 0.01 Fig 12a. Unclamped Inductive Test Circuit V (BR)DSS tp E AS, Single Pulse Avalanche Energy (mj) Starting Tj, Junction Temperature ( C) Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Fig 13a. Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

7 IRFB/S/SL38N20DPbF Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs

8 IRFB/S/SL38N20DPbF TO-220AB Package Outline (Dimensions are shown in millimeters (inches)) TO-220AB Part Marking Information E X A M P L E : T H IS IS A N IR F L O T C O D E ASSEM BLED O N W W 19, 2000 IN TH E ASSEM BLY LIN E "C" N o te : "P " in a s s e m b ly lin e p o s itio n indicates "Lead - Free" IN T E R N A T IO N A L R E C T IF IE R LO G O ASSEM BLY LO T C O D E P A R T N U M B E R D A T E C O D E YEAR 0 = 2000 W EEK 19 LIN E C TO-220AB packages are not recommended for Surface Mount Application. Notes: 1. For an Automotive Qualified version of this part please seehttp:// 2. For the most current drawing please refer to Infineon website at

9 D2-Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches)) IRFB/S/SL38N20DPbF D2-Pak (TO-263AB) Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DATE CODE P = DESIGNATES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Qualified version of this part please seehttp:// 2. For the most current drawing please refer to Infineon website at

10 IRFB/S/SL38N20DPbF TO-262 Package Outline (Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Qualified version of this part please seehttp:// 2. For the most current drawing please refer to Infineon website at

11 IRFB/S/SL38N20DPbF D2-Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) (.0145) (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065) (.457) (.449) (.609) (.601) (.957) (.941) (.429) (.421) (.634) (.626) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) FEED DIRECTION (.532) (.504) (1.079) (.941) (14.173) MAX (2.362) MIN. NOTES : 1. COMFORMS TO EIA CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION HUB. 4. INCLUDES FLANGE OUTER EDGE (1.039) (.961) (1.197) MAX. 4 Note: For the most current drawing please refer to IR website at

12 Qualification Information Qualification Level Moisture Sensitivity Level RoHS Compliant TO-220AB D2-Pak TO-262 IRFB/S/SL38N20DPbF Industrial (per JEDEC JESD47F) N/A MSL1 (per JEDEC J-STD-020D) Yes N/A Qualification standards can be found at Infineon s web site Applicable version of JEDEC standard at the time of product release. Revision History Date 5/31/2016 Updated datasheet with corporate template. Added disclaimer on last page. Comments Trademarks of Infineon Technologies AG µhvic, µipm, µpfc, AU ConvertIR, AURIX, C166, CanPAK, CIPOS, CIPURSE, CoolDP, CoolGaN, COOLiR, CoolMOS, CoolSET, CoolSiC, DAVE, DI POL, DirectFET, DrBlade, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPACK, EconoPIM, EiceDRIVER, eupec, FCOS, GaNpowIR, HEXFET, HITFET, HybridPACK, imotion, IRAM, ISOFACE, IsoPACK, LEDrivIR, LITIX, MIPAQ, ModSTACK, my d, NovalithIC, OPTIGA, Op MOS, ORIGA, PowIRaudio, PowIRStage, PrimePACK, PrimeSTACK, PROFET, PRO SIL, RASIC, REAL3, SmartLEWIS, SOLID FLASH, SPOC, StrongIRFET, SupIRBuck, TEMPFET, TRENCHSTOP, TriCore, UHVIC, XHP, XMC Trademarks updated November 2015 Other Trademarks All referenced product or service names and trademarks are the property of their respec ve owners. Edi on Published by Infineon Technologies AG Munich, Germany 2016 Infineon Technologies AG. All Rights Reserved. Do you have a ques on about this document? erratum@infineon.com Document reference ifx1 IMPORTANT NOTICE The informa on given in this document shall in no event be regarded as a guarantee of condi ons or characteris cs ( Beschaffenheitsgaran e ). With respect to any examples, hints or any typical values stated herein and/or any informa on regarding the applica on of the product, Infineon Technologies hereby disclaims any and all warran es and liabili es of any kind, including without limita on warran es of non infringement of intellectual property rights of any third party. In addi on, any informa on given in this document is subject to customer s compliance with its obliga ons stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applica ons. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended applica on and the completeness of the product informa on given in this document with respect to such applica on. For further informa on on the product, technology, delivery terms and condi ons and prices please contact your nearest Infineon Technologies office ( Please note that this product is not qualified according to the AEC Q100 or AEC Q101 documents of the Automo ve Electronics Council. WARNINGS Due to technical requirements products may contain dangerous substances. For informa on on the types in ques on please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a wri en document signed by authorized representa ves of Infineon Technologies, Infineon Technologies products may not be used in any applica ons where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury