Talk1: Overview of Power Devices and Technology Trends. Talk 2: Devices and Technologies for HVIC

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1 Talk1: Overview of Power Devices and Technology Trends Talk 2: Devices and Technologies for HVIC Prof. Florin Udrea Cambridge University Taiwan, January

2 Outline Talk 1: Overview of Power Devices and Technology Trends Power Diodes Power MOSFETs IGBTs Super-junction Theorem, Technologies, and Applications Talk 2: Devices and Technologies for HVIC RESURF Concept and Devices RESURF Other Forms BCD, HVCMOS, and SOI Technology Concepts and Applications Q & A 2

3 HV.DC UPS Motor control 100M Capacity (VA) Electric traction Robot, Welding machine 10M Thyristor Auto 1M GTO 100K 10K Refrigerator 1K IGBTs MOSFET Modules Switching Power supply TRIAC 100 Washing machine Air conditioner Microwave HVIC & PIC MOSFET VCR/DVD Power supply for audio K 10K 100K 1M Operation frequency (Hz) 3

4 The Power MOSFET TheThe power MOSFFET is based on a classical low-power MOSFET with an additional drift region to support high voltages. The current flow occurs solely by transport of majority carriers (in this case electrons) and consequently does not lead to storage of excess carrier charge (plasma) as in the case of power bipolar devices (BJTs, thyristors). This allows high switching speed, however at the expense of a relatively high on-state resistance. The first power MOS transistor, fabricated in late 70 s, was the V-groove MOSFET. The channel was formed on the side of an etch formed by selective chemical etching along one of the natural silicon crystal planes. Source Gate n+ n+ Source p -well p -well n- drift region 4 n+ Drain

5 The Power MOSFET R DSON is made up of the series combination of all the parts of the device between the source and drain where there is a voltage drop due to the electron current flow. Some of these components are negligible in some voltage ranges. Note that not all the components shown are linear (for example the JFET resistance or the channel and accumulation layer resistances are voltage dependent), but in the linear region of operation, and for a first order approximation, we can assume that these components behave as resistors. R DS(ON) = R s + R n+ + R ch + R a + R JFET + R drift + R sub + Source R S Gate Source n+ R ch R a n+ p well R n+ R JFET p well n- drift region R drift unipolar conduction electron drift n+ R sub Drain 5 +

6 The Power MOSFET As a switch, in the on-state, the power MOSFET should operate in the linear region where the on-state resistance is minimal. Operation in the saturation region is highly undesirable, as the on-state losses would be too high with no gain in current capability Note that the saturation in the MOS theory refers to the saturation of the current (that is pinch-off of the channel). In bipolar saturation refers to the voltage, more precisely the minimum collector-emitter voltage. The two saturation terms cannot be more different! Quasi-Linear Saturation V GS5 Linear V GS4 V GS5 > V GS4 etc. V GS3 V GS2 V GS1 V GS > V GS(th) 0 V BR V DS 6

7 The Power MOSFET The table below shows the approximate contribution of each of these resistances for two extreme devices, one designed for a 30V and one designed for 600 V device. In general the package resistance R s, the source resistance R n+ and the silicon substrate resistance R sub, are negligible, but their effect in low-voltage, high current devices can still be significant. The channel resistance R ch and the accumulation layer resistance R a, play an important role, especially for the low-voltage devices. These resistances are voltage dependent and they can only be assumed to be constant in the linear region of the MOSFET. Once the drain voltage increases, and the device moves into the quasilinear and saturation regions, these resistance increase very significantly. The percentage values given below are only valid for the linear region. R drift (which in the table below includes R JFET ) is very important for both low voltage (e.g. 30V) and high voltage devices (e.g. 600 V) but it is by far the single highest resistance in high voltage structures. R DS(on) V DS =30V R S =7% R n+ =6% R ch =28% R a =23% R* drift =29% R sub =7% V DS =600V R S =0.5% R n+ =0.5% R ch =1.5% R a =0.5% R* drift =96.5% R sub =0.5% * R JFET is included in R drift 7

8 The famous-infamous limit of silicon The specific drift resistance is given by the drift of electrons through the n- drift layer. Therefore, it can be calculated as: R specific drift = W d σ = Wd qµ N n D W critical 2ε rε = q 0VBR 1 N D 1 2 V BR ε rε ξ 2V = 2 ξ 2 0 critical Wcritical = qn D BR critical R 4 2 VBR 9 specific drift = 3 µ nε rε 0ξcritical V 2.5 BR Silicon 8

9 Superjunction A super-concept for super-low on-state resistance R 4wV BR 1 specific drift superjunction = µ nε rε 0ξcritical w 5/ 4 V BR Silicon superjunction 9

10 Superjunction A super-concept for super-low on-state resistance R 4wV BR 1 specific drift superjunction = µ nε rε 0ξcritical w 5/ 4 V BR Silicon superjunction 10

11 The Cool MOS based on super-junction concept Source Gate n+ n+ Source p well p well p n w = 5-10 um p n+ Drain The doping of the n drift layer is one order of magnitude higher than in a classical power MOSFET (e.g. 5e15cm -3 for 600V) 11

12 The trench MOSFET The trench MOSFET is a variant of a power MOSFET features vertical channels. The n+ sources are self-aligned to the trench and the overall dimensions of the cell can be made much smaller than in the classical power DMOSFET. That means that the channel density is considerably larger than in the classical power DMOSFET. This yields a smaller channel resistance and as a result a smaller on-state resistance. The advantage of a smaller on-state resistance is even more prominent at lower voltage ratings (e.g. 30V, 60V, 100V) where the channel resistance represents a very significant contribution of the overall on-state resistance. Besides this, the current in the trench structure has a more 1D natural flow, avoiding bends and removing the parasitic JFET effect. Channel Source Source n+ p -well n+ Rch L ( Z / A) µ ch Cox (VG VT ) p -well Gate n- drift region n+ Drain F. Udrea Course Sample 12

13 The IGBT equivalent circuit The IGBT has within its structure three MOS- bipolar devices: (i) The cascade MOSFET - PIN diode (ii) MOS base current controlled - wide base PNP transistor (iii) Parasitic MOS turn-on thyristor - must be always suppressed Gate Source/Cathode Source/Cathode n+ n+ p well p well p+ n- drift region p+ Anode 13

14 Trench IGBT Layout- Stripe or Hex? Hexagonal IGBT Stripe IGBT 14

15 Trench IGBT Cross Sections Schematic SEM 15

16 The Hexagonal Trench Structure 16

17 The Carriers Stored Gate Biploar Transistor (CSGBT) Hitachi s variant of an IGBT which uses a trench structure with enhanced PIN diode effect to increase the injection of electrons at the cathode side thus improving the plasma distribution and reducing the on-state losses considerably. 17

18 The Field Stop (or Soft Punch-Through), PT and NPT structures PT - IGBT NPT - IGBT SPT - IGBT Source/Cathode Gate Source/Cathode Gate Source/Cathode Gate n+ n+ n+ p well p well p well 100µm n- drift region 100µm n- drift region 15µm n buffer 190µm 1-2 µm n- buffer field stop 1µm P transparent anode (c) 250µm p+ (substrate) 1µm P transparent anode F. Udrea (b) Course Sample 18 (a)

19 The Field Stop (or Soft Punch-Through), PT and NPT comparison Structure PT -IGBT NPT -IGBT SPT - IGBT Drift layer thickness thin thick Thin Wafer type (for 600 V and 1.2 kv) Epitaxial Float zone (FZ) Float Zone (FZ) Buffer Layer Thick and highly doped N/A Thin and lowly doped P+ anode injector Thick and highly doped (whole substrate) Thin and relatively lowly doped Thin and relatively lowly doped Bipolar gain control Lifetime killing Injection efficiency Injection efficiency On-state losses low medium low Switching losses high medium low Turn-off tail short long short Voltage overshoot (in some applications) high low low Temperature coefficient negative (mostly) positive positive SCSOA (short circuit conditions) RBSOA (reverse bias conditions) medium large large narrow large Large 19

20 The trade-off between on-state voltage and turn-off energy losses for 1.2 kv DMOS PT IGBT, the Trench IGBT and the Trench SPT IGBT Trench PT IGBT Trench NPT IGBT E (mj/cm 2 ) 15 Trench SPT IGBT DMOS PT IGBT Anode Voltage J A = 100 A/cm 2 20

21 Evolution of Devices for Power/HV ICs Power Capability Vertical IGBT Vertical DMOS LIGBT SUPER- JUNCTION RESURF LDMOSFET SOI LDMOS & LIGBT LDMOSFET Lateral MOS with LDD Evolution of Power ICs 70s 80s 80s & 90s 90s 00 21

22 Example of a HVIC in motor control applications Hitachi ECN IGBTs ( 3 LS and 3 HS) 6 free-wheeling diodes ( 3 LS and 3 HS) 6 IGBTs and 6 anti-parallel diodes integrated in one chip Integrated Controller containing: PWM controller Under voltage detection Overcurrent protection 22

23 2 ) Specific On-Resistance (mohm-cm Super-junction, BCD and Power IC Technologies SOI - SIMOX technology High Voltage Vertical Superjunction BCD Technologies Power IC Technology Technologies Breakdown Voltage (V) Si Limit SJ (Denso '06) [25] SJ (Philips '02) [26] SJ (Shindengen '03) [27] SJ (Mitsubishi '00) [28] SJ (Infineon '04) [29] SJ (Fuji Electric '05) [30] SJ (Toshiba '04) [31] SJ (Toshiba '06) [32] SJ (Toyota '04) [33] SJ (Fuji Electric '06) [34] Super 3D MOSFET (Denso '06) [35] SJ (Takaya '05) [36] UMOSFET, Miura '05 [37] Vertical RESURF MOSFET, ISPSD 04 [38] Lateral SJ (Infineon '06) [39] BCD PMOS, Philips '06 [2] BCD NMOS, Philips '06 [2] BCD (Renesas Semi 06) [3] JI (Hardikar '04) [16] Si Limit Lateral Superjunction [39] LIGBT [42] Low Voltage Vertical Superjunction Double RESURF (ISPSD '00) [17] Thin Film SOI LDMOSFET (Letavic '067) [41] LIGBT (Letavic '06) [42] 23

24 BCD linewidth for different voltage rating CMOS Line-Width (Micron) Atmel '02 SMARTIS Alcatel'02 Toshiba'03 TI-LBC6'01 BCD Technologies SOI-BCD STM-BCD6'98 SOI-BCD Toyota' Breakdown Voltage(V) Philips '02 A-BCD3 Renesas Semi '06 Philips '06 A-BCD9 A-BCD9, NMOS, Philips '06 [2] SOI-BCD, Renesas Semi '06 [3] BCD4, NMOS,Toyota '04 [4] BCD6, NMOS [5] BCD6, NMOS [6] BCD5, NMOS [7] BCD6, NMOS [8] BCD6, NMOS [9] SMARTIS-BCD4 24

25 Smart Power Technology roadmap R&D in advanced research 130 TI 180 STM 250 NXP technology node bulk bulk SOI SOI Atmel/X-FAB Denso, Renesas, Toshiba R&D/targeted production voltage 25

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