Specifications are at T A = 25 C

Transcription

1 DEMO MANUAL DCA-B DESCRIPTION Demonstration circuit is a PoE Powered Device (PD) with a synchronous forward isolated power supply featuring the LT and an ideal diode bridge controller (LT). The LT provides IEEE.af (PoE, Type ), IEEE.at (PoE+, Type ), and LTPoE++ PD interfacing and power supply control. When the PD is connected to a PSE, the LT turns on an external, low-resistance, high-power N-channel Hot Swap FET. The LT controls a high-power, small-sized power supply that utilizes a highly efficient, synchronously rectified, active clamp LT, LT PoE with Synchronous Forward and Ideal Diode Bridge forward topology. The LT provides further efficiency improvement by minimizing bridge losses. The DCA-B supplies a V output at up to A. It also demonstrates the use of an optional auxiliary power supply input of V. When present, the auxiliary supply takes priority over the PoE power path. Design files for this circuit board are available at L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their respective owners. PERFORMANCE SUMMARY Specifications are at T A = C PARAMETER CONDITIONS MIN TYP MAX UNITS Port Voltage (V PORT ) At Ethernet Port V Auxiliary Voltage From AUX + to AUX Terminals V Output Voltage V Output Current A Output Voltage Ripple V PORT = V, I OUT = A mvpp Output Regulation ±. % Efficiency V PORT = V, Ethernet Port to Output 9 % Switching Frequency khz BOARD PHOTO Top Side Bottom Side dcabfa

2 DEMO MANUAL DCA-B TYPICAL PERFORMANCE CHARACTERISTICS Top Side Bottom Side Figure. Thermal Pictures V PORT =V, V/A 9 Efficiency vs Load Current. V OUT vs Load Current EFFICIENCY (%) V PORT = V V PORT = V V PORT = V LOAD CURRENT (A) DCAB F V OUT (V) V PORT = V V PORT = V V PORT = V LOAD CURRENT (A) DCAB F Figure. Efficiency (Ethernet Port to Output) Figure. Output Voltage Regulation dcabfa

3 TYPICAL PERFORMANCE CHARACTERISTICS DEMO MANUAL DCA-B Figure. Stresses (V PORT = V, V/A) Figure. Output Voltage Ripple (V PORT = V, V/A) dcabfa

4 DEMO MANUAL DCA-B TYPICAL PERFORMANCE CHARACTERISTICS Figure. Load Transient Response (V PORT = V,.A to A to.a) Figure. Gain and Phase Margin (V PORT = V, V/A) dcabfa

5 DEMO MANUAL DCA-B QUICK START PROCEDURE Demonstration circuit A-B is easy to set up to evaluate the performance of the LT in a PoE application. Refer to Figure for proper equipment setup and follow the procedure below: NOTE: When measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the output voltage ripple by touching the probe tip and probe ground directly across the and VOUT terminals. See Figure 9 for proper scope probe technique.. Place test equipment (voltmeters, ammeters, power supplies, and electronic load) as shown in Figure.. Input supplies: a. Connect a LTPoE+ capable PSE with a CAT- cable to the RJ connector, J such as the DCA-D. b. Or, connect a V to V capable power supply ( Power Supply in Figure ) across VPORTP and VPORTN. c. If evaluating the auxiliary power supply ( Auxiliary Supply in Figure ), connect a V to V capable power supply across AUX + to AUX.. Check for the proper output voltage of V.. Once the proper output voltage is confirmed, adjust the load within the operating range and observe the output voltage regulation, ripple voltage, efficiency, and other parameters. AUXILIARY SUPPLY + POWER SUPPLY + DCA-D LTPoE++ PSE + + ETHERNET CABLE ELECTRONIC LOAD Figure. Proper Measurement Equipment Setup DCAB F GND VIN Figure 9. Measuring Input or Output Ripple dcabfa

6 DEMO MANUAL DCA-B PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DCA Required Circuit Components CG, CG CAP, CER, XR pf kv % MURATA GRQRDKWL CT, CT, CT, CT CAP, CER, XR.µF V % MURATA GRMBRAMAL C9 CAP, ELEC, µf V % X. SUNCON CEKX C, C CAP, CER, XR.µF V % MURATA GRMERAKA C CAP, CER, C CAP, CER, XR µf V % MURATA GRMCRAKA C, C, C9, C CAP, CER, XR.µF V % MURATA GRMRHMA9 C9, C, C, C CAP, CER, XR.nF kv % MURATA GRQRDKWL 9 C CAP, CER, XR nf V % MURATA GRMRAKAD C CAP, CER, XR nf V % MURATA GRMRAKA C, C9 CAP, CER, XR.µF V % KEMET CCKRACTU C CAP, CER, C CAP, CER, COG pf V % TDK CCGHKAA C CAP, CER, XR pf V % AVX CKATA D, D, D DIODE, TVS, PTVSVSUR V SOD NXP PTVSVSUR D DIODE, ZENER, MMSZBS V SOD DIODES INC MMSZBS D DIODE, SCHOTTKY, PDSH V PowerDI DIODES INC PDSH D DIODE, LED,, GREEN ROHM SML-FTTL 9 D DIODE, SILICON, BAV9WS V SOD- DIODES INC. BAV9WS D DIODE, SCHOTTKY, CMMSH-L V SOD-F CENTRAL SEMI. CMMSH-L D IC, REFERENCE, ZRFTA SOT DIODES INC ZRFTA D9 DIODE, SCHOTTKY, BATWS V SOD DIODE INC BATWS 9 E, E, E, E, E, E, E, E, E9 TP, TURRET, PAD-9.9" MILL-MAX J, J CONN, RJ-, SS--NF-K STEWART CONNECTOR SS--NF-K ALTERNATE SS-S-A-NF J, J CONN, BANANA, -." KEYSTONE - L IND, µh DO COILCRAFT DOC- L IND, CMC,.mH WE-LF WÜRTH Q MOSFET, N-CH, PSMN-MSE V LFPAK NXP PSMN-MSE 9 Q TRANSISTOR, PNP, FMMT V SOT DIODES INC. FMMT Q MOSFET, N-CH, FDMCP V POWER FAIRCHILD FDMCP Q, Q, Q9, Q, Q, Q, MOSFET, N-CH, PSMN-MSE LFPAK NXP PSMN-MSE Q, Q RT, RT, RT, RT, RT, RT, RES, CHIP, Ω % NIC NRCJTRF RT, RT R RES, CHIP, k % NIC NRCJTRF R9, R, R RES, CHIP, k % NIC NRCJTRF R, R, R RES, CHIP, R RES, CHIP,.k % NIC NRCJTRF R, R, R RES, CHIP, Ω % NIC NRCZOTRF dcabfa

7 DEMO MANUAL DCA-B PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER R RES, CHIP,.Ω % NIC NRCJRTRF 9 R, R, R RES, CHIP, Ω % NIC NRCZOTRF R RES, CHIP, k % NIC NRCJTRF R RES, CHIP, k % NIC NRCFTRF R RES, CHIP, Ω % VISHAY CRCWRJNEA R RES, CHIP, Ω % NIC NRCZOTRF R RES, CHIP,.k % NIC NRCFTRF R RES, CHIP, k % NIC NRCFTRF R RES, CHIP, Ω % NIC NRCFRTRF T TRANSFORMER, ETHERNET, 9 WÜRTH 9 U, U O, MOCM SOIC- FAIRCHILD MOCM 9 U IC, PoE IDEAL BRIDGE CONTROLLER, LTIUF QFN LINEAR TECHNOLOGY LTIUF MH, MH, MH, MH STANDOFF, SNAP ON,." KEYSTONE DCA-B Required Circuit Components C, C CAP, CER, NP/CG pf V AVX AKATA C CAP, CER, C CAP, CER, NP/CG pf V MURATA GRM9CAJAD C, C CAP, CER, XR µf V % MURATA GRMERCME C CAP, ELEC,. X. SUNCON C, C CAP, CER, C CAP, CER, XR.µF V % MURATA GRMDREKW C CAP, CER, XR nf V MURATA GRMCREKW 9 C CAP, ELEC, µf V % X. SUNCON HVAM C CAP, CER, XR pf V % MURATA GRMRHKAD C CAP, CER, XR µf V % MURATA GRMBRAKAL C CAP, CER, XR pf V % TDK CCGHKAA C CAP, CER, XR.nF V % MURATA GRMRHKAD D DIODE, ZENER, MMSZTG V SOD- ON-SEMI MMSZTG D, D DIODE, SCHOTTKY, CMMSH- V SOD-F CENTRAL SEMI. CMMSH- D9, D DIODE, ZENER, CMHZB.V SOD- CENTRAL SEMI. CMHZB D DIODE, SCHOTTKY, CMMSH- V SOD-F CENTRAL SEMI. CMMSH- L IND,.µH XAL-ME COILCRAFT XAL-ME 9 L IND,.9µH 9 WÜRTH 9 L IND, HC Q9, Q TRANSISTOR, NPN, FMMT V SOT DIODES INC. FMMT Q, Q MOSFET, N-CH, BSCNNS V PG-TDSON- INFINEON BSCNNS Q MOSFET, N-CH, BSC9NNS V PG-TDSON- INFINEON BSC9NNS Q TRANSISTOR, NPN, MMBT9 V SOT DIODES INC. MMBT9 R, R Res, Chip,.k % NIC NRCJTRF R RES, CHIP, k % VISHAY CRCWKJNEA dcabfa

8 DEMO MANUAL DCA-B PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER R RES, CHIP, k % NIC NRCJTRF R RES, CHIP, 9 R RES, CHIP,.Ω % VISHAY CRCWRJNEA R RES, CHIP, Ω % NIC NRCJTRF R RES, CHIP, R9 RES, CHIP, 9.k % VISHAY CRCW9KFKEA R RES, CHIP, m % VISHAY WSLRFEA R RES, CHIP, k % VISHAY CRCWKJNEA R RES, CHIP, Ω % NIC NRCJTRF R RES, CHIP, R RES, CHIP,.k % NIC NRCFTRF R RES, CHIP, Ω % NIC NRCFTRF 9 R9 RES, CHIP,.Ω % NIC NRCFRTRF R, R RES, CHIP, R RES, CHIP,.k % NIC NRCFTRF R9 RES, CHIP, Ω % VISHAY CRCWRJNEA T TRANSFORMER, FORWARD, EPCG-LF EFD PCA EPCG-LF T TRANSFORMER, FORWARD, PLANAR U IC, PD & SWITCHER CONTROLLER, LT QFN LINEAR TECHNOLOGY LTAHUFD dcabfa

9 DEMO MANUAL DCA-B SCHEMATIC DIAGRAM ASSEMBLY VERSION OUTPUT DCA-A DCA-B V/A V/A TP U MOCM R9 k N/C N/C N/C R k E TP REVISION HISTORY ECO REV DESCRIPTION APPROVED DATE PRODUCTION -9- D D D PDSH C.nF AUX+ E KV E VRD T Q EPCG-LF VDS_FREE L.uH J Auxilliary Supply PSMN-MSE HSS V - V VIN XAL-ME L C.9uH 9 C R R R CT Q uf +C K D R BSCNNS G V V + C9 C C PTVSVSUR HVAM +V/A uf.uf.uf C VGS_FREE C D V V V uf LNC Q V FMMT V GREEN VDS_FWD V C VPORTP uh Q -VOUT C BSCNNS G E uf D R BAV9WS nf VPORTP VGS_FWD C E.K V FDMCP C V C C Q VDS_PRI nf C9 V.uF R.nF D CMMSH-L K KV R R9 9.K R BSC9NNS.mH D D. Q R VDS_FREE C PTVSVSUR C PG V - V nf.uf U V CMMSH- V LTAHUFD R L R LIP AUX ISEN+ C C R R.nF FB exposed pad, solder side m R C KV R R K.uF k RCLASS++ % R % ISEN- RCLASS Q LIP R VPORTN ITHB MMBT9 C.K E N/C N/C C9 D pf % R.uF C V VPORTN N/C.uF CMHZ B B TP R R9. R9 R % % C R C R PG k K pf R uf K R U R C C.k C MOCM AUX- K % pf.nf E9 C.nF D9 GND BATWS pf D KV ZRFTA R E.K % GND E Optional Footprints AUX OFF:.V AUX ON:.V AUX HYS:.V VDS_FREE VRD NOTES:. Unless otherwise noted, all resistors on this sheet are, %. Unless otherwise noted, all capacitors on this sheet are and V McCarthy Blvd. VDS_FREE APPROVALS Milpitas, CA 9 A LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A Phone: ()-9 A VIN CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; TECHNOLOGY Fax: ()- HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. +C VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL LTC Confidential-For Customer Use Only.V CT APPLICATION. COMPONENT SUBSTITUTION AND PRINTED VDS_FWD APP ENG. TITLE: SCHEMATIC CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR HIGH EFFICIENCY LTPOE++ PD INTERFACE TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. VDS_PRI CUSTOMER NOTICE THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE SIZE N/A DATE: WITH INTEGRATED SWITCHING REGULATOR IC NO. REV. LTAHUFD, LTIUF DEMO CIRCUIT A-B Tuesday, September, SHEET OF Figure. DCA-B Demo Circuit Schematic (Sheet ) C.uF R L L J NC DNC GND GND_EP GND TP SFST ROSC RLDCMP VPORT HSGATE HSSRC FFSDLY SW VIN SG PG T 9 dcabfa 9

10 DEMO MANUAL DCA-B SCHEMATIC DIAGRAM T 9 Shield REVISION HISTORY ECO REV DESCRIPTION APPROVED DATE PRODUCTION -9- IN FROM J X- D- TX TD X+ D+ LTPoE++ PSE D X- D- TX TD OUT TO PHY D V-V X+ D+ SS--NF-K Shield C 9 X- TX X+ X- TX X+ D- TD D+ D- TD D+ J RT RT RT RT RT RT RT RT DATA- DATA- DATA- C C CG pf KV PoE IDEAL DIODE BRIDGE U VPORTP LTIUF Q9 Q Q D TG TG TG TG TG MMSZBS TG OUTP V D PSMN-MSE PSMN-MSE PSMN-MSE PSMN-MSE DATA- C9 PTVSVSUR IN EN R.uF B DATA- V IN B EP EN DATA- DATA- DATA- DATA- TG TG OUTN 9 VPORTN OUTN Q Q Q Q VPORTN CUSTOMER NOTICE McCarthy Blvd. APPROVALS Milpitas, CA 9 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A Phone: ()-9 A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; A TECHNOLOGY Fax: ()- HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL LTC Confidential-For Customer Use Only APPLICATION. COMPONENT SUBSTITUTION AND PRINTED APP ENG. TITLE: SCHEMATIC NOTES: CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR HIGH EFFICIENCY LTPOE++ PD INTERFACE. Unless otherwise noted, all resistors on this sheet are, % TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. WITH INTEGRATED SWITCHING REGULATOR SIZE IC NO. REV. LTAHUFD, LTIUF N/A DEMO CIRCUIT A-B THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE DATE: Tuesday, September, SHEET OF Figure. DCA-B Demo Circuit Schematic (Sheet ) 9 PSMN-MSE PSMN-MSE PSMN-MSE TG IN BG BG TG IN BG BG 9 SS--NF-K 9 DATA- DATA- DATA- CT CT CT CT.uF.uF.uF.uF CG DATA- DATA- V V V V pf KV Q PSMN-MSE TG DATA- BG BG VPORTP BG BG BG BG TG DATA- BG BG dcabfa

11 pf C R. R.K D9.V CMHZB C p R Q9 FMMT VGS_FWD SCHEMATIC DIAGRAM D CMMSH- C R R.K D.V CMHZB C p DEMO R MANUAL DCA-B Q FMMT D CMMSH- VGS_FREE VDS_FREE C pf R.K C p Q9 FMMT D CMMSH- VDS_FWD C R.K C p Q FMMT D CMMSH- R. D9.V CMHZB R VGS_FWD VGS_FWD R D.V CMHZB R VGS_FREE VGS_FREE CUSTOMER NOTICE APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL PCB DES. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT APP ENG. PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. SCALE = NONE McCarthy Blvd. Milpitas, CA 9 Phone: ()-9 TECHNOLOGY Fax: ()- LTC Confidential-For Customer Use Only TITLE: SCHEMATIC SIZE N/A IC NO. HIGH EFFICIENCY LTPOE++ PD INTERFACE WITH INTEGRATED SWITCHING REGULATOR LTAHUFD, LTIUF DEMO CIRCUIT A-B REV. DATE: Tuesday, September, SHEET OF Figure. DCA-B Demo Circuit Schematic (Sheet ) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dcabfa

12 DEMO MANUAL DCA-B DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology McCarthy Blvd. Milpitas, CA 9 Copyright, Linear Technology Corporation dcabfa LT REV A PRINTED IN USA LINEAR TECHNOLOGY CORPORATION