Synchronization. EE442 Lecture 17. All digital receivers must be synchronized to the incoming signal s(t).

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1 Synchronization EE442 Lecture 17 All digital receivers must be synchronized to the incoming signal s(t). This means we must have a way to perform (1) Bit or symbol synchronization (2) Frame synchronization (3) Carrier and/ or clock synchronization 1

2 Pulse Restoration or Regeneration Goal Function of Amplification Initial Pulse into Channel Pulse as received Function of Regeneration After Amplification Initial Pulse into Channel Pulse as received As Regenerated 2

3 Synchronization Overview Synchronization in a binary receiver: s(t) LPF Regenerator Output Message Incoming Signal Bit Sync Clock Frame Sync Frame Indicator We not only need to recover the data but also the clock (both phase & frequency). After Carlson & Crilly, Communication Systems, 5 th edition,

4 Polar NRZ to Unipolar Open-Loop Bit Synchronization cos 2Rt b s(t) () 2 s 2 (t) BPF Phase Adjust Feeds Clock BPF strips out the Harmonics. f o = R b Contains fundamental f b =1/T b s(t) s 2 (t) cos 2Rt b After Carlson & Crilly, Communication Systems, 5 th edition,

5 Another Open-Loop Bit Synchronization Technique s(t) LPF d/dt () 2 Feeds BPF Clock f o = R b ds/dt produces both + and - pulses; squaring the ds/dt output results in all pulses being +. Next we filter with a high-q BPF centered at the f clock. s(t) ds() t dt ds() t dt 2 After Carlson & Crilly, Communication Systems, 5 th edition,

6 Closed-Loop Bit Synchronization Early/Late Gate Sync (1) Late Gate s(t) T d dt VCO s 1 (t) Absolute Value Loop Filter e s 1 (t) e = s 2 - s 1 T 0 d dt s 2 (t) Absolute Value s 2 (t) Early Gate Bit data synchronization by comparative measurements between the incoming sign s(t) and a locally generated clock signal. This can also be used for carrier tracking. 6

7 Closed-Loop Bit Synchronization Early/Late Gate Sync (2) +1 Data Signal +1 Data Signal -1 s 1 (t) 0 T T-d d Early Gate Integration -1 0 T s 1 (t) Requires a data state change before and after the channel bit. s 2 (t) d T-d Late Gate Integration s 2 (t) Error e = 0 No change! Error e = -2 This reduces the frequency of the VCO clock signal. 7

8 What is a Phase lock Loop? 1. A negative feedback control system whose operation is closely linked to frequency modulation (FM is our next topic) 2. Automatically adjusts the frequency and phase of a controlled oscillator to match a reference (or input) frequency 3. Commonly used for carrier synchronization and indirect frequency demodulation 4. A change in the input signal shows up as a change in phase of the input signal and the VCO frequency

9 Components in a Phase lock Loop 1. Phase detector (phase difference to voltage output) 2. Voltage-controlled oscillator (VCO) 3. Low-pass filter (filters out HF content of phase detector) A cos t ( t) C i Hs () 2B cos t ( t) C o e () o t Lathi & Ding Pages

10 Some Common Applications of a Phase lock Loop 1. Frequency multiplier which multiplies frequency of a reference oscillator 2. Modulator by adding modulating signal to phase error 3. Demodulator which tracks changes in modulation 4. Coherent receiver operating as a narrow band tunable filter to track the carrier frequency 5. Data synchronizer operating as narrow band tunable filter to recover the clock frequency (digital communication systems) 10

11 Phase Detector From a XOR Gate X 1 X 2 X out The area under the pulses is proportional to the phase difference. 11

12 Low-Pass Filtering PD Output V pd 12

13 Low-Pass Filtering PD Output V pd cos( )

14 Example: Costas Receiver Uses a Phase Lock Loop I-channel Input Output Phase Detector Costas carrier recovery PLL for BPSK (Binary Phase Shift Keyed) Q-channel Voltage-controlled Oscillator In the case of carrier-recovery in which coherent demodulation is to be performed on QAM-type signals, the Costas loop has found wide-spread use as an unbiased low-variance practical solution. 14

15 Costas Receiver Uses a Phase Lock Loop Coherent Demodulator Product Modulator cos 2 ft C Low-Pass Filter Local oscillator output Demodulated signal output v 0 (t) signal input Voltage-controlled oscillator Phase Discriminator A m( t) cos 2 f t C C -90 deg Phase Shifter Product Modulator sin 2 ft C Circuit for phase locking ( = 0) Low-Pass Filter 15

16 Questions? 16

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