Lab Exercises. Exercise 1. Objective. Theory. Lab Exercises

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1 Lab Exercises Exercise 1 Objective! Study the generation of differential binary signal.! Study the differential PSK modulation.! Study the differential PSK demodulation. Lab Exercises Theory Carrier and Bit Clock Generator IC808 is a basic waveform generator that generates sine, square, and triangular waveforms. The sine wave generated by the IC808 is used as carrier signal to the system. The square wave generated by IC808 is at the 61V level. So this is converted into a +5V signal with the help of a transistor and diode. Figure.67 shows a carrier and bit clock generator. Figure.67: Carrier and Bit Clock Generator Digital Modulation Techniques II.79

2 Data Generator The square wave is used as a clock input to a decade counter (IC7490), which generates the modulating data outputs. Figure.68 shows a data generator KΩ 1KΩ 1KΩ 1KΩ Bit clock input Data output Figure.68: Data Generator Modulation The differential signal to the modulating signal is generated using an EX-OR gate and a 1-bit delay circuit. CD4051 is an analog multiplier to which the carrier is applied, with and without the 1808 phase shift (created by using an op-amp connected in inverting amplifier mode) to the two inputs of the ICTL084. A differential signal generated by EX-OR gate (IC7486) is given to the multiplexer s control signal input. Depending on the level of the control signal, a carrier signal applied with or without PSK is steered to the output. 1-bit delay generation of differential signal to the input is created by using a d-flip flop (IC7474)..80 Digital Modulation Techniques II

3 Figure.69 shows a DPSK modulator. 1 5 D-Flip Flop Diff data K Ω 16 7 CD K Ω 14 DPSK output Lab Exercises Bit clock Carrier input Figure.69: DPSK Modulator Demodulation During demodulation, the DPSK signal is converted into a +5V square wave signal using a transistor and is applied to one input of an EX-OR gate.to the second input of the gate, carrier signal is applied after conversion into a +5V signal. So the EX-OR gate output is equivalent to the differential signal of the modulating data. This differential data is applied to one input of an EX-OR gate and so for the second input, after a 1-bit delay, the same signal is given. The output of this EX-OR gate is a modulating signal. Digital Modulation Techniques II.81

4 Figure.70 shows a DPSK demodulator. DSPK input 1K Ω 100K Ω OA79 BC K Ω 10K Ω 10K Ω 47 pf BC107 10K Ω 1K Ω BC107 Demodulated output 1K Ω 1K Ω Carrier input 100K Ω OA79 BC K Ω 10K Ω BC107 Problem Statement Lab Setup Figure.70: DPSK Demodulator Study differential PSK modulation and demodulation.! Oscilloscope! Probes and connecting wires DPSK Parts-S. No. Part Description 1 IC7490 IC808 CD IC BC107/ N4 pnp transistors 6 OA79 diodes*.8 Digital Modulation Techniques II

5 The QAM demodulator diagram is shown in Figure.59. Even though there are 8 reference signals, there are only basis functions. As a result, only correlators are required for demodulation. Figure.59: QAM Demodulator If the cosine correlator output is represented as r 1 and the sine correlator output is represented as r, then, l i is defined as: li = ( r1 ai 1) + ( r ai) Where, i = 1,,, M The different l i are calculated, and the set of ai 1 and a i for which the minimum of li occurs is taken as the waveform that is transmitted over that symbol period. Digital Modulation Techniques II.67

6 waveform associated with this correlator is the one present in the symbol period, and the bit pattern associated with that waveform is detected. Figure.41 shows a coherent demodulator for 4-FSK. X Carrier 4 Integrator T Cor 1 Received signal X Carrier X Carrier Integrator Integrator T T Cor Cor Comparator Chose the reference with maximum magnitude si (t) X Carrier 1 Integrator T Cor 4 Figure.41: 4-FSK Demodulator The product signal and the correlator output for the first correlator are shown in figures.4(a) and.4(b), respectively. It can be observed from the product signal that the signal is matched in the fourth symbol period for which the product signal is positive. This indicates high correlation and is observed in the correlator output where the highest magnitude is observed in the fourth symbol period. Similarly, for the second carrier-product signal, shown in figures.4(c) and (d), positive correlation is observed during the second symbol duration. This is also observed in the corresponding correlator output, which shows a peak in the second symbol duration. The subsequent figures.4(e) through.4(h) show high correlation in the third and fourth symbol durations. Digital Modulation Techniques II.47

7 Using this set of basis functions, the QPSK modulator can be realized, as shown in Figure.47. Figure.47: QPSK Modulator Using Basis Functions The QPSK output for a sample sequence of is shown in figures.48(a) and (b). The phase changes at the symbol transitions are observed. (a) Digital Modulation Techniques II.57

8 Matched Filter Receiver Demodulation The coherent demodulator using a matched filter, which is equivalent to the single correlator receiver, is shown in Figure.18. Because this is coherent demodulation, the initial phases of the two carriers in modulation are same. Consequently, a single matched filter whose impulse response is matched to the difference between the two carrier waveforms is sufficient. Figure.18: Coherent Matched Filter FSK Demodulator However, for non-coherent demodulation, two matched filters are required, as shown in Figure.19. This is equivalent to the non-coherent correlator receiver with four correlators and squarers shown in Figure.1 of Electronic Communication Systems II. Figure.19: Non-Coherent Matched Filter FSK Demodulator The FSK modulated output shown in Figure.11(b) is given as input to the noncoherent matched filter FSK demodulator. The space matched filter output is shown in Figure.0(a), where the matched filter output at the decision sampling instants is high for space bits and zero for mark bits. Digital Modulation Techniques II.

9 10.1 Introduction It is essential for you to know more about the aperture efficiency, power-flux density, topocentric angle, and frequency reuse in a satellite communication system before learning details of different parameters of the satellite communication system. These parameters will help you to understand the basics of the satellite communication system Aperture Efficiency Examine the utilization of the physical and the effective area of an antenna. The most commonly used antenna for satellite communication is the paraboloidal reflector antenna, which consists of a primary antenna situated at the focal point of a paraboloidal reflector. Figure 10.1 shows a parabolic reflector, a parabola, and radiation from the paraboloidal reflector and primary radiator. (a) (b) Satellite Communication System Design 10.

10 Ray of primary radiator back lobe Parallel beam Spillover (c) Figure 10.1: a) Parabolic Reflector b) Parabola c) Radiation from the Paraboloidal Reflector and Primary Radiator The physical aperture or mouth of the reflector is circular. The reflector contour, when directed to any plane containing the focal point F and the vertex V, forms a parabola. The path length for the curve in Figure 10.1(b) is FAB 1 1 = FAB. The reflector can focus parallel rays onto the focal point, and it can produce a parallel beam from radiation emanating from this focal point. An isotropic point source is situated at the focal point. The rays are not captured by the reflector constitute spillover. The isotropic point source, also known as the omni-directional source, is the source that radiates in all directions. On the receiver side, spillover increases noise pickup, which can be particularly troublesome in satellite ground stations Satellite Communication System Design

11 A polarization mismatch factor P is used to describe the coupling between polarizations. P = 1 when the two polarizations are the same. P = 0 when the two polarizations are orthogonal. A polarization ellipse is shown in Figure y Ey γ ξx Ex x ξy ξ Figure 10.5: Polarization Ellipse Let r 1 and r be the axial ratios. For two general polarization ellipses, P is given by: 1 1 γ 1 γ + r1 + r 1 ± 4 rr + (1 r )(1 r )cos ( ) P( ± ) = + (1 )(1 ) 1 ± + γ 1 γ (1 + r )(1 + r ) ( r r ) (1 r )(1 r )cos ( ) = (10.7) The +ve sign denotes the same sense of rotation, and the ve sign denotes the opposite sense of rotation, if r 1 = r = 1 and γ 1 = γ. Therefore, P( ) and P ( + ) are given by: 1 4(1)(1) + (1 1)(1 1)(1) P( ) = + = 0 (1 + 1)(1 + 1) (10.8) P ( + ) = 1 (10.9) Satellite Communication System Design 10.11

12 G ena = LNA gain (db); and T pre + m = pre-amplifier and mixer noise temperature ( K). Amplifier Noise Temperature Consider an amplifier of effective bandwidth B and power gain A that is matched to a source with source resistance R at room temperature, where T o =90 K, as shown in Figure R, T0 Vs Psi Power Gain, A Noise Figure, F Figure 10.6: Amplifier Pso, Pn The amplifier noise figure F is defined as: Signal-to- noise power ratio at input F = Signal-to- noise power ratio at output Psi kto B = APsi ( AkToB + Pna) Where, P si = input signal power; P na = additional noise contributed by the amplifier at the; output AkTo B = amplified input thermal noise at the output; and (10.18) k = Boltzmann s constant = Or Pna F = 1 + (10.19) AkT B o Satellite Communication System Design 10.17

13 Figure shows the separation of two geostationary satellites as seen by an earth station. Earth Station β A θ r B Satellite A Satellite B Orbit Figure 10.10: Separation of Two Geostationary Satellites Here, β = angular separation between two satellites in geostationary orbit = θ A θ B θ A and θ B are the longitudes of satellites A and B 10.6 Satellite Communication System Design

14 To analyze the interference to or from an adjacent satellite system, let S 1 be the existing satellite system and S be the proposed satellite system, as shown in Figure S1 β S θ θ S1 S11 S1 S System S1 System S Figure 10.11: Adjacent Satellite Interference The satellite link between the transmitter earth station S 1 and the receiver earth station S 11 is affected by two interference sources: the uplink interference signals from earth stations in the proposed system S and the downlink interference signals coming from satellite S. The total C ratio due to these two interference sources represents the interference I generated by the proposed satellite system S into the adjacent satellite system S Satellite Communication System Design

15 Predicting the Voltage and Current Across the Shunt Branches In circuit analysis, the branch currents and voltages are calculated. The circuit components are connected using series and parallel connections that constitute the branches. The branch currents and voltages depend on the distribution of currents and voltages at the different points of the circuit. The voltage divider and current divider rules are extensively used to predict the branch voltages and currents. Voltage Divider Rule The voltage divider rule provides a means to predict the voltages across each element in a series-connected circuit. Consider a simple resistance circuit as illustrated in Figure 1.1 to explain the voltage divider rule. R1 R R a V1 RL VL The voltage V L across the load resistor rule. The voltage VL across V V R Figure 1.1: Circuit to Explain Voltage Divider Rule L R L can be predicted using the voltage divider R according to the voltage divider rule is: L L = 1 Equation 1.1 R1 + R + R + RL b Basic Circuit Laws 1.

16 It should be noted that the voltage VL is the voltage measured across RL between terminals a and b. If there was another resistor connected in parallel with R L, then the voltage between terminals a and b will be due to the combined effect of the two resistors connected in parallel between terminals a and b, that is: Rab, Vab, = V1 Equation 1. R1 + R + R + Rab, where R a,b is the equivalent resistance of the parallel resistors between terminals a and b. Current Divider Rule The currents flowing through various branches of a circuit can be predicted using the current divider rule. To understand the current divider rule, consider the circuit shown in Figure 1.. It consists of four resistors connected in parallel and a current source. I I1 I I I4 I R1 R R R4 Figure 1.: Circuit to Explain Current Divider Rule The current source supplies a total current I to the four resistors. The total current I is divided into four branch currents according to the resistance in each branch. The branch currents can be calculated using the current divider rule. For example, the current I 1 can be calculated from the following equation: 1 R1 I1 = I R R R R 1 4 Equation Basic Circuit Laws

17 This equation is easy to remember if conductances are used instead of resistances. Conductance of a resistor is just the reciprocal of the resistance. The symbol g is used for representing conductance. The conductance of a resistor R is then: 1 g = Equation 1.4 R The current divider rule to find the current I 1 in the circuit depicted in Figure 1. can then be written as: g1 I1 = I Equation 1.5 g1 + g + g + g4 To find the current in another branch, place the conductance of that branch in the numerator. For example, the current I 4 can be found from: g4 I4 = I g1 + g + g + g4 It should be noted that the sum of all branch currents I 1, I, I, and I 4 is equal to the total current I, that is: I = I1+ I + I+ I4 Equation 1.6 Problem Statement For the circuit displayed in Figure 1., predict the voltage across the shunt branches and current in each shunt branch using voltage divider and current divider rules. Verify the predicted results with the Multisim simulation of the circuit by carrying out the DC operating point analysis. R1 R R 0Ω 680Ω 750Ω V1 4V R4 R5 R6 1K.K.6K Figure 1.: Circuit Diagram Basic Circuit Laws 1.5

18 Procedure 1. Draw the given circuit and mark the currents and output voltage as depicted in Figure 1.4. I R1 R R I 0Ω 680Ω 750Ω I4 I5 I6 V1 4V R4 R5 R6 1K.K.6K Vo Figure 1.4: Circuit Diagram. Calculate the total current I, supplied by the battery, V 1. Record this value in the Observation Table.. Calculate the voltage across the shunt branches V 0 using the voltage divider rule. Record this value in the Observation Table. 4. Calculate the shunt branch currents, I 4, I 5, and I6 using the current divider rule and record these values in the Observation Table. 5. Assemble the circuit in Multisim as shown in Figure R1 R R 0Ω 680Ω 750Ω V1 4V R4 R5 R6 1K.K.6K V 0V V 0V V4 0V 0 Figure 1.5: Circuit Diagram for Multisim 6. Click the Analysis button and select DC Operating Point. 7. In DC operating point analysis window, click Output Variables. 1.6 Basic Circuit Laws

19 Figure 5.5 shows a shift-and-add property verification circuit using MSRG and SSRG. Clock generator Preset 4 14 IC Clear 14 IC Preset 1 10 IC Clear 9 Preset IC Clear 4 6 IC Oscilloscope Lab Exercises Preset 4 14 IC IC IC IC Clear Clear Clear Preset Preset Procedure Figure 5.5: Shift-and-Add Property Verification Circuit Using MSRG 1. Retain the MSRG schematic from Lab Exercise 1.. Retain the second SSRG circuit from Lab Exercise.. Connect the two circuits using a modulo- adder (EX-OR gate, i.e. IC7486), as shown in Figure Give the clock signal and observe the two input codes and the sum input code. 5. Verify if the result input code is a shifted version of the PN code generated using MSRG in Lab Exercise Plot the graphs. Spread Spectrum Techniques I 5.8

Department of Electronics & Communication Engineering LAB MANUAL SUBJECT: DIGITAL COMMUNICATION LABORATORY [ECE324] (Branch: ECE)

Department of Electronics & Communication Engineering LAB MANUAL SUBJECT: DIGITAL COMMUNICATION LABORATORY [ECE324] B.Tech Year 3 rd, Semester - 5 th (Branch: ECE) Version: 01 st August 2018 The LNM Institute