On-Line Dead-Time Compensation Method Based on Time Delay Control

Transcription

1 IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, VOL. 11, NO. 2, MARCH On-Line Dead-Time Compensation Method Based on Time Delay Control Hyun-Soo Kim, Kyeong-Hwa Kim, and Myung-Joong Youn Abstract In this work, an on-line dead-time compensation method based on a time delay control for a pulse-modulation (PM) synchronous motor drive is presented. Disturbance voltages caused by the dead time are estimated on-line without any additional circuits nor off-line experimental measurements. The estimated disturbance voltages are fed back to the voltage reference as compensation. The proposed method is applied to a PM synchronous motor drive system and implemented using a DSP TMS320C31. The experimental results show the effectiveness of the proposed method. Index Terms Dead-time compensation, DSP, pulse-modulation (PM) synchronous motor, time-delay control. I. INTRODUCTION TO AVOID shoot-through in the dc link, a dead time is enforced in which both switches in an inverter leg are off before either switch is closed and this guarantees that both switches will not be on simultaneously. This distorts the output voltage resulting in phase current distortions, torque pulsations, and degradations of control performance [2] [5]. In order to overcome this dead time problem, various approaches have been presented. However, most previous approaches can only be implemented off-line. It is difficult to compensate the dead-time effects perfectly by off-line methods as the switching times and voltage drops of the power devices vary with operating conditions such as the dc link voltage, phase currents, operating frequency, and motor speed [5]. Although an on-line method is proposed in [5], this method needs additional hardware circuits and off-line experimental measurements to set up a look-up table. In this letter, a new on-line dead-time compensation method is proposed. The proposed method does not require any additional hardware circuits and off-line experimental measurements. The disturbance voltages caused by the dead time are estimated by using a time-delay control and fed to the voltage references in order to compensate the dead-time effects. The proposed method is applied to a pulse-modulation (PM) synchronous motor drive system and implemented in a digital manner using a DSP TMS320C31. The experiments are carried out for this system to show the effectiveness of the proposed method. II. ANALYSIS OF DEAD-TIME EFFECT It is convenient to analyze the dead-time effects using one phase leg of a pulsewidth modulation (PWM) inverter and ex- Manuscript received May 22, 2001; revised June 27, Manuscript received in final form July 29, Recommended by Associate Editor J. Chiasson. The authors are with the Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, Daejeon , Republic of Korea ( mmyoun@ee.kaist.ac.kr; hyskim@rainbow.kaist.ac.kr). Digital Object Identifier /TCST Fig. 1. Practical switching pattern and output voltage. tend the results to the other phase legs. During a dead-time period, both switching devices in the same leg are turned off resulting in the output voltage being dependent on the direction of the phase current. Fig. 1 shows the ideal gate signal pattern and Fig. 1 shows a realistic gate signal pattern taking into account the dead time. When the phase current is positive/negative, the phase current flows through the bottom/top diode during the dead-time period. Thus, the switching device in the bottom/top side during this period is considered to be turned on, and each output voltage is as shown in Fig. 1(c) and (d), respectively. From these figures, the output voltage error caused by the dead time and switching time delays can be obtained as follows: where and are the turn-on and turn-off times of the switching device, respectively. Also, the output voltage error and the magnitude of this voltage error can be represented considering the voltage drops of the switching device as follows [4], [5] where (3) and, and are the saturation voltage drop of the active switch and the forward voltage drop of the freewheeling diode, (1) (2) /03$ IEEE

2 280 IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, VOL. 11, NO. 2, MARCH 2003 Fig. 2. Disturbance voltages in the synchronous reference frame (solid line: q-axis disturbance voltage; dotted line: d-axis disturbance voltage). respectively. In a similar way, the output voltage errors of the other phases can also be obtained and these errors can be considered as disturbance voltages caused by the dead time and switching The disturbance time delays. voltages in the frame can be transformed to the synchronous reference frame as follows: Fig. 3. Block diagram of the proposed scheme. Disturbance voltage observer using time delay control. Feedforward compensation scheme. (4) TABLE I SPECIFICATIONS OF EXPERIMENTAL SYSTEM where superscript denotes the variable in the synchronous reference frame. By employing the concept of the field orientation, the -axis current is controlled to be zero. Fig. 2 shows the disturbance voltages as a function of the electrical position using (4) under the assumption that is constant and is positive. The magnitude of the disturbance voltages in the synchronous reference frame is a function of in (3). While the dead time is a fixed value and the dc link voltage can generally be measured, the switching times and voltage drops of switching device are varying with the operating conditions such as the dc link voltage and currents. Since it is difficult to measure the switching times and voltage drops, dead-time compensation in an off-line manner is not easy. III. ESTIMATION AND COMPENSATION OF DEAD-TIME EFFECT The proposed method consists of a simple observer and a feedforward loop, and does not require any additional hardware TABLE II SPECIFICATIONS OF TEST MOTOR circuits and off-line experimental measurements. The disturbance voltages are estimated by a disturbance voltage estimator based on a time-delay control without using the mathematical analysis in (1) (4). In the proposed scheme, the voltage reference of inverter, motor speed, and currents are required.

3 IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, VOL. 11, NO. 2, MARCH Fig. 4. Estimation of disturbance voltages under half load condition (3 A, 150 r/min). The electrical modeling of the PM synchronous motor and inverter including the disturbance voltages in the discrete-time domain is represented as follows: where (5) and is a modified voltage reference and,, and represent the disturbance voltage primarily due to the dead time and nonideal characteristics of the switching device, electrical speed, and linkage flux, respectively. In order to estimate the disturbance voltages using the time delay control, the variations of the disturbance voltages during a sampling period is assumed to be nearly zero as follows [6], [7]: With this approximation, the disturbance voltages at the present time can be estimated using the value at the previous time as follows: where the symbol and the superscript denote the estimated value and the nominal value, respectively. Due to the numerical differentiation of the measured current in (7), high-frequency noise in the measured current will be amplified making it necessary to use a low-pass filter. A simple (6) (7) Fig. 5. Step response of current control. Without dead-time compensation. With dead-time compensation using proposed method. first-order low-pass filter in the discrete-time domain can be represented as follows: where is a cutoff frequency of the low-pass filter. Using (8), the filtered estimates for the disturbance voltages can be obtained as follows: (9) The disturbance voltage estimator is based on a time-delay control as shown in Fig. 3 and the estimated disturbance voltages are fed to the voltage references in order to compensate the dead-time effects as shown in Fig. 3. IV. EXPERIMENTAL RESULTS The proposed compensation method is realized in a DSPbased control system of the PM synchronous motor. The processor is the floating-point DSP (TMS320C31). The sampling period and switching period of the system are set to 150 s and an 8-pole PM synchronous motor is used as a test motor. The (8)

4 282 IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, VOL. 11, NO. 2, MARCH 2003 (c) Fig. 6. Current waveforms under full load condition (6 A): 300 r/min; 600 r/min; and (c) 1200 r/min. other specifications of the experimental system and test motor are shown in Tables I and II, respectively. Fig. 4 shows the estimated -axis disturbance voltages in the synchronous reference frame, when the motor is operated at 150 r/min. The estimated disturbance voltages show nearly the same waveforms as the simulation results as shown in Fig. 2. Fig. 5 shows the -axis current waveforms of two schemes for the step change of the current reference ( -axis current: 0 3 A). Without the compensation scheme, the dead time causes undesired current pulsations of about six times the electrical frequency in the -axis currents and also the distortion in the phase current as shown in Fig. 5. Moreover, the dynamic response of the current is very slow, i.e., it has a time lag of about 20 ms. However, in the proposed scheme, the -axis current pulsations and the distortion in the phase current waveform are remarkably reduced and the dynamic response is faster as shown in Fig. 5. Figs. 6 and 7 show the experimental results of the current control ( -axis current reference: 6 A) at various motor speeds. The -axis currents and phase currents are shown in Fig. 6 and the phase currents and their spectra are shown in Fig. 7.

5 IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, VOL. 11, NO. 2, MARCH (d) Fig. 6. (Continued.) Current waveforms under full load condition (6 A): (d) 2400 r/min. Fig. 7. Spectra of phase currents under full load condition (6 A): 300 r/min and 600 r/min. The results of the proposed scheme show better performance than those of the conventional control scheme for speeds below 1000 r/min. Fig. 8 shows the harmonics in phase currents and -axis currents. When the motor is operated at speeds below 1000 r/min, the phase currents and -axis currents have less harmonics components with the proposed scheme. However, the harmonics components are increased as the motor speed is increased and reach their maximum values at about 1800 r/min. This deterioration is causedbythephasedelayofthelow-passfilterwhichisusedtoreduce the effects of the noise caused by differentiating the current. The cutoff frequency of the low-pass filter is experimentally set to 500 Hz in this system. The test motor has eight poles and as the frequency of the disturbance voltages in the synchronous frame is six times the electrical speed as shown in Fig. 2, this frequency at 1250 r/min is equal to the cutoff frequency of the low-pass filter. Thus, at higher speeds( 1000 r/min), the filter influences system dynamics in a negative fashion.

6 284 IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, VOL. 11, NO. 2, MARCH 2003 (c) (d) Fig. 7. (Continued.) Spectra of phase currents under full load condition (6 A): (c) 1200 r/min and (d) 2400 /min. Fig. 8. Harmonics in current responses (q-axis current reference: 6 A). Fifth and seventh harmonics in phase currents. Sixth harmonics in dq-currents. Moreover, the current harmonics are usually filtered out by the system inertia at a high-speed range, whereas the harmonics in the low-speed range produce noticeable effects that may not be tolerable in applications such as positioning or robotics. V. CONCLUSION A new on-line dead-time compensation method is proposed. The magnitude of the disturbance voltage is varying with the operating conditions and an on-line measurement of this mag-

7 IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, VOL. 11, NO. 2, MARCH nitude is very difficult. In this letter, the disturbance voltages caused by the dead time and nonideal switching characteristics of the power devices are estimated by using a time-delay control approach and fed to the voltage references. The proposed method compensates the dead-time effects in an on-line manner without any additional circuits and off-line experiments. The experimental results demonstrated improved performance of the proposed. The proposed method can be applied to the high-precision PM synchronous motor drive systems. REFERENCES [1] K. Ogata, Discrete-Time Control Systems. Englewood Cliffs, NJ: Prentice-Hall, [2] T. Sukegawa, K. Kamiyama, K. Mizuno, T. Matsui, and T. Okuyama, Fully digital, vector-controlled PWM VSI-fed ac drives with an inverter dead-time compensation strategy, IEEE Trans. Ind. Applicat., vol. 27, pp , May/June [3] J. W. Choi and S. K. Sul, A new compensation strategy reducing voltage/current distortion in PWM VSI systems operating with low output voltage, IEEE Trans. Ind. Applicat., vol. 31, pp , Sept./Oct [4], Inverter output voltage synthesis using novel dead-time compensation, IEEE Trans. Power Electron., vol. 11, pp , Mar [5] A. Munoz-Garcia and T. A. Lipo, On-line dead-time compensation technique for open-loop PWM-VSI drives, in Proc. IEEE Applicat. Power Elect. Conf., Feb. 1998, pp [6] P. H. Chang and J. W. Lee, A model reference observer for time-delay control and its application to robot trajectory control, IEEE Trans. Contr. Syst. Technol., vol. 4, pp. 2 10, Jan [7] K. H. Kim and M. J. Youn, A simple and robust digital control technique of a PM synchronous motor using time delay control approach, IEEE Trans. Power Electron., vol. 16, pp , Jan