16-lead QFN with exposed themal pad and wettable flank (suffix EU, option -P) 16-lead TSSOP with exposed themal pad (suffix LP) VCP

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1 FEATURES AND BENEFITS Overcurrent protection (OP) Motor lead short-to-ground protection Motor lead short-to-battery protection Motor short protection Low-power standby mode Fault output Adjustable current limit option urrent-to-voltage output Synchronous rectification high-side Internal UVLO rossover-current protection Thermal warning and shutdown function AE-Q00 Grade 0 qualified K version PAKAGES: Not to scale DESRIPTION Designed for pulse-width-modulated (PWM) control of D motors, the A5950 is capable of peak output currents up to ±3 A and operating voltages up to 40 V. Input terminals are provided for use in controlling the speed and direction of a D motor with externally applied PWM control signals. Internal synchronous rectification control circuitry is provided to lower power dissipation during PWM operation. Internal circuit protection includes overcurrent protection, motor lead short to ground or supply, thermal shutdown with hysteresis, undervoltage monitoring of VBB, and crossovercurrent protection. The A5950 is supplied in a low-profile 4 mm 4 mm 6-contact QFN (suffix EU ) package with wettable flank option (suffix -P ), or a 6-lead etssop (suffix LP ), all three with exposed power tab for enhanced thermal performance. 6-lead QFN with exposed themal pad (suffix EU, option -T) 6-lead QFN with exposed themal pad and wettable flank (suffix EU, option -P) 6-lead TSSOP with exposed themal pad (suffix LP) VP P P FAULTn RESETn OL OP UVLO TWarn HARGE PUMP VBB Load Supply PHASE Disable ENABLE OUT MODE ONTROL LOGI 7 V OUT OLSEL LSS RSENSE (optional) GND OL OL 5 AIOUT VREF mv Figure : Functional Block Diagram A5950-DS, Rev. 4 MO September 8, 07

2 SPEIFIATIONS SELETION GUIDE Part Number Operating Ambient Temperature Range T A ( ) Packaging Packing A5950GEUSR-T 40 to 05 6-lead QFN with exposed pad 6000 pieces per 3-in. reel A5950GLPTR-T 40 to 05 6-lead TSSOP with exposed pad 4000 pieces per 3-in. reel A5950KEUSR-J 40 to 50 6-lead QFN with exposed pad and wettable flank 6000 pieces per 3-in. reel A5950KLPTR-T 40 to 50 6-lead TSSOP with exposed pad 4000 pieces per 3-in. reel ABSOLUTE MAXIMUM RATINGS haracteristic Symbol Notes Rating Unit Load Supply Voltage V BB 40 V Motor Outputs V OUT to 4 V LSS V LSS ±0.5 V t w < 00 ns ±.5 V Output urrent I OUT ontinuous [] 3 A Transient Output urrent I OUTPK t w < 500 ns internally limited A VREF V REF 0.3 to 6 V Logic Input Voltage Range V IN 0.3 to 6 V Junction Temperature T J 50 Storage Temperature Range T stg 55 to 50 Operating Temperature Range T A Range G 40 to 05 Range K; limited by power dissipation 40 to 50 [] Power dissipation and thermal limits must be observed. THERMAL HARATERISTIS: May require derating at maximum conditions; see application information haracteristic Symbol Test onditions [] Value Unit 6-lead TSSOP JEDE Hi-K board 34 /W (suffix LP) layer PB, -in. copper 5 /W Package Thermal Resistance R qja 6-lead QFN JEDE Hi-K board 36 /W (suffix EU) layer PB, -in. copper TBD /W [] Additional thermal information available on the Allegro website.

3 PINOUT DIAGRAMS AND TERMINAL LIST TABLE FAULTn RESETn VREF OLSEL 3 4 PHASE 5 6 OUTB VBB LSS 5 4 PAD ENABLE MODE 6 7 AIOUT 8 3 OUTA 0 9 GND P P VP P GND OUTA LSS VBB OUTB FAULTn RESETn PAD 6 P 5 VP 4 AIOUT 3 MODE ENABLE PHASE 0 OLSEL 9 VREF 6-Lead QFN (EU) Package Pinout Diagram 6-Lead TSSOP (LP) Package Pinout Diagram Terminal List Table Number Name EU LP Function AIOUT 8 4 Analog sense voltage output P harge pump capacitor P 0 6 harge pump capacitor ENABLE 6 Logic control input FAULTn 7 Open drain logic output, active low GND Ground terminal LSS 4 4 Sense voltage MODE 7 3 Logic control input OLSEL 4 0 Logic control input OUTA 3 3 Motor output OUTB 6 6 Motor output PHASE 5 Logic control input RESETn 8 Logic control input, active low VBB 5 5 Supply voltage VP 9 5 harge pump capacitor VREF 3 9 Analog input to set current limit PAD PAD Exposed pad of the package providing enhanced thermal dissipation 3

4 ELETRIAL HARATERISTIS: G Range Version: Valid at T J = 5, V BB = 5.5 to 40 V (unless noted otherwise) K Range Version: Valid at T J = 40 to 50, V BB = 5.5 to 40 V (unless noted otherwise) GENERAL VBB Supply urrent OUTPUT DRIVERS haracteristics Symbol Test onditions Min. Typ. Max. Unit Source Driver On Resistance Sink Driver On Resistance I BB Outputs off or Brake mode ma I BB(STANDBY) Standby Mode, T J = 5 5 µa Standby Mode, T J = µa R DSON(source) R DSON(sink) I = 3 A, T J = 5, V BB = 8 V 335 mω I = 3 A, T J = 50, V BB = 8 V mω I = 3 A, T J = 5, V BB = 5.5 V 370 mω I = 3 A, T J = 50, V BB = 5.5 V mω I = 3 A, T J = 5, V BB = 8 V 365 mω I = 3 A, T J = 50, V BB = 8 V mω I = 3 A, T J = 5, V BB = 5.5 V 390 mω I = 3 A, T J = 50, V BB = 5.5 V mω Body Diode Forward Voltage V F I = 3 A.5.4 V Output Rise time t R V BB = V, 0% to 90% ns Output Fall Time t F V BB = V, 90% to 0% ns Dead Time (rossover) t D ns LOGI INPUT AND OUTPUT Logic Output Voltage V O I = ma, fault asserted V Logic Output Leakage I FLTn V = 5 V 5 µa V IH PHASE, ENABLE, MODE, OLSEL V Logic Input Voltage V IL PHASE, ENABLE, MODE, OLSEL V V IHRESETn RESETn V V ILRESETn RESETn V Logic Input Hysteresis V HYS PHASE, ENABLE, MODE, OLSEL mv Logic Input Pull-Up urrent I PU OLSEL, MODE; V IN = 0 V µa Logic Input Pull-Down Resistor R PD RESETn, PHASE, ENABLE kω [] For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin. [] For Range G devices, specified limits are tested at a single temperature and assured over operating temperature range by design and characterization. 4

5 ELETRIAL HARATERISTIS (continued): G Range Version: Valid at T J = 5, V BB = 5.5 to 40 V (unless noted otherwise) K Range Version: Valid at T J = 40 to 50, V BB = 5.5 to 40 V (unless noted otherwise) haracteristics Symbol Test onditions Min. Typ. Max. Unit PWM TIMING Blank Time t BLK µs Fixed Off-time t OFF µs Percent Fast Decay P FD Internal PWM chop % VREF Input urrent I VREF 5 < 5 µa VREF Input Range V REF V V REF = V, V REF / V LSS V / V urrent Sense Accuracy, External A VREV V REF = 50 mv, V REF / V LSS V / V SENSE Trip Level, Internal V TRIP OLSEL = low mv I = 00 µa, V LSS = 50 to 00 mv V / V AIOUT Gain A V I = 00 µa, V LSS = 50 to 00 mv V / V Power Up Delay t PU µs PROTETION IRUITS Overcurrent Threshold I OP 3.0 A Overcurrent Blank Time t OBLK µs Overcurrent Off-Time t OP.0..4 ms UVLO Enable Threshold V BBUVLO V BB rising V UVLO Hysteresis V BBUVLO mv VP Undervoltage V PUVLO V P falling V Thermal Warning Temperature T JW Temperature increasing 60 Thermal Warning Hysteresis ΔT JWHYS Recovery = T JW ΔT J 0 Thermal Shutdown Temperature T JSD Temperature increasing Thermal Shutdown Hysteresis ΔT JSDHYS Recovery = T JSD ΔT J 0 [] For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin. [] For Range G devices, specified limits are tested at a single temperature and assured over operating temperature range by design and characterization. 5

6 FUNTIONAL DESRIPTION Device Operation The A5950 is designed to operate D motors. The output drivers are capable of 40 V and 3 A peak operating currents. Actual 00% steady-state D current capability depends on thermal capability of the package and PB, and ambient temperature. N-channel DMOS drivers feature internal synchronous rectification to reduce power dissipation. Peak current can be regulated by fixed off-time pulsewidth-modulated (PWM) control circuitry. Protection circuitry includes thermal shutdown, protection against shorted loads, or protection against output shorts to ground or supply. Undervoltage lockout prevents damage by keeping the outputs off until the driver has enough power supply voltage to operate normally. Internal PWM urrent ontrol When the OLSEL input is left open or tied high, peak output current is set by sensing the current through an external sense resistor. I PEAK = V REF / (0 R SENSE ) When the peak current is exceeded, the driver will operate in mixed decay mode for fixed time t OFF before re-enabling the next drive cycle. To disable the current control feature, leave OLSEL open or tie OLSEL high, and connect LSS to GND. Blank Function The internal current sense circuit is ignored for some time after PWM transitions so as not to falsely sense overcurrent events due to motor capacitance and switching transients. This blank time, typically 3 µs, results in a minimum on-time of the PWM. Standby Mode Low-power standby mode is activated when RESETn is low. Lowpower standby mode disables most of the internal circuitry, including the charge pump and the regulator. When the A5950 is coming out of standby mode, the charge pump should be allowed to reach its regulated voltage (a maximum delay of 400 µs) before any PWM commands are issued to the device. Overcurrent Protection A current monitor will protect the I from damage due to output shorts. If a short is detected, the I will disable the outputs. The fault latch is cleared after a timer of duration t OP expires, and the outputs are re-enabled. During OP events, the absolute maximum ratings may be exceeded for a short time before the device latches off. Thermal Monitoring If the die temperature increases to approximately T JSD, the full bridge outputs will be disabled unit the internal temperature falls below a hysteresis level of T JSDHYS. Thermal warning occurs approximately 0 degrees less than T JSD. Thermal warning triggers a fault but does not disable the drivers. OL Option If the OLSEL input is left open or tied high, inrush and stall current can be controlled by selection of VREF and the sense resistor value. If the OLSEL input is connected to GND, the VREF pin is ignored, and the bridge outputs are latched off when the voltage on SENSE exceeds 500 mv typically. While the outputs are latched off in this condition, the FAULTn output will be asserted and pulled low. As with OP events, the device will then be re-enabled after a timer of duration TOP expires. FAULTn Output FAULTn is an open-drain output and is driven low to indicate any of the following conditions:. OP fault event Short to VBB, GND, shorted load. OL event (if OLSEL = low) 3. Thermal warning 4. Undervoltage (VBB or VP) AIOUT An analog output can be used to monitor the load current flowing through the external sense resistor (if a sense resistor is installed). Positive voltage on the sense resistor is gained by 5 and output on the AIOUT terminal. Negative voltage on the sense resistor is gained by 5 and output on the AIOUT terminal. As the load current does not flow through the sense resistor during a slow-decay (brake) condition, the AIOUT output is approximately 0 V when in slow-decay. 6

7 Table : ontrol Logic RESETn PHASE ENABLE MODE I > I L OUT OUT Function X false H L Forward 0 X false L H Reverse X 0 false H H Brake (slow decay) 0 0 false L H Fast Decay SR [] false H L Fast Decay SR [] X true L/H H hop (mixed decay) [] 0 X true H L/H hop (mixed decay) [] 0 X X X X Z Z Standby Mode [] Outputs change to Hi-Z state when in fast decay and load current approaches zero. 7

8 PIN STRUTURES P, P, OUTA, OUTB, VBB, VP OUTA, OUTB P P VP VBB VBB 8 V V OUTA OUTB 50 V AIOUT, LSS FAULTn LSS AIOUT 5 Ω FAULTn 7.5 V 5. V MODE, OLSEL 3.3 V 3.3 V ENABLE 3.3 V MODE OLSEL 7.5 V 50 kω 5 kω 6 V ENABLE 7.5 V 5 kω 50 kω 6 V VREF RESETn 3.3 V VREF kω RESETn kω 7.5 V 6 V.5 MΩ 7.5 V 50 kω 6 V 8

9 PAKAGE OUTLINE DRAWINGS ± A 4.00 ± X D 0.08 SEATING PLANE PB Layout Reference View 0.30 ± ±0.05 For Reference Only (reference JEDE MO-0WGG) Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown A Terminal # mark area 0.40 ±0.0 B.70 B Exposed thermal pad (reference only, terminal # identifier appearance at supplier discretion) Reference land pattern layout (reference IP735 QFN65P400X400X80-7WM) All pads a minimum of 0.0 mm from all adjacent pads; adjust as necessary to meet application process requirements and PB layout tolerances; when mounting on a multilayer PB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDE Standard JESD5-5) 6 D oplanarity includes exposed thermal pad and terminals.70 Figure : EU Package, 6-Lead QFN with Exposed Thermal Pad 9

10 4.00 ±0.0 6 A 4.00 ±0.0 DETAIL A 7X 0.08 SEATING PLANE 0.0 REF Terminal Length 0.55 ±0.0 DETAIL A 0.30 ± BS 0.75 ±0.05 SLP PLATED AREA 0.05 REF Terminal Thickness 0.03 REF ±0.0 B.5 ±0.0 A For Reference Only (reference JEDE MO-0) Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown Terminal # mark area ± REF B Exposed thermal pad (reference only, terminal # identifier appearance at supplier discretion) oplanarity includes exposed thermal pad and terminals Figure 3: EU Package, 6-Lead QFN with Exposed Thermal Pad and Wettable Flank 0

11 For Reference Only Not for Tooling Use (Reference MO-53 ABT) Dimensions in millimeters. NOTTO SALE Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 5.00 ±0.0 8º 0º B NNNNNNN YYWW LLLL ± ±0.0 A 0.60 ± (REF) D Standard Branding Reference View N = Device part number = Supplier emblem Y = Last two digits of year of manufacture W = Week of manufacture L = haracters 5-8 of lot number 6X Branded Face SEATING PLANE 0.5 SEATING PLANE GAUGE PLANE (BS) (MAX) A B Terminal # mark area Exposed thermal pad (bottom surface); dimensions may vary with device Branding scale and appearance at supplier discretion Figure 4: LP Package, 6-Lead TSSOP with Exposed Thermal Pad

12 Revision History Number Date Description November 4, 06 Initial release April 4, 07 Updated Selection Guide May, 07 orrected packing options in Selection Guide 3 June, 07 Added Pin Structures 4 September 8, 07 Update automotive qualification to grade 0 (p. ); updated test conditions Junction Temperature maximum, Standby Bias urrent, and R DSON values (p. 4-5) opyright 07, reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: