A New Approach to Combined under Voltage and Directional Over Current Protection Scheme

Transcription

1 A New Approach to Combined under Voltage and Directional Over Current Protection Scheme G. Chandra Sekhar, P.S. Subramanyam and B.V. Sanker Ram 3 Vignana Bharathi Institute of Technology, Dept.Of EEE, Aushapur, Ghatkesar(M), Hyderabad, India chandu_vbit@yahoo.com Vignana Bharathi Institute of Technology, Dept.Of EEE, Aushapur, Ghatkesar M), Hyderabad, India subramanyamps@gmail.com 3 JN.T.U.College of Engineering, Dept.Of EEE, Kukaptpally, Hyderabad, -575, A.P, India bvsram43@yahoo.com Abstract To study the protection scheme of Three Phase transmission line the authors have developed Logic Based Under Voltage and Directional Over Current relay for three phase system. A Novel method for the development of a logic Based Combined Under Voltage and Directional Over current Relaying Scheme has been presented here for use in Three Phase Systems using Matlab Simulink tool. When there is any fault the fault voltage will be less and also have a phase difference. The over current detection provides for action when there is any increase in magnitude and phase difference preventing maloperation for legitimate change in power factor or tolerable over load. The Highlight of the scheme is that the present Voltage or Current wave forms are being compared with the previous history of the corresponding wave forms of a few cycles continuously so that when fault occurs the faulted current or voltage wave form is compared with the corresponding previous healthy wave form. It also protects the transmission line from both Under voltage and over load current by using a single relay scheme. Keywords: Protection, Three phase system,, Directional Over Current relay, Under Voltage relay. directional over load current by using a single relay making use of comparison of the faulted wave with the immediately preceding healthy wave over a few cycles just before the acceptance of the faulty condition. This scheme was simulated using SIMULINK of MATLAB software and is tested for various types of faults for both unsymmetrical faults and symmetrical faults. The results obtained in this simulation are up to the expectations. This scheme acts if there is any directional over load and also if there is any under voltage magnitude with phase difference. When there is any fault the fault voltage will be less and also have a phase difference. The over current detection provides for action when there is any increase in magnitude and phase difference preventing maloperation for legitimate change in power factor or tolerable over load. Single Phase Amplitude Comparator for Over Current Protection: The Scheme for Amplitude Comparison in the case of a Single Phase System making use of different blocks of Matlab Simulink is given in Figure and the corresponding wave forms are shown in Fig.. Introduction As The demand for electric power is increasing day by day and requires additional energy sources and additional transmission lines. Here the authors have developed Logic Based Under Voltage and Directional Over Current relay for three phase system Compared to Electro Magnetic Relays and Static Relays, Digital Relays are preferred as they act quickly and can be used in Real Control of Power System. Digital relaying requires additional calculations and Algorithms. On the other hand use of Logic Based Protection [5] has the advantage of instant action as in hardware and the use of simulation eliminates development of special Algorithms. The work makes use of traditional Amplitude and Phase Comparators but in Simulation. In this paper the authors propose a logic based scheme to protect the transmission line from both Under voltage and Fig.. Single phase amplitude comparator for over load protection [Page No. 356]

2 A New Approach to Combined under Voltage and Directional Over Current Protection Scheme Normal prefault Current - Delayed Prefault Current( delayed simulation) - Current Under fault - Amplitude comparator o/p Relay i/p with out delay Relay o/p with delay(on/off delay) after fault Fig. Output wave forms of single phase amplitude comparator with two different delay times Here only one sine block is used for both prefault and fault currents, but to simulate the fault we use different delays. If we use the same delay times, it belongs to prefault and for fault it is different delay times. For same delay times the relay output is zero. The normal current in a line or bus voltage is taken to be. p.u for single phase amplitude and also for phase comparators. In the case of bolted faults at any bus with or without fault impedance the prefault bus current is taken as zero. Normal sinusoidal voltage or current at 5Hz frequency is taken as the reference waveform and represents the healthy condition. The same wave form is extended after the occurrence of disturbance up to the end of simulation period comprising of a few cycles to represent the previous history of healthy condition for comparison with faulty condition. The delayed Sinusoidal Wave Form is considered to represent the Wave Form under Fault current or Under Voltage Conditions which is used for simulation. The prefault bus current will be zero and prefault current in the line will be taken as. p.u. Under shunt fault with no fault impedance the fault bus voltage will be zero. It should be remembered that there is one and only one Wave under two different conditions of healthy and fault conditions. The initial delay is given as one cycle arbitrarily. The simulation is taken for minimum of five cycles so as to have four cycles of previous history for comparison. Fault is assumed to occur at the end of the first cycle from the start of simulation only for simulation purpose. It can be after that instant also before the simulation time is over. The relay has to detect the unhealthy condition in one or less cycle after the fault occurs. The delay for the second wave form gets automatically decided by the time of occurrence of the fault. ( i.e, the instance of occurrence of the fault in the wave cycle) If there is any difference between the two delays used for simulation purpose it does not matter. This condition is relevant if the time of occurrence of the fault is different from the positive zero crossing of the faulty wave. Even if there is any indication of relay action before the stipulated delay for the fault wave form in the output, it doesn t matter, because such a condition cannot occur in practice since there is one and only one current or voltage wave form. The second wave form shown in the figures is of the same wave under fault condition shown separately for comparison with the previous history of the first wave form over integral number of cycles. Even though the phase difference between two waves is zero, if one of the wave forms is shifted, amplitude difference takes place and the relay works. If there is no fault there will be only one wave form, i.e. normal wave and there is no question of amplitude or phase Comparison. The delay in the fault wave form shown here is only meant for simulation and the delay for both wave forms should be same for phase or amplitude comparison and hence comparison takes place. The relay delay (on/off delay) has no reference for the delay in the waveforms, and this delay is necessarily to be less than one cycle in the case of faults for quick action and it functions as restraining coil torque in the electro Magnetic relay. By giving sufficient delay mal-operation of the relay for normal and legitimate over loads for a short duration can be prevented in the case of over load protection. For simulation purpose the fault waveform has to be necessarily shifted only by an integral number of cycles, because there is only one and the same wave form whose nature changes under fault. In the case of Amplitude Comparison, the amplitude of the normal current wave is compared by the Relational operator Block with the amplitude of the current wave under fault which will be much larger and gives a digital output one when there is a fault. The Discrete Monostable Block extends the output of the relational block till the end of the simulation time by giving parameter pulse duration equal to simulation time. Under fault, the fault current will be much larger, many times the normal full load current. Single Phase under Voltage Relay In the case of under voltage relay, since the normal voltage is compared with fault voltage, the relational block will have the > sign operator since the amplitude of the normal voltage will be greater than the voltage under fault. The bus voltage under fault will be either zero for direct shunt fault with no fault resistance or much less than the normal voltage. For other under voltage conditions the under voltage will have less amplitude compared to normal voltage. The simulation diagram for Single Phase Under Voltage relay and the corresponding wave forms are shown in Figs.3 & 4 respectively. Fig.3 Single Phase Under Voltage Relay [Page No. 357]

3 5 th IEEE International Conference on Advanced Computing & Communication Technologies [ICACCT-] ISBN Normal prefault voltage - Delayed Prefault voltage( delayed simulation) - S.C Bus voltageunder fault - Amplitude comparator o/p UV Relay i/p with out delay U.V Relay o/p with delay(on/off delay) after fault Fig.4 Output wave forms of single phase Under voltage Relay Phase Comparator For Single Phase. The scheme for phase comparator is similar to the amplitude comparator except that the relational block is replaced by Complex Phase Difference Block which can be obtained from Communications block set/utility blocks tool box. Here also the phase of the first wave form is compared with the phase of the second wave form. If the phase difference is 8 o or Π radians this will cause the Relay to act as Reverse Current Relay. In the Phase Comparison used for Line Protection, the receiving end fault current may have a phase difference with reference to the sending end current.if the phase difference is 8 degrees we have a reversre current relay. The Phase Comparator gives the directional feature to the relay. Phase comparator need not be used for Under Voltage Relay as the voltage at the faulted bus will be zero for direct shunt fault with no fault resistance. The simulation diagram for phase comparator of Single Phase System and the corresponding wave forms are shown in Fig.5 & 6 resp. Prefault i/p current (for academic purpose) - delayed prefault ( For academic purpose) - fault current in p.u - phase.comp o/p ( for 6 degrees phase difference) 4 relay input Relay output with delay (on/off delay) Fig.6 Output wave forms for Phase comparator of Single Phase System Directional Over Load And Under Voltage Relay For Three Phase System. The simulation diagram shown in fig.7 gives the protection of three phase system from under voltages and over load currents. Here the authors proposed a unique scheme of logical protection from under voltage and over load currents for a three phase system. In the case of three phase system for line comparison of any single phase the normal prefault bus current is taken to be. p.u. In the case of direct shunt fault at bus the prefault bus current I f =. But it has been taken as.p.u for simulation purpose instead of zero. In the case of three phase system for line comparison of any single phase the normal prefault bus voltage is taken to be. p.u.in the case of direct shunt fault at bus the prefault bus voltage V f =. But it has been taken as.p.u for simulation purpose instead of zero. Fig.5 Phase Comparator for Single Phase System Fig.7. Three phase Under voltage and Over load Protection scheme The outputs of both magnitude and phase comparators is given to Logic AND gate because the relay will give trip signal when there is amplitude and phase difference preventing maloperation during legitimate change in load power factor. The output of Under voltage scheme and Over [Page No. 358]

4 A New Approach to Combined under Voltage and Directional Over Current Protection Scheme load schme is given to Logic OR gate so that the relay will give trip signal when either or both of the two exists. The above scheme has been studied for Unsymmetrical (L-G) fault [7] and the results obtained are on expected lines. The wave forms after simulation are shown in Fig.9. The proposed circuit is also counter checked by giving fault values as prefault values for getting no signal to the relay. The phase components of bus voltage at bus3 during single L-G fault is Example The single line diagram for the sample problem [7] is shown in Fig.8 and the line and generator data are given in Table No. and Table No..( All parameters are expressed in p.u). The Protection scheme for the same problem has been checked and the respective wave forms are presents here. here for unsymmetrical L-G fault at bus 3. Table. Bus code Self Impedance Mutual Impedance Posi tive Negativ e Zer o Zero Sequence Coupling Element -() () -() () Fig.9 Output wave forms for Three Phase directional over current Protection scheme (for L-G fault at bus 3) Fig.8 Single line diagram for sample problem Table. General Reactances Generator Number Impedancee Positive Negative Zero.4. After doing the short circuit analysis the fault currents at bus 3 for Unsymmetrical L-G fault are found [7] to be as Conclusion: The proposed scheme consists of Comprehensive Logic Based Protection Schemes for thee Phase System which will be comparable or better to the existing Schemes. Traditional Amplitude and Phase Comparison had been adapted to apply for Logic Based Protection Schemes. Logic Based Protection has the advantage of instant action as in hardware and the use of simulation eliminates development of special Algorithms. The Highlight of the scheme is that the present Current or Voltage wave forms are being compared with the corresponding wave forms of a few cycles continuously so that when fault occurs the faulted current or voltage wave form is compared with the corresponding previous history of the healthy wave form. This scheme was simulated using MATLAB and is tested for various types of faults for both unsymmetrical faults and symmetrical faults. First the Scheme had been developed for Single Phase System and then extended to Three Phase System. The results obtained in this simulation are up to the expectations. Instead of using two different relays for under voltage and over load current, this scheme gives better results to protect the transmission line from both Under voltage and over load current by using a single relay. This Scheme Can be extended to work for Logic Based Protection of Six Phase System. [Page No. 359]

5 5 th IEEE International Conference on Advanced Computing & Communication Technologies [ICACCT-] ISBN References [] H.C. Barnes, L.O. Barthold, High phase order power transmission, Presented by Cigre Sc. Electra No.4, 973, pp [] P.S.Subramanyam, Contributions to the analysis of six phase system Ph.D. Thesis, IIT, Madras, March 983. [3] P.S.Subramanyam, A. Chandra Sekharan, S.Elangovan, Dual three phase transformation for comprehensive fault analysis of as six phase system, Electric power systems research, 997, Paper No. EPSR 3. [4] J.R. Stewert, D.D. Willems, High phase order transmission- A feasibility analysis part-i steady state considerations, Part-II- Over voltages and insulation requirements, IEEE Trans.On PAS, Vol.9No.6, Nov/Dec.978, pp [5] G.Chandra Sekhar, P.S.Subramanyam, B.V.Sanker Ram, Logic based detection of Negative sequence currents for six phase system International Journal of Applied Engineering Research, ISSN , Vol 6, Number 6(), pp.3-3. [6] S.S. Venkata, W.C. Guyker, W.H. Booth, L. Kondragunta, N.K. Saini, E.K. Stanek, 38kV six phase transmission system-fault analysis, IEEE Trans. On PAS, Vol., No.5, May 98, pp.3-8. [7] Computer Techniques in Power System Analysis by M.A.Pai, Tata McGraw-Hill Publishing Company Ltd, First Edition 98, pp.3-9. About the Author P S Subrahmanyam received his Bachelor of Engineering in Electrical Engineering from Andhra University & Masters Degree in Electrical Power Systems from Jawaharlal Nehru Technological University. He received his PhD from IIT Madras. He published a number of papers in National and International Journals and several text books. Basically from Electrical Engineering discipline, he cross migrated to the field of Computer Science and Engineering. His areas of interest are Power Systems including Six Phase Systems, Six Phase Induction Motors and Power electronics. Dr. Pisupati Sadasiva Subramanyam is a fellow of The Institution of Engineers (India), Fellow of National Federation of Engineers, Senior Member of IEEE, Member of Computer Society of India, and Member of Indian Society for Technical Education B.V. Sanker Ram received his Bachelor of Engineering in 98 and Master of Technology(Power systems) in 984 from Osmania University.He received Ph.D in 3 from JNTU, Kukatpally, Hyderabad.He published more than 6 papers in National and international Journals. His area of interest is Power electronics, FACTS, Reliability Engineering and Control Systems. Sanker Ram is life member of Indian Society for Technical Education(ISTE). G. Chandra Sekhar received his B.E(EEE) in the year 998 from Andhra University and M Tech in High Voltage Engineering in the year from JNTU College of Engineering, Kakinada, E.G(Dt), AP, India.He is Pursuing Ph.D from JNTU, Kukatpally, Hyderabad. He has published three research papers in International Journals. His area of interest includes Electrical Power systems, Electrical Machines, Electrical Circuits and Multiphase transmission systems. Mr. Chandra Sekhar is life member of Indian Society for Technical Education(ISTE) and Member of IEEE. [Page No. 36]