# ECE2274 Pre-Lab for MOSFET logic LTspice NAND Gate, NOR Gate, and CMOS Inverter

Size: px
Start display at page:

Download "ECE2274 Pre-Lab for MOSFET logic LTspice NAND Gate, NOR Gate, and CMOS Inverter"

Transcription

2 3. CMO Inverter Use V = 9.. esign a CMO inverter using a NMO and PMO FET. The drain current will be limited by the two external Ω source resistors (Rnmos, Rpmos). The MOFETs that we use in the lab both have a V threshold voltage of about 2.0V and internal resistance is R = 0.2Ω. Assume that there is a input voltage level 2.0V < Vin < V 2.0V that will turn on both FETs at the same time. This will cause a large current flow that could damage the two devices. Because there is period of time when both devices on we will use a 1kHz triangle waveform as input so the time the devise send in a high current state will short in LTspice. (Triangle Wave) Use LTspice to plot the input triangle waveform (PULE) 0 to 9v, output voltage waveform, and the current thru the devices. (C sweep) Plot CMO Transfer characteristic curve use C sweep Vin from 0V to 9V. Plot vs Vin mark on plot V OH, V OL, V IL and V IH. V V in (Triangle Wave) set PULE V in (C weep) Q1 PMO Q2 NMO 1kHz amplitude 0v to 9v Triangle wave PULE 0V, 9V Tr=0.5ms Tf=0.5ms Tper=1ms, Td=0, Ton =1ns 0V to 9V 200mv step LTspice (TP0606) Lab (TP0606) LTspice (2N7000) Lab (2N7000) LTspice TP0606 PMO Internal resistance LTspice 2N7000 NMO Internal resistance Vto=-2 volts R =0.2 ohms Vto = 2 volts R = 0.2 ohms Page 2 of 6

3 Vin.dc Vin include 2N7000.sub.include TP0606.sub Rin Rpmos TP0606 M1 Vdd 9V 10k Vin 0 Rser=50 M2 2N7000 Rnmos Rload 10k CMO inverter for LTspice Cmos Transfer characteristic curve. Required Attachments: NAN Truth table Four schematics with voltages and currents of nodes and branches NOR Truth table Four schematics with voltages and currents of nodes and branches 5. Cmos Transfer characteristic curve (Triangle Wave), (C sweep) 2 plots Page 3 of 6

4 Laboratory Exercise MOFET logic NAN ATE, NOR ATE, and CMO inverter 1. You must test your 2N7000 NMO with the curve tracer before build your experiment. et curve trace to N-FET, Is Max = 10ma, Vds max =10V, Vg/step = 0.1V, Offset = 1.8V, Rload = 10, N teps = You must test your TP0606 PMO with the curve tracer before build your experiment. et curve trace to P-FET, Is Max = 10ma, Vds max =10V, Vg/step = 0.1V, Offset = - 1.8V, Rload = 10, N teps = Build the NAN gate. Measure the output voltage levels with 10k load resistor connected to ground. You will use the voltmeter to verify the NAN gate s operation. Try all of the input combinations. 4. Build the NOR gate that you designed in the Pre-Lab. Use V = 9. Again, use an 10k load resistor connected to ground to determine the output states. Verify the truth table for a NOR gate. 5. Build CMO Inverter with both the external Ω source resistors to limit the current. C sweep the input from 0V to 9V in 200mv steps to plot the Cmos inverter (10k load resistor) transfer characteristic curve, print the plot and mark the V OH, V OL, V IL and V IH Page 4 of 6

5 ATA HEET ATA HEET MOFET logic Name: Name: Instructor: Class day and time: ate: Bench number: NAN ATE, NOR ATE, and COM Inverter 1. NAN ATE static test. Vdd = Vin1 Vin2 2. NOR ATE static test. Vdd = Vin1 Vin2 Page 5 of 6

6 3. CMO Inverter V current limit PMO Q1 Vin 10K Rin Q2 NMO 10K Rload hunt and current limit Table CMO inverter static test. Vdd = Vin 0v 9v From C sweep of CMO inverter to Vin Mark on plot, include the plot. Name Voltage VOH VOL VIL VIH Page 6 of 6

### ECE 2274 MOSFET Voltmeter. Richard Cooper

ECE 2274 MOSFET Voltmeter Richard Cooper Pre-Lab for MOSFET Voltmeter Voltmeter design: Build a MOSFET (2N7000) voltmeter in LTspice. The MOSFETs in the voltmeter act as switches. To turn on the MOSFET.

### 1.2Vdc 1N4002. Anode V+

ECE 2274 Pre-Lab for MOSFET Night Light and Voltmeter 1. Night Light The purpose of this part of experiment is to use the switching characteristics of the MOSFET to design a Night Light using a LED, MOSFET,

### EE 2274 MOSFET BASICS

Pre Lab: Include your CN with prelab. EE 2274 MOSFET BASICS 1. Simulate in LTspice a family of output characteristic curves (cutve tracer) for the 2N7000 NMOS You will need to add the 2N7000 model to LTspice

### ELEC 2210 EXPERIMENT 12 NMOS Logic

ELEC 2210 EXPERIMENT 12 NMOS Logic Objectives: The experiments in this laboratory exercise will provide an introduction to NMOS logic. You will use the Bit Bucket breadboarding system to build and test

### ECE 3274 MOSFET CD Amplifier Project

ECE 3274 MOSFET CD Amplifier Project 1. Objective This project will show the biasing, gain, frequency response, and impedance properties of the MOSFET common drain (CD) amplifier. 2. Components Qty Device

### EE 230 Lab Lab 9. Prior to Lab

MOS transistor characteristics This week we look at some MOS transistor characteristics and circuits. Most of the measurements will be done with our usual lab equipment, but we will also use the parameter

### Digital Electronic Circuits

ECE 25 VI Diode Circuits Lab VI Digital Electronic Circuits In this lab we will look at two different kinds of inverters: nmos versus CMOS. VI.1 PreLab 1) Power consideration of inverters: a. Using PSICE,

### TTL LOGIC and RING OSCILLATOR TTL

ECE 2274 TTL LOGIC and RING OSCILLATOR TTL We will examine two digital logic inverters. The first will have a passive resistor pull-up output stage. The second will have an active transistor and current

### EE 2274 DIODE OR GATE & CLIPPING CIRCUIT

EE 2274 DIODE OR GATE & CLIPPING CIRCUIT Prelab Part I: Wired Diode OR Gate LTspice use 1N4002 1. Design a diode OR gate, Figure 1 in which the maximum current thru R1 I R1 = 9mA assume Vin = 5Vdc. Design

### The MOSFET can be easily damaged by static electricity, so careful handling is important.

ECE 3274 MOSFET CS Amplifier Project Richard Cooper 1. Objective This project will show the biasing, gain, frequency response, and impedance properties of the MOSFET common source (CS) amplifiers. 2. Components

### DIGITAL VLSI LAB ASSIGNMENT 1

DIGITAL VLSI LAB ASSIGNMENT 1 Problem 1: NMOS and PMOS plots using Cadence. In this exercise, you are required to generate both NMOS and PMOS I-V device characteristics (I/P and O/P) using Cadence (Use

### Curve Tracer Laboratory Assistant Using the Analog Discovery Module as A Curve Tracer

Curve Tracer Laboratory Assistant Using the Analog Discovery Module as A Curve Tracer The objective of this lab is to become familiar with methods to measure the dc current-voltage (IV) behavior of diodes

### Lab 6: MOSFET AMPLIFIER

Lab 6: MOSFET AMPLIFIER NOTE: This is a "take home" lab. You are expected to do the lab on your own time (still working with your lab partner) and then submit your lab reports. Lab instructors will be

### ECEN3250 Lab 9 CMOS Logic Inverter

Lab 9 CMOS Logic Inverter ECE Department University of Colorado, Boulder 1 Prelab Read Section 4.10 (4th edition Section 5.8), and the Lab procedure Do and turn in Exercise 4.41 (page 342) Do PSpice (.dc)

### Lab 7 (Hands-On Experiment): CMOS Inverter, NAND Gate, and NOR Gate

Lab 7 (Hands-On Experiment): CMOS Inverter, NAND Gate, and NOR Gate EECS 170LB, Wed. 5:00 PM TA: Elsharkasy, Wael Ryan Morrison Buu Truong Jonathan Lam 03/05/14 Introduction The purpose of this lab is

### ENEE307 Lab 7 MOS Transistors 2: Small Signal Amplifiers and Digital Circuits

ENEE307 Lab 7 MOS Transistors 2: Small Signal Amplifiers and Digital Circuits In this lab, we will be looking at ac signals with MOSFET circuits and digital electronics. The experiments will be performed

### Digital Applications of the Operational Amplifier

Lab Procedure 1. Objective This project will show the versatile operation of an operational amplifier in a voltage comparator (Schmitt Trigger) circuit and a sample and hold circuit. 2. Components Qty

### EXPERIMENT 2. NMOS AND BJT INVERTING CIRCUITS

EXPERIMENT 2. NMOS AND BJT INVERTING CIRCUITS I. Introduction I.I Objectives In this experiment, you will analyze and compare the voltage transfer characteristics (VTC) and the dynamic response of the

### ECE 2274 Diode Basics and a Rectifier Completed Prior to Coming to Lab

ECE 2274 Diode Basics and a Rectifier Completed Prior to Coming to Lab Perlab: Part I I-V Characteristic Curve for the 1. Construct the circuit shown in figure 1. Using a DC Sweep, simulate in LTspice

### Lab 5: MOSFET I-V Characteristics

1. Learning Outcomes Lab 5: MOSFET I-V Characteristics In this lab, students will determine the MOSFET I-V characteristics of both a P-Channel MOSFET and an N- Channel MOSFET. Also examined is the effect

### ELEC 350L Electronics I Laboratory Fall 2012

ELEC 350L Electronics I Laboratory Fall 2012 Lab #9: NMOS and CMOS Inverter Circuits Introduction The inverter, or NOT gate, is the fundamental building block of most digital devices. The circuits used

### Lab 3: Circuit Simulation with PSPICE

Page 1 of 11 Laboratory Goals Introduce text-based PSPICE as a design tool Create transistor circuits using PSPICE Simulate output response for the designed circuits Introduce the Curve Tracer functionality.

### ECE520 VLSI Design. Lecture 5: Basic CMOS Inverter. Payman Zarkesh-Ha

ECE520 VLSI Design Lecture 5: Basic CMOS Inverter Payman Zarkesh-Ha Office: ECE Bldg. 230B Office hours: Wednesday 2:00-3:00PM or by appointment E-mail: pzarkesh@unm.edu Slide: 1 Review of Last Lecture

### FAMILIARIZATION WITH DIGITAL PULSE AND MEASUREMENTS OF THE TRANSIENT TIMES

EXPERIMENT 1 FAMILIARIZATION WITH DIGITAL PULSE AND MEASUREMENTS OF THE TRANSIENT TIMES REFERENCES Analysis and Design of Digital Integrated Circuits, Hodges and Jackson, pages 6-7 Experiments in Microprocessors

### EE 320 L LABORATORY 9: MOSFET TRANSISTOR CHARACTERIZATIONS. by Ming Zhu UNIVERSITY OF NEVADA, LAS VEGAS 1. OBJECTIVE 2. COMPONENTS & EQUIPMENT

EE 320 L ELECTRONICS I LABORATORY 9: MOSFET TRANSISTOR CHARACTERIZATIONS by Ming Zhu DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING UNIVERSITY OF NEVADA, LAS VEGAS 1. OBJECTIVE Get familiar with MOSFETs,

### Submission date: Wednesday 21/3/2018

Faculty of Information Engineering & Technology Electrical & Electronics Department Course: Microelectronics Lab ELCT605 Spring 2018 Dr. Eman Azab Eng. Samar Shukry Analog Report 1, 2 DC, TRANSIENT, AND

### Well we know that the battery Vcc must be 9V, so that is taken care of.

HW 4 For the following problems assume a 9Volt battery available. 1. (50 points, BJT CE design) a) Design a common emitter amplifier using a 2N3904 transistor for a voltage gain of Av=-10 with the collector

### Lab 5: MOSFET I-V Characteristics

1. Learning Outcomes Lab 5: MOSFET I-V Characteristics In this lab, students will determine the MOSFET I-V characteristics of both a P-Channel MOSFET and an N- Channel MOSFET. Also examined is the effect

### Problem Points Score Grader Total 100

1 Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.002 Electronic Circuits Fall 2003 Quiz 1 Please write your name on each page of the exam in the space

### E85: Digital Design and Computer Architecture

E85: Digital Design and Computer Architecture Lab 1: Electrical Characteristics of Logic Gates Objective The purpose of this lab is to become comfortable with logic gates as physical objects, to interpret

### EE 42/100 Lecture 23: CMOS Transistors and Logic Gates. Rev A 4/15/2012 (10:39 AM) Prof. Ali M. Niknejad

A. M. Niknejad University of California, Berkeley EE 100 / 42 Lecture 23 p. 1/16 EE 42/100 Lecture 23: CMOS Transistors and Logic Gates ELECTRONICS Rev A 4/15/2012 (10:39 AM) Prof. Ali M. Niknejad University

### Common-source Amplifiers

Lab 1: Common-source Amplifiers Introduction The common-source amplifier is one of the basic amplifiers in CMOS analog circuits. Because of its very high input impedance, relatively high gain, low noise,

### 1. Short answer questions. (30) a. What impact does increasing the length of a transistor have on power and delay? Why? (6)

CSE 493/593 Test 2 Fall 2011 Solution 1. Short answer questions. (30) a. What impact does increasing the length of a transistor have on power and delay? Why? (6) Decreasing of W to make the gate slower,

### ECEN 325 Lab 11: MOSFET Amplifier Configurations

ECEN 325 Lab : MOFET Amplifier Configurations Objective The purpose of this lab is to examine the properties of the MO amplifier configurations. C operating point, voltage gain, and input and output impedances

### Experiment 9- Single Stage Amplifiers with Passive Loads - MOS

Experiment 9- Single Stage Amplifiers with Passive oads - MOS D. Yee,.T. Yeung, M. Yang, S.M. Mehta, and R.T. Howe UC Berkeley EE 105 1.0 Objective This is the second part of the single stage amplifier

### PS 12b Lab 1c IV Curves

Names: 1.) 2.) 3.) PS 12b Lab 1c IV Curves Learning Goal: Understand I- V curves for ohmic and non- ohmic devices (light bulb, resistor, Light Emitting Diode (LED), and Thermistor. Work with a Field Effect

### Digital Electronics Part II - Circuits

Digital Electronics Part II - Circuits Dr. I. J. Wassell Gates from Transistors 1 Introduction Logic circuits are non-linear, consequently we will introduce a graphical technique for analysing such circuits

### High-Speed Serial Interface Circuits and Systems

High-Speed Serial Interface Circuits and Systems Design Exercise4 Charge Pump Charge Pump PLL ɸ ref up PFD CP LF VCO down ɸ out ɸ div Divider Converts PFD phase error pulse (digital) to charge (analog).

### ENEE 307 Laboratory#2 (n-mosfet, p-mosfet, and a single n-mosfet amplifier in the common source configuration)

Revised 2/16/2007 ENEE 307 Laboratory#2 (n-mosfet, p-mosfet, and a single n-mosfet amplifier in the common source configuration) *NOTE: The text mentioned below refers to the Sedra/Smith, 5th edition.

### .dc Vcc Ib 0 50uA 5uA

EE 2274 BJT Biasing PreLab: 1. Common Emitter (CE) Transistor Characteristics curve Generate the characteristics curves for a 2N3904 in LTspice by plotting Ic by sweeping Vce over a set of Ib steps. Label

### ENGR 201 Homework, Fall 2018

Chapter 1 Voltage, Current, Circuit Laws (Selected contents from Chapter 1-3 in the text book) 1. What are the following instruments? Draw lines to match them to their cables: Fig. 1-1 2. Complete the

### Revised: Summer 2010

EE 2274 PRE-LAB EXPERIMENT 5 DIODE OR GATE & CLIPPING CIRCUIT COMPLETE PRIOR TO COMING TO LAB Part I: 1. Design a diode, Figure 1 OR gate in which the maximum input current,, Iin is less than 5mA. Show

### University of Pittsburgh

University of Pittsburgh Experiment #4 Lab Report MOSFET Amplifiers and Current Mirrors Submission Date: 07/03/2018 Instructors: Dr. Ahmed Dallal Shangqian Gao Submitted By: Nick Haver & Alex Williams

### Practice Homework Problems for Module 1

Practice Homework Problems for Module 1 1. Unsigned base conversions (LO 1-1). (a) (2C9E) 16 to base 2 (b) (1101001) 2 to base 10 (c) (1101001) 2 to base 16 (d) (8576) 10 to base 16 (e) (A27F) 16 to base

### Hello, and welcome to the TI Precision Labs video series discussing comparator applications. The comparator s job is to compare two analog input

Hello, and welcome to the TI Precision Labs video series discussing comparator applications. The comparator s job is to compare two analog input signals and produce a digital or logic level output based

### ECE 310L : LAB 9. Fall 2012 (Hay)

ECE 310L : LAB 9 PRELAB ASSIGNMENT: Read the lab assignment in its entirety. 1. For the circuit shown in Figure 3, compute a value for R1 that will result in a 1N5230B zener diode current of approximately

### The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering ECE 20 - LAB

The George Washington University School of Engineering and Applied Science Department of Electrical and Computer Engineering ECE 20 - LAB Experiment # 11 MOSFET Amplifiers testing and designing Equipment:

### CMOS Inverter & Ring Oscillator

CMOS Inverter & Ring Oscillator Theory: In this Lab we will implement a CMOS inverter and then use it as a building block for a Ring Oscillator. MOSfets (Metal Oxide Semiconductor Field Effect Transistors)

### 4-bit counter circa bit counter circa 1990

Digital Logic 4-bit counter circa 1960 8-bit counter circa 1990 Logic gates Operates on logical values (TRUE = 1, FALSE = 0) NOT AND OR XOR 0-1 1-0 0 0 0 1 0 0 0 1 0 1 1 1 0 0 0 1 0 1 0 1 1 1 1 1 0 0 0

### Common-Source Amplifiers

Lab 2: Common-Source Amplifiers Introduction The common-source stage is the most basic amplifier stage encountered in CMOS analog circuits. Because of its very high input impedance, moderate-to-high gain,

### EXPERIMENT 4 CMOS Inverter and Logic Gates

İzmir University of Economics EEE 332 Digital Electronics Lab A. Background EXPERIMENT 4 CMOS Inverter and Logic Gates CMOS (Complementary MOS) technology uses tarnsistors together with transistors to

### Bring your textbook to lab.

Bring your textbook to lab. Electrical & Computer Engineering Department ECE 2100 Experiment No. 11 Introduction to MOSFET Transistors A. Stolp, 4/3/01 rev,4/6/03 Minimum required points = 46 Recommend

### Lab 5: FET circuits. 5.1 FET Characteristics

Lab 5: FET circuits Reading: The Art of Electronics (TAOE) Section 3.01 3.10, FET s, followers, and current sources. Specifically look at information relevant to today s lab: follower, current source,

### Lab 4: Analysis of the Stereo Amplifier

ECE 212 Spring 2010 Circuit Analysis II Names: Lab 4: Analysis of the Stereo Amplifier Objectives In this lab exercise you will use the power supply to power the stereo amplifier built in the previous

### Place answers on the supplied BUBBLE SHEET only nothing written here will be graded.

ECE 270 Learning Outcome 1-1 - Practice Exam B OUTCOME #1: an ability to analyze and design CMOS logic gates. Multiple Choice select the single most appropriate response for each question. Note that none

### LAB 4 : FET AMPLIFIERS

LEARNING OUTCOME: LAB 4 : FET AMPLIFIERS In this lab, students design and implement single-stage FET amplifiers and explore the frequency response of the real amplifiers. Breadboard and the Analog Discovery

### Experiment 2: Simulation of DC Resistive Circuits

Experiment 2: Simulation of DC Resistive Circuits Objectives: Simulate DC Resistive circuits using Orcad PSpice Software. Verify experimental and theoretically calculated results for a given resistive

### ECE 3160 DIGITAL SYSTEMS LABORATORY

ECE 3160 DIGITAL SYSTEMS LABORATORY Experiment 2 Voltage and Current Characteristics of HC Device Electronics Reference: Wakerly chapter 3. Objectives: 1. To measure certain performance and voltage/current

### ECE4902 C Lab 7

ECE902 C2012 - Lab MOSFET Differential Amplifier Resistive Load Active Load PURPOSE: The primary purpose of this lab is to measure the performance of the differential amplifier. This is an important topology

### ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems. Today. Two Problems. Outline. Output not go to Rail

ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 6: September 19, 2011 Restoration Today How do we make sure logic is robust Can assemble into any (feed forward) graph Can

### MOS Inverters Dr. Lynn Fuller Webpage:

ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING MOS Inverters Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Email: Lynn.Fuller@rit.edu

### UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering

UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering EXPERIMENT 8 MOSFET AMPLIFIER CONFIGURATIONS AND INPUT/OUTPUT IMPEDANCE OBJECTIVES The purpose of this experiment

### CMOS VLSI Design (A3425)

CMOS VLSI Design (A3425) Unit III Static Logic Gates Introduction A static logic gate is one that has a well defined output once the inputs are stabilized and the switching transients have decayed away.

### MADR TR. Quad Driver for GaAs FET or PIN Diode Switches and Attenuators Rev. 4. Functional Schematic. Features.

Features High Voltage CMOS Technology Four Channel Positive Voltage Control CMOS device using TTL input levels Low Power Dissipation Low Cost Lead-Free SOIC-16 Plastic Package Halogen-Free Green Mold Compound

### ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems. Today. Two Problems. Outline. Output not go to Rail

ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 6: September 17, 2012 Restoration Today How do we make sure logic is robust Can assemble into any (feed forward) graph Can

### Practical Aspects Of Logic Gates

Practical Aspects Of Logic Gates Introduction & Objectives Logic gates are physically implemented as Integrated Circuits (IC). Integrated circuits are implemented in several technologies. Two landmark

### Experiment 5 Single-Stage MOS Amplifiers

Experiment 5 Single-Stage MOS Amplifiers B. Cagdaser, H. Chong, R. Lu, and R. T. Howe UC Berkeley EE 105 Fall 2005 1 Objective This is the first lab dealing with the use of transistors in amplifiers. We

### Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science Electronic Circuits Spring 2007

assachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.002 Electronic Circuits Spring 2007 Lab 2: OSFET Inverting Amplifiers & FirstOrder Circuits Handout S07034

### EEC 118 Lecture #11: CMOS Design Guidelines Alternative Static Logic Families

EEC 118 Lecture #11: CMOS Design Guidelines Alternative Static Logic Families Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation Announcements Homework 5 this week Lab

### CPE/EE 427, CPE 527 VLSI Design I CMOS Inverter. CMOS Inverter: A First Look

CPE/EE 427, CPE 527 VLSI Design I CMOS Inverter Department of Electrical and Computer Engineering University of Alabama in Huntsville Aleksandar Milenkovic CMOS Inverter: A First Look C L 9/11/26 VLSI

### MOS IC Amplifiers. Token Ring LAN JSSC 12/89

MO IC Amplifiers MOFETs are inferior to BJTs for analog design in terms of quality per silicon area But MO is the technology of choice for digital applications Therefore, most analog portions of mixed-signal

### Exam Below are two schematics of current sources implemented with MOSFETs. Which current source has the best compliance voltage?

Exam 2 Name: Score /90 Question 1 Short Takes 1 point each unless noted otherwise. 1. Below are two schematics of current sources implemented with MOSFETs. Which current source has the best compliance

### Lab 7: DELTA AND SIGMA-DELTA A/D CONVERTERS

ANALOG & TELECOMMUNICATION ELECTRONICS LABORATORY EXERCISE 6 Lab 7: DELTA AND SIGMA-DELTA A/D CONVERTERS Goal The goals of this experiment are: - Verify the operation of a differential ADC; - Find the

### ECE 3274 Common-Collector (Emitter-Follower) Amplifier Project

ECE 3274 Common-Collector (Emitter-Follower) Amplifier Project 1. Objective This project will show the biasing, gain, frequency response, and impedance properties of a common collector amplifier. 2. Components

### 4-bit counter circa bit counter circa 1990

Digital Logic 4-bit counter circa 1960 8-bit counter circa 1990 Logic gates Operates on logical values (TRUE = 1, FALSE = 0) NOT AND OR XOR 0-1 1-0 0 0 0 1 0 0 0 1 0 1 1 1 0 0 0 1 0 1 0 1 1 1 1 1 0 0 0

### FET Driver, Load, and Switch Circuits

Laboratory-4 FET Driver, Load, and Switch Circuits Introduction Precautions The objectives of this experiment are to observe the operating characteristics of inverter circuits which use JFETs and MOSFETs

### EEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters

EEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters Dept. of Electrical and Computer Engineering University of California, Davis March 18, 2010 Reading: Rabaey Chapter 3 [1]. Reference: Kang

### Introduction to Lab Equipment and Components

331: nalog lectronics University of Toronto 2017 Lab 0: ntroduction to Lab quipment and omponents ntroduction The first part of this lab introduces you to the lab equipment and components you will use

### the reactance of the capacitor, 1/2πfC, is equal to the resistance at a frequency of 4 to 5 khz.

EXPERIMENT 12 INTRODUCTION TO PSPICE AND AC VOLTAGE DIVIDERS OBJECTIVE To gain familiarity with PSPICE, and to review in greater detail the ac voltage dividers studied in Experiment 14. PROCEDURE 1) Connect

### ECE4902 Lab 5 Simulation. Simulation. Export data for use in other software tools (e.g. MATLAB or excel) to compare measured data with simulation

ECE4902 Lab 5 Simulation Simulation Export data for use in other software tools (e.g. MATLAB or excel) to compare measured data with simulation Be sure to have your lab data available from Lab 5, Common

### Embedded Systems. Oscillator and I/O Hardware. Eng. Anis Nazer First Semester

Embedded Systems Oscillator and I/O Hardware Eng. Anis Nazer First Semester 2016-2017 Oscillator configurations Three possible configurations for Oscillator (a) using a crystal oscillator (b) using an

### Chapter 6 DIFFERENT TYPES OF LOGIC GATES

Chapter 6 DIFFERENT TYPES OF LOGIC GATES Lesson 9 CMOS gates Ch06L9-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 2 Outline CMOS (n-channel based MOSFETs based circuit) CMOS Features

### ENGR4300 Test 3A Fall 2002

1. 555 Timer (20 points) Figure 1: 555 Timer Circuit For the 555 timer circuit in Figure 1, find the following values for R1 = 1K, R2 = 2K, C1 = 0.1uF. Show all work. a) (4 points) T1: b) (4 points) T2:

### ECE4902 C Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load

ECE4902 C2012 - Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load PURPOSE: The primary purpose of this lab is to measure the

### Electronic Circuits Laboratory EE462G Lab #6. Small Signal Models: The MOSFET Common Source Amplifier

Electronic Circuits Laboratory EE462G Lab #6 Small Signal Models: The MOSFET Common Source Amplifier AC and DC Analysis Amplifier circuits have DC and AC components that can be analyzed separately. The

### Lab 2: Diode Characteristics and Diode Circuits

1. Learning Outcomes Lab 2: Diode Characteristics and Diode Circuits At the end of this lab, the students should be able to compare the experimental data to the theoretical curve of the diodes. The students

### EE320L Electronics I. Laboratory. Laboratory Exercise #6. Current-Voltage Characteristics of Electronic Devices. Angsuman Roy

EE320L Electronics I Laboratory Laboratory Exercise #6 Current-Voltage Characteristics of Electronic Devices By Angsuman Roy Department of Electrical and Computer Engineering University of Nevada, Las

### Lecture 13 - Digital Circuits (II) MOS Inverter Circuits. October 25, 2005

6.12 - Microelectronic Devices and Circuits - Fall 25 Lecture 13-1 Lecture 13 - Digital Circuits (II) MOS Inverter Circuits October 25, 25 Contents: 1. NMOS inverter with resistor pull-up (cont.) 2. NMOS

### Short Channel Bandgap Voltage Reference

Short Channel Bandgap Voltage Reference EE-584 Final Report Authors: Thymour Legba Yugu Yang Chris Magruder Steve Dominick Table of Contents Table of Figures... 3 Abstract... 4 Introduction... 5 Theory

### 55:041 Electronic Circuits

55:041 Electronic Circuits MOSFETs Sections of Chapter 3 &4 A. Kruger MOSFETs, Page-1 Basic Structure of MOS Capacitor Sect. 3.1 Width = 1 10-6 m or less Thickness = 50 10-9 m or less ` MOS Metal-Oxide-Semiconductor

### Page 1 of 7. Power_AmpFal17 11/7/ :14

ECE 3274 Power Amplifier Project (Push Pull) Richard Cooper 1. Objective This project will introduce two common power amplifier topologies, and also illustrate the difference between a Class-B and a Class-AB

### LABORATORY 3: Transient circuits, RC, RL step responses, 2 nd Order Circuits

LABORATORY 3: Transient circuits, RC, RL step responses, nd Order Circuits Note: If your partner is no longer in the class, please talk to the instructor. Material covered: RC circuits Integrators Differentiators

### Electronic Circuits EE359A

Electronic Circuits EE359A Bruce McNair B206 bmcnair@stevens.edu 201-216-5549 1 Memory and Advanced Digital Circuits - 2 Chapter 11 2 Figure 11.1 (a) Basic latch. (b) The latch with the feedback loop opened.

### ECEN 474/704 Lab 6: Differential Pairs

ECEN 474/704 Lab 6: Differential Pairs Objective Design, simulate and layout various differential pairs used in different types of differential amplifiers such as operational transconductance amplifiers

### ECE4902 C2012 Lab 3. Qualitative MOSFET V-I Characteristic SPICE Parameter Extraction using MOSFET Current Mirror

ECE4902 C2012 Lab 3 Qualitative MOSFET VI Characteristic SPICE Parameter Extraction using MOSFET Current Mirror The purpose of this lab is for you to make both qualitative observations and quantitative

### EXPERIMENT 12: DIGITAL LOGIC CIRCUITS

EXPERIMENT 12: DIGITAL LOGIC CIRCUITS The purpose of this experiment is to gain some experience in the use of digital logic circuits. These circuits are used extensively in computers and all types of electronic

### Chapter 6 DIFFERENT TYPES OF LOGIC GATES

Chapter 6 DIFFERENT TYPES OF LOGIC GATES Lesson 8 NMOS gates Ch06L8-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 2 Outline NMOS (n-channel based MOSFETs based circuit) NMOS Features

### ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers

ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers Objective Design, simulate and layout various inverting amplifiers. Introduction Inverting amplifiers are fundamental building blocks of electronic