Design considerations for chargecompensated. medium-voltage range. Ralf Siemieniec, Cesar Braz, Oliver Blank Infineon Technologies Austria AG

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1 Design considerations for chargecompensated power MOSFET in the medium-voltage range Ralf Siemieniec, Cesar Braz, Oliver Blank Infineon Technologies Austria AG

2 Outline 1 Introduction 2 Application requirements 3 Device concepts 4 Comparison of device properties 5 Device performance in application 6 Conclusion 2

3 Introduction low-voltage power MOSFET range from 12 V to 300 V most modern devices for fast-switching devices are based on charge-compensation using a field-plate the concept was first introduced into the market about 12 years ago for 30 V devices over the years the breakdown voltage range was continuously extended up to 300 V the concept offers a significant reduction of onresistance and at the same time allows a low gate charge, a low miller charge and a low output charge Source Gate n+ n+ p G p n S n n+ Drain the extension to the upper part of the covered voltage range is affected by technological limits which can be addressed by two conceptual approaches the two approaches will be discussed on example of 150 V devices 3

4 Outline 1 Introduction 2 Application requirements 3 Device concepts 4 Comparison of device properties 5 Device performance in application 6 Conclusion 4

5 Relevant applications for 150 V devices Solar Telecom 150 V LV drives Industrial 5

6 Telecom Synchronous Rectification Synchronous rectification in telecom power supplies Synchronous rectification PFC + LLC Isolated DC/DC Application requirements high power density and high efficiency over wide load range reduced overshoot and reduced switching losses avalanche rugged size reduction by using packages with smaller footprint and/or less devices 6

7 Telecom Isolated DC/DC brick converters Primary side switches and synchronous rectification +24 V / -48 V / -60 V systems Isolated DC/DC Application requirements high power density and high efficiency reduced voltage overshoot and reduced switching losses size reduction by using packages with smaller footprint and/or less devices improved price-performance ratio 7

8 Low voltage drives forklift and LEV Low voltage drives Application requirements high current capacity homogeneous switching of paralleled parts high ruggedness improved thermal management cost reduction 8

9 Solar Microinverter and power optimizers Power optimizer V DC ~ 80 V DC Application requirements high efficiency extremely low gate and output charges low reverse recovery charge low cost 9

10 Summarizing requirements Key requirements Linked benefits lower R DS(on) without compromising FOM gd and FOM g lower output charge low reverse recovery charge of body diode high commutation ruggedness high avalanche ruggedness high switching frequency reduced paralleling of devices required enables use of (SMD) packages with smaller footprints higher power density designs rugged, reliable products system cost reduction improved EMI behavior 10

11 Outline 1 Introduction 2 Application requirements 3 Device concepts 4 Comparison of device properties 5 Device performance in application 6 Conclusion 11

12 Compensation structures several structures exist to overcome the unipolar silicon limit superjunction devices are suited for larger blocking voltages field-plate structures are advantageous for lower voltages n-column p-column thick oxide layer field plate p n p n p n n n n 12

13 Lateral compensation by field-plate a simple pn-junction gives a triangular vertical field but no lateral field component lateral compensation by an insulated field-plate allows an increased doping for a given breakdown voltage due to the additional lateral field component p p E y p p p p E y n n n n n y y E x E x x x 13

14 How to increase the breakdown voltage? fully compensated 100 V device partially compensated 150 V device fully compensated 150 V device field-plate gate oxide n + p source body n-epi oxide gate field-plate field-plate gate oxide n + p n-epi source body gate oxide field-plate field-plate gate oxide n + p n-epi source body oxide gate field-plate + n -substrate - n -epi + n -substrate + n -substrate needs: defined trench depth defined oxide thickness defined trench distance defined epi doping keeps: defined trench depth defined oxide thickness defined trench distance changes: additional low-doped epi layer under trench changes: defined trench depth defined oxide thickness defined trench distance defined epi doping 14

15 Normalized wafer bow Why not simply do a full redesign? approach 1 (additional epi layer) can be done faster as no change to cell dimensions (but an appropriate edge termination) is needed approach 2 requires more time and effort as it needs not only a new setup of many processes but also must address: wafer bow in order to enable manufacturing stress engineering in field oxide layer to avoid cracks Normalized breakdown voltage stress-induced crack in field oxide 15

16 Outline 1 Introduction 2 Application requirements 3 Device concepts 4 Comparison of device properties 5 Device performance in application 6 Conclusion 16

17 Rds(on), max [mohm] [mohm nc] Electrical performance devices of both design approaches and in different chip sizes were manufactured the 2 nd approach of a full redesign offers both, better on-resistance and better figure-of-merits Approach 1 Approach Approach 1 Approach SSO8 TO-263 TO FOMoss FOMg FOMgd 17

18 Jav [A/mm²] Avalanche Ruggedness the comparison includes devices of different chip sizes for each type no difference in the avalanche ruggedness between the different approaches found 100 Approach 1 Approach L A [mh mm²] 18

19 Outline 1 Introduction 2 Application requirements 3 Device concepts 4 Comparison of device properties 5 Device performance in application 6 Conclusion 19

20 Efficiency Voltage [V] Current [A] Devices used as synchronous rectifiers test platform represents AC/DC converter of a PSU with two interleaved LLC stages on the primary and synchronous rectifiers using a centertapped topology with the D.U.T. on the secondary side higher effort for the full redesign approach 2 clearly pays-off with higher efficiency and lower voltage overshoots 98.0% 97.5% VDS_approach 2 VDS_approach % 100 ID_approach % 80 ID_approach % % % Approach % Approach % Output Power [W] time [µs] 20

21 Efficiency Voltage [V] Devices used in buck converter topology test platform uses the devices in a hard-switched buck converter reproducing the operation of a solar power optimizer being operated in buck mode also under hard-switching conditions the higher effort of a full redesign of the power MOSFET offers a better efficiency at lower overshoots 98.2% 98.0% 97.8% 97.6% % 97.2% 97.0% Approach 1 Approach Output Current [A] 40 Approach 1 20 Approach Time [ns] 21

22 Outline 1 Introduction 2 Application requirements 3 Device concepts 4 Comparison of device properties 5 Device performance in application 6 Conclusion 22

23 Conclusion low-voltage power MOSFET based on charge compensation using an insulated field-plate in a deep trench became the standard device concept for fast-switching device being used in a wide range of applications extending the voltage range to 150 V and above faces technological challenges such as increased wafer bow or the danger of cracks in the thick field-oxide if a full redesign approach of the device is chosen alternatively, an additional lower-doped epi layer might be used which allows to use an existing device geometry without changes but requires an appropriate edge termination structure it was investigated which concepts delivers better results in terms of device properties and device performance in different applications it can be concluded that the higher effort of a full redesign of the device offers clear benefits in the overall performance of the power device 23

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