PN Junction in equilibrium

Transcription

1 PN Junction in equilibrium PN junctions are important for the following reasons: (i) PN junction is an important semiconductor device in itself and used in a wide variety of applications such as rectifiers, Photodetectors, light emitting diodes and lasers etc (ii) PN junctions are an integral part of other important semiconductor devices such as BJTs, JFETS and MOSFETs (iii) PN junctions are used as test structures for measuring important semiconductor properties such as doping, defect density, lifetime etc The discussion associated with the PN junctions will proceed in the following order: (i) PN junction in equilibrium (ii) dc IV characteristics in forward bias (iii) characteristics in reverse bias (iv) dynamic characteristics (v) Circuit models (vi) Design perspective Device Structure : The Figure below shows a simplified structure of a PN junction: The structure can be fabricated by diffusing P-type impurity in the n-epilayer grown over an substrate.

2 While the doping in the n-epilayer can be uniform, the doping in the P-region is often either Gaussian or error-function in nature. The doping profiles and the junction are schematically illustrated below: 1-D Abstraction Even though the doping in both N and P-regions may in general be nonuniform, for simplicity, we shall assume them to be uniform in the initial analysis because the basic device physics remains almost the same A simplified, one-dimensional abstracted view of a PN junction described by the region within the dotted lines of device schematic is shown below: We shall assume that the thicknesses of P and N-regions are large enough so that one can ignore the presence of Ohmic contacts and the heavily doped N-region and consider only the P and N regions for analysis. Such a diode with wide N and P-regions is called a wide-base diode. The PN junction that we shall study will therefore be a 1-D structure with uniformly doped P and N regions with thicknesses sufficiently large to ignore effects of contacts and other layers. It shall be represented simply as

3 PN junction in Equilibrium As mentioned earlier, the characteristics of a semiconductor device is completely specified in equilibrium if the variation of potential as a function of position is specified. As a first step to obtaining this potential profile, we shall sketch the energy-band diagram of the device. The energy band diagram would provide us with (i) a qualitative variation of potential in the device (ii) boundary conditions for solution of Poisson's equation As usual, the energy band diagram of the PN junction will be obtained by combining the energy band diagrams of N and P-type semiconductors separately Energy Band Diagram In Equilibrium Energy Band diagram of N- and P-regions before equilibrium When the N and P-regions are brought into contact, the electrons would flow from regions of higher Fermi-energy to regions of lower Fermi energy and holes would flow in the opposite direction. Because of loss of electrons, the N-region would acquire a net positive charge due to the uncovered positively charged donor atoms and P-region would acquire a negative charge due to uncovered negatively charged acceptor atoms.

4 At equilibrium there is no net flow of either electrons or holes so that the PN junction has a single constant Fermi level. The transfer of charges will affect only the regions close to the junction so that regions which are far still have the same energy band diagram(i.e. same relative positions of conduction and valence band wrt Fermi energy) As we approach the junction from the N-side, the conduction band must bend upwards away from the Fermi energy to indicate the fact that the region is progressively getting depleted of electrons ( remember. Similarly, as we approach the junction from the P-side, the conduction band must bend downwards towards the Fermi energy to indicate the fact that the region is getting depleted of holes Using these principles, the final energy band diagram can be sketched as As a result of transfer of charges from N and P-regions, the region next to the junction is charged and is known as the space charge region. The charge on the N-side is positive and on the P-side negative. As a result, the space charge region will have an electric field directed from the N to the P-region with a maximum value at the junction and zero at the edges of the space charge region. As a result of the electric field, there will be a net voltage across the space charge region known as the built-in voltage. The magnitude of the built-in voltage can be quickly estimated from the energy band diagram. We do this by performing an analog of Kirchoffs voltage law:

5 We start from a point in the N-region(away from the space charge region) at the energy and then move to a point in the P-region(away from the space charge region)again at energy via any path other than the Fermi-energy and add up the energy gained or loss at each step of the path, then the net sum should be zero! The built-in oltage can be expessed as: For Non-degenerate semiconductors: An important result that can be deduced from Eq.(2) is that built-in voltage will be higher for semiconductors with larger bandgap. Using the relationship, the expression for built-in voltage for a PN junction having non-degenerate semiconductors can be written as Example 1.1 Determine the built in voltage for a uniformly doped Silicon PN junction with at room temperature. Will the built-in voltage increase or decrease with increase in temperature? Substitution of the doping values in Eq. (4) gives The built-in voltage decreases with increase in temperature due to exponential increase of intrinsic carrier concentration with temperature. The pre-factor kt/q in Eq.(4) has a much lesser influence.

6 There is another method by which the magnitude of built-in voltage can be obtained. In this case we start with the fact that in equilibrium, the net electron current is zero: Use of Einstein's relation : allows the above expression to be re-written as: Integrating the above expression across the space charge region gives: where are the potentials in the bulk of N- and P- regions respectively. is the electron density in the N-region and is the elecron density in the P- region. Example 1.2 Can the built-in voltage of the PN junction be measured by simply connecting a voltmeter across its two terminals? The answer is NO and this can be explained in several ways: Although there is a net voltage across P and N-regions, the built-in voltage does not appear across the external terminals. If it did, then upon connection of a resistor across it, a current would begin to flow. This contradicts the fact that no current can flow in equilibrium. So how does the voltage across the external terminals become zero? The built-in voltage is cancelled by voltage drop across the contacts made to N and P- regions.

7 The net voltage between anode and cathode terminals can be written as The first term on the RHS represents the contact potential or barrier height for the Anode/P metal-semiconductor junction. Keeping in mind that contact potential between any two materials is simply the difference of their work-functions, we obtain where and are the work functions of P-type, N-type, cathode and anode metals respectively. For simplicity we asume that both anode and cathode metals are same ( say aluminium ) so that Using four equations given above, it is easy to see that Poisson's equation The energy band diagram gives only a qualitative variation of potential across the space charge region. The detailed nature of this potential can be obtained through the solution of Poisson equation: Analytical Solution of Poisson's equation Because of the exponential terms in the expression for charge density, the analytical solution of the Poisson's equation becomes difficult.

8 This difficulty is overcome through the assumption that the electron and hole density within the space charge region is negligible as compared to the ionized donor or acceptor atom density. This approximation, known as the depletion approximation, allows the Poisson equation to be simplified to: Henceforth, we shall also assume that all donor and acceptor atoms are ionized. The table below shows the charge density as a function of potential within the space charge region for a PN junction with same doping in N and P regions for simplicity. The data in the table shows that over a large range of potential, the depletion approximation is valid. Only for regions close to the space charge edge, does the approximation become weak.

9 Simplified Charge density With the depletion approximation, the charge density can be expressed as The space charge region is often called the depletion region Simplified Poisson Equation The Poisson's equation for P and N-regions of the depletion region can be written as The boundary conditions can be written as:

10 The boundary conditions can be written as: Outside the space region the charge density is zero so that This implies that electric field outside the depletion region is constant. However, to be consistent, this electric field must be zero, otherwise it would imply a non-zero current, some applied bias etc. The electric field at x=0 must be continuous, otherwise it would imply an infinite charge density. Similarly, the potential at x=0 also must be continuous The Poisson equation with these boundary conditions can be easily solved to obtain the following results. Solution: Electric field: It is max. at the junction

11 Potential: The variation of potential across the depletion region is parabolic. Using the boundary condition that potential must be continuous at the junction: Deletion widths: Using the relation, we can obtain The depletion widths vary inversely with the doping. Example 1.3 Determine the total depletion width and the magnitude of maximum electric field for a symmetrical Si PN junction at equilibrium for doping densities of Using Eq.(23) and (27), we can obtain the following set of values

12 The depletion width increases with decrease in doping but the magnitude of maximum electric field decreases even though the space charge region gets wider. This is because while the width of the space charge region increases as, the charge density with in the space charge region decreases as as the doping is reduced. This results in a net decrease in charge and therefore the electric field at the junction. Example 1.4 Determine the built-in voltage for a Silicon PN junction with uniformly doped P region with and an N-region which consists of two uniformly doped regions but of different doping values as illustrated below. The difficulty in this problem is that while it is clear that in Eq.(4), it is not clear whether the N-type doping should be or 5 x. The answer depends on where the depletion edge in N-region lies. Let us assume that it lies in the lightly doped region so that we take =.This gives a of 0.7 volts.we have to check whether our assumption is correct or not. Use of Eq.(27) shows that depletion width is 4257 thereby validating our aasumption. If assumption had been wrong, we would have to redo our calculations with =5 x. As the PN junction is reverse biased, the depletion width increases so that eventually the depletion edge would lie in the higher doped N-region. In that case also a new value of built-in voltage would have to calculated and used in the expressions for depletion width, electric field etc.

13 Example 1.5 Suppose in the example above, the thickness of the lightly doped region is 2500 only. Calculate the depletion width at equilibrium. Using the previous example, we know that the depletion edge will lie in the higher doped N-region so that To find the depletion widths, we can adopt the methodology used for uniformly doped PN junctions except that solution of Poisson's equation is carried out in three regions, with region I being P-type, region II being N-type with doping and region III with N-type doping of The boundary conditions are similar except that two new boundary conditions describing continuity of potential and electric field will have to be used at the boundary of regions II and III. An alternative to working out the solution by beginning from Poisson's equation is to use some of the results already obtained with uniformly doped PN junctions. For example, we know that the electric field will vary linearly and can be sketched as Using the concept of charge neutrality, meaning that net charge on the P-side must be balanced by net charge on the N-side, we can write The slopes of electric field in each region can be written straight from Poisson equation. For example, in region II, so that

14 and similarly using Poisson equation on the P-side in region I In these equation refers only to the magnitude of the maximum electric field. The area under the curve is simply the total voltage across the junction so that Solution of the above equations will give values for depletion width. and therefore the total Comparison With Exact Numerical calculations The Figure below shows a comparison of an actual charge profile computed using a 1-D device simulator and charge profile under depletion approximation for a doping of.

15 The Figure above shows that the transition region is about 600, almost same as the depletion width(735 ) predicted by the depletion approximation! The depletion approximation therefore appears to be a poor assumption. However, a careful look shows that the depletion assumption overestimates the charge in region I but underestimates the charge in region II. Since, the electric field and potential are determined by the integral of charge density, the error in electric field and potential profile is not large! Example 1.6 Instead of approximating the charge density profile by an abrupt transition region, a better approximation would be to have a linear approximation to the transition region as illustrated below for a PN junction with same value of doping in both N and P regions. Obtain expressions for electric field and potential Integration of Poisson's equation in regions 1 and 2 and matching the electric field at the boundary gives The maximum electric field is given by the expression: Integration of electric field with the condition that the net voltage across the space charge region is, gives

16 Example 1.7 So far we have discussed PN junctions in which both P and N-regions are made out of the same semiconductor. Let us consider next an heterojunction and sketch its band diagram at equilibrium and find its barrier height. Figure below shows the band diagram of the two semiconductors, when they are far apart. Using the principles described earlier, the band diagram after equilibrium can be sketched as

17 There exists a discontinuity in conduction band and valence band at the junction. Their magnitudes can be expressed as where is the difference in the bandgaps of the two semiconductors The barrier height can be determined by performing an analog of Kirchoffs law. We start from a point at Fermi energy in the P-type GaAs far from the junction and arrive again at the Fermi energy but on the side of N-AlGaAs, again far from the junction and add up all the energy increments along the way: The first term is the usual term that is present in the expression for built-in voltages of homojunctions also. The second term is the additional term that results from the presence of conduction-band discontinuity.

18 I - V characteristics in Reverse Bias A PN Junction is said to be in Forward Bias when the P-type region (Anode) is made positive with respect to the N-type region (Cathode). A PN Junction is said to be in Reverse Bias when the P-type region (Anode) is made negative with respect to the N-type region (Cathode). Let us consider the Forward bias first and examine qualitatively the mode of operation The holes are required to move from and electrons from. There are plenty of holes in P-type region and would like to move to N-region via diffusion but are prevented by the electric field (or the energy barrier) at equilibrium. The drift and diffusion currents cancel each other Similarly, there are plenty of electrons in N-type region and would like to move to P-region via diffusion but are prevented by the electric field (or the energy barrier) at equilibrium. The drift and diffusion currents again cancel each other. The application of forward bias reduces the barrier and the electric field allowing significant electron and hole current to flow:

19 The fraction of electrons that are able to cross over to the P-side or the fraction of holes that are able to cross over to the N-side and contribute to current goes exponentially with the barrier height (remember, ) Current increases exponentially with the applied forward bias. Reverse Bias: The holes are now required by the applied bias to move from and electrons from as shown below: Although the electric field favors the flow of holes to the P-region, there are very few holes in N-region to begin with! The number of holes in N-region is, a very small number. Further, the number of holes is fixed and unaffected by the bias. Similarly, the number of available electrons in P-region for current flow is very small and unaffected by the applied bias. The only thing that the applied reverse bias does is to increase the junction electric field or the barrier height as shown below

20 The increased electric field does not alter the current flow because the bottleneck is the small number of carriers available for current conduction. Current in Reverse bias is very small and almost constant Static I-V Characteristics: The dc current-voltage characteristics of the PN junction diode will be obtained using the semiconductor equations listed below: In steady state, the continuity equation reduces to Since for every electron lost/generated due to recombination/generation, there is a corresponding hole lost/generated also

21 In other words, the net current flowing through the device is the same everywhere. Since the current is the same everywhere, one can choose the region within the device for calculation of current-voltage characteristics. Big Question : Where in the device should the current be calculated such that its computation besides being easy is also accurate? Let us consider some alternatives: (i) At the junction: To appreciate the ease or difficulty of carrying out the computation in this case, let us consider a symmetric junction with The net electron current is equal to: The drift and diffusion currents oppose each other so that Let us try to estimate the magnitude of the drift component: Because of symmetry n(0) = p(0) at the junction Further : Assumption (i) : All the voltage is dropped across the junction: with the junction Net voltage across the junction = Assumption (ii) : Depletion approximation

22 For a forward bias of 0.6V, the electron drift current can be calculated using the results obtained as equal to As we shall see later, the net electron current flowing through the junction for this device at a forward bias of 0.6V is Because the drift current( ) is five orders of magnitude larger than the net current, the drift and diffusion currents would have to be calculated to an accuracy of.001% to obtain a correct estimate of the net electron current! This makes the estimation of total current via an analysis at the junction virtually impossible! Let us consider a region for estimation of current which is far from the junction in say N-type semiconductor. Far from the junction, on the N-side, the current is expected to be primarily an electron current. Any holes which are injected from the P-side would recombine and disappear away from the junction. The electron density being constant, the electron current would be primarily a drift current so that It might appear that this is a very good place for estimation of current because we have just one component and only one unknown, the electric field. However, this electric field is extremely difficult to estimate because of its very small value. The voltage applied across the diode gets dropped partially across the junction and partially outside it where the last two terms represent the voltage dropped across the neutral N and P-regions The bottleneck for current flow in a PN junction is the space charge region where the potential barrier exists. As a result, is almost equal to the applied voltage While it is easy to compute the junction voltage fairly accurately, the estimation of residual drops in the neutral regions becomes very difficult.

23 The two examples discussed earlier illustrate that the choice of position in the PN junction for computation of its I-V characteristics is very important. As first demonstrated by Shockley, the computation of currents in PN junction diode is best done at the edges of depletion region as explained below: During the course of the analysis, several assumptions will be made. There are two ways of justifying these assumptions. One of them is: (i) Make the assumption (ii) Solve the resulting simplified equations to obtain the current-voltage characteristics (iii) Check that the assumptions made are consistent with the results obtained. The assumptions made will be consistent only for certain range of currents, so that the range of validity of the model will be obtained. The other approach is to justify the assumptions in the beginning of the analysis, based on available device characteristics. These assumptions would define the range of validity of the obtained model. We shall follow a mix of these two approaches Assumption (1): Negligible recombination within the Junction We shall justify this assumption using the first approach, namely that the assumption would be shown to be consistent with the results obtained within certain limits. All the ho;es that are injected at reach the point so that Similarly all the electrons that are injected at reach the point, so that This allows the total current to be expressed as : The total current can be computed by computing the minority carrier currents at the edges of

24 depletion region in N and P-regions Assumption (2) : Minority carrier current is largely diffusive We shall justify this assumption using the second approach, namely that the validity of this assumption will be demonstrated prior to analysis. This is described in Appendix A. The assumption implies : The task of computing the currents boils down to the computation of minority carrier profiles: p(x) in N-region and n(x) in P-region. The minority carrier profile can be determined by solving the continuity equation with appropriate boundary conditions For hole density in N-region: In Silicon, the dominant recombination mechanism is the Shockley-Hall-Read recombination which can be described by the relation under low level injection conditions. is the hole recombination lifetime in N-type material. The hole continuity equation can be re-written as where has the units of length and as we shall see later is appropriately called the hole diffusion length Boundary Conditions:

25 assuming ideal ohmic contact. Solution: Similarly for the N-side: where is called the electron diffusion length. Boundary conditions: assuming ideal ohmic contact There are two extreme cases: (i) Wide Base diode: For this case, the minority carrier densities can be simplified to: The minority carrier densities decay exponentially with the distance from the junction, with a characteristics decay length of for holes and for electrons.

26 It can be shown that the average distance a hole diffuses before recombining is equal to that it is called the diffusion length. so The other extreme case is : (ii) Narrow Base diode: The minority carrier profile can be simplified to The carrier densities vary linearly with position now! The total diode current for wide and narrow base diodes can be expressed as Wide base diode:

27 Narrow base diode: The task of determining the I-V Characteristics now reduces to finding a relationship between the minority carrier densities at the edges of depletion region and the applied voltage. We start with the relation: where quasi-neutrality The low level injection assumption invoked earlier can be used here also for simplification. The first obvious consequence is that So that the first term on the LHS of the above expression can be neglected. The second consequence of low level injection, explained in detail in Appendix A is that for in the N-region and the depletion region for in the P-region and the depletion region The quasi-fermi level on the N-side must coincide with the Fermi level of the metal forming the ohmic contact to the N-side if an ideal contact with no voltage drop across it is assumed. Similarly, the quasi-fermi level on the P-side must coincide with the Fermi level of the metal forming the ohmic contact to the P-side if an ideal contact with no voltage drop across it is assumed. Since a voltage V is applied between the two ohmic contacts: This allows the minority carrier densities at the edges of depletion region to be expressed as

28 The total current density for the diode at a bias of V volts can now be expressed as Wide base diode: Narrow base diode: The current varies exponentially with applied voltage when the diode is forward biased (V > 0) The current is constant and small when the diode is reverse biased (V < 0) Example 2.1 A uniformly doped Silicon PN junction with very thick P and N regions has the following characteristics: For a forward bias of Volts, calculate, excess minority carrier concentrations and minority carrier currents at the edges of depletion region. Calculate also the net current flowing through the device. Solution : The wide-base diode is model valid here. Using the expressions derived earlier: The net current is the sum of electron and hole current = = 1 ma.

29 Example 2.2 For the example above, determine expressions for (a) majority carrier currents in N and P-regions (b) majority carrier diffusion currents in N and P regions (c) majority carrier drift currents in N and P regions (d) electric field in the N-region (e) minority carrier drift currents. Confirm that they are much smaller than minority carrier diffusion currents calculated in example 2.1 Solution: We will carry out the solution for the N-region since the solution for P-region is similar. The minority hole current in N-region can be written using the results of previous example as: The hole current is primarily diffusion current and the sum of hole and electron currents is equal to the total current. The electron current on the N-side is therefore simply: The electron diffusion current can be written as: Using the concept of quasi-neutrality in the N-region :, so that The electron diffusion current can therefore be expressed as The term in the bracket is simply the hole diffusion current which has already been obtained earlier: The electron drift current can be written as The low level injection assumption holds true in this case because so that

30 An electron mobility of 800 was assumed. Let us calculate the hole drift current at the depletion edge where there is an electric field of 28.7 mv/cm. The hole drift current is which is much smaller than the diffusion current component. Example 2.3 A PN junction diode has the same characteristics as that of example 2.1 except that the thickness of the N region The thickness of the P-region remains very long. Calculate the total current flowing through the diode. Solution : This is an example of a diode that can neither be considered a fully wide-base diode nor a fully narrow-base diode. On the P-side, the diode is very thick so that we can use the expression for electron current valid for wide base diodes. Therefore as before. On the N-side so that the narrow-base model can be used The net current will be ma = ma. The current is predominantly determined by the narrow base side of the junction. Example 2.4 Suppose the P-side thickness is also reduced to flowing through the diode again.. Calculate the total current Solution: This diode can be modeled as a narrow-base diode. We have already calculated the hole current in example 2.3 which remains the same. The electron can similarly be calculated as The net current will be = 37.5 ma This current is significantly higher than that calculated for wide-base diode in example 2.1. This illustrates that for comparable doping values, narrow-base diodes provide higher current for the same bias or equivalently have a smaller turn-on voltage. The expression for current was derived on the basis of two assumptions: (i) negligible recombination within the depletion region (ii) low level injection within N and P-regions

31 These assumptions limit the range of validity of the derived expression. The first assumption determines the lower limit, while the second assumption determines the upper limit. Lower limit: As stated earlier, this is determined by neglect of space charge recombination. If the hole continuity equation is integrated across the depletion region, we obtain the relation where Eq.(80) implies that the correct expression for total current should be In other words So as long as, the neglect of SCR recombination is justified So what we need to do first is to get an estimate for the SCR recombination current: We shall use a simple model for the Shockley-Hall-Read recombination: The recombination is assumed to take place via a single deep level at the midgap with equal hole and electron recombination lifetimes Within the depletion region: where the definition has been used Noting that either p(x) or :

32 Because of the exponential dependence of p and n on the voltage (which varies quadratically with x ), the function is a rapidly varying function of the form shown below: The recombination rate would have a peak value where the factor value. Since pn = constant,this would occur when attains a maximum The sharp variation of U implies that most of the recombination current comes from a small region around the peak value. This allows the following simplification to be performed: In appendix C, this relation is derived more rigorously, where it is also shown that where is the magnitude of the electric field at the place where peak recombination occurs. Let us now determine the condition under which Substituting the expressions for and derived earlier, we obtain the following condition: So as long as

33 recombination within the SCR can be neglected within ~10% accuracy and the ideal diode equation can be used. For values of current, the diode current would be determined primarily by the SCR recombination current. If we compare this recombination current with ideal diode current, we can see two major differences: (i) The ideal diode current increases as while the recombination current increases as The other way of stating this is that the ideality factor defined as is unity for ideal diode current and 2 for SCR recombination current. (ii) The SCR current goes as, while the ideal current goes as for wide base diode and is independent of lifetime for narrow base diodes. It is for this reason that the SCR current is considered as an index of material quality because the recombination lifetime is very sensitive to fabrication conditions. The upper limit for the validity of ideal diode equation is determined by the assumption of low level injection condition. This low level injection condition will first break down for the region which has the smaller doping level. We shall assume, for the sake of discussion, that N-region is the lightly doped region. The low level injection assumption had allowed the following simplifications to be made: (i) Minority carrier current is diffusive (ii) The expression to be simplified as

34 (iii) The major departure in I-V Characteristics is caused by the breakdown of (ii) and (iii) relations because they are associated with an exponential factor. When, the actual minority carrier density at the depletion edge is about 10 % smaller than that predicted by the simplified expression. The (iii) simplification amounted to neglect of the IR drop in the N-region. This drop is negligible when The expression for current under these conditions remains valid so that for wide base diode for wide base diode All these limits are comparable in nature so that for assumed to be valid., the ideal diode equation ca be The upper limit for the validity of the ideal equation is then: for wide base diode (95) for wide base diode (96) So for, the ideal diode equation remains valid. Example 2.5 Calculate the range of validity for ideal diode equation for a wide base diode described in Example 2.1. Solution : For simplicity, we take in Eq. (88) to be at V=0.6Volts For this example, the ideal diode equation is valid over five orders of magnitude variation of

35 current. It is because of the wide range of validity of the final equation, that the assumptions of negligible SCR recombination and low level injection are such good assumptions! Example 2.6 For a forward bias of Volts, calculate the ideality factor of the current for a PN junction described in Example 2.1 Solution : In general, the current consists of two components; one kt-like ideal diode current with ideality factor 1 and another 2kT-like space charge generation/recombination current with ideality factor 2: Using Eq. (78) and Eq. (89) we obtain I(kT) = 10 na and I(2kT) = 11 na n = 1.35 Example 2.7 Determine expression for current in a wide-base junction illuminated with light. For simplicity assume that there is a uniform carrier generation rate. Solution : For a diode, the current would be determined primarily by hole injection into the N-region so that under low level injection conditions: The hole continuity equation now includes an additional term due to optical generation rate: The hole continuity equation can be re-written as The solution of this equation gives: As before: The net current can be written as: Thus the current includes an additional component due to light which represents the current due to flow of carriers generated effectively within a distance of one diffusion length of the depletion edge. There would be an optical generation current due to generation within the depletion region as well which can be written as, where W is the total depletion width. Since depletion

36 width is often much smaller than diffusion length, this component can be neglected. However, in some especially designed PIN diode structures, this component is the dominant current. Example 2.8 In the analysis of narrow base diodes, it was assumed that the excess carrier density at the contact is zero. This however is true only if the contact can be assumed to be ideal. For practical contacts, the excess carrier density may be small but is nonzero. These contacts are characterized by a parameter called surface recombination velocity, which for holes can be defined as (a) Derive an expression for current in a diode using the above boundary condition (b) Determine the value of SP that is needed for a contact to be considered ideal. Assume a diode with Solution : Using the boundary condition at the contact: current:, we obtain the final expression for s (b) The first term represents the standard current expression, while the second term represents the modification due to finite recombination velocity. The equation above shows that as, the expression becomes identical with that derived for ideal contacts. Thus an ideal contact is one with an infinite recombination velocity. More practically when the factor, then the contact could be considered almost ideal. This condition for the values given translates into. Appendix A The assumption that minority carrier current is largely diffusive can be shown to be true provided low level injection conditions prevail within the device:

37 Consequences of Low Level Injection: In the N-region: In the P-region: We will need another result before we can demonstrate the soundness of our assumption: The regions outside the space charge region are quasi-neutral so that: In the N-region: Similarly, In the P-region: We will now show that the minority carrier currents can be assumed to be diffusive provided low level injection condition prevails. Although this result is general, we shall assume that the N and P regions are of comparable doping. This implies that the electron and hole currents close to the depletion edge will also be comparable. We have already shown that electron and hole diffusion currents are comparable and that for low level injection electron drift current is much larger than the hole drift current in the N-region so that Appendix B To show that Similarly, in the P-region and within the depletion region. in the N-region and within the depletion region. We shall first consider the neutral P-region and show that for low level injection conditions, the

38 hole quasi Fermi level can be considered to be almost flat. We start with the expression: Noting that : where the integral is over the entire length of the neutral P-region. Since Noting that the resistance of the neutral p-region is where A is the device crossectional area, we can obtain Therefore, as long as the IR drop is sufficiently small, the hole quasi-fermi level can be assumed to be constant. How much is sufficiently small? As shown in the main text, the expression which results from making the assumption is Therefore, as long as, the error will be less than 10%. What is this constraint in terms of injection level? Since we obtain the constraint: This constraint would be satisfied if : the low level injection condition!

39 That hole and electron quasi-fermi levels can be assumed to be flat within the depletion region can be demonstrated as follows: As before, we start with the expression: Noting that within the depletion region where W is the depletion width Since, We obtain So as long as, The assumption is fine Since the depletion width is of the order and diffusion length, the assumption is very well satisfied. Appendix C Substitution of the expressions for electron and hole densities in the expression for current results in Since most of the recombination occurs within a very narrow spatial region and electric field is a slowly varying function, it can be taken out of the integral with a value at the position of maximum recombination rate ( ).

40 Substitution of in the above expression allows the integral to be re-written The limits of integration correspond to and. Upon Integration, one obtains Substitution of the limits of integration gives Using the approximation that, we obtain the final expression for the integral as The required expression for current can now be obtained by substituting this expression in Eq. (C5) I - V characteristics in Forward Bias The equation for current flowing through the diode, derived earlier, is given by the expression: This expression was derived under the assumptions: (i) Low Level Injection (ii) Negligible recombination within the SCR Although the equation was derived in the context of forward bias, much of the derivation remains valid in reverse bias also In reverse bias, instead of injection of minority carriers in P and N-regions, there is extraction of minority carriers from them.

41 Holes now flow from and electrons from. As a result, N-region gets depleted of holes and P-region gets depleted of electrons Since can have a maximum value of and respectively, These are the conditions for low level injection if "injection" is interpreted as having a negative value in this case Similarly, for the N-side The spatial variation of electron and hole density is shown below:

42 The electrons diffuse from the bulk of the P-region to the edge of the depletion region after which they are swept away by the junction field. Similarly, the holes diffuse from the bulk of the N-region to the depletion region edge after which they are swept by the electric field to the P-region. The source of electrons in P-region and holes in N-region is thermal generation of carriers. It was shown earlier, in the context of forward bias, that : This expression is equally valid in reverse bias also, with the difference that the last term now represents generation of carriers within the space charge region, instead of recombination. In Forward bias, we had neglected this term but as we shall see, this term is the dominant term under reverse bias for Silicon PN junction diodes. Since within the space charge region: The negative sign indicates generation! Over a large fraction of the depletion width, the electron and hole densities are much smaller than the intrinsic carrier density so that Approximation: This allows the generation current to be written as : The net reverse bias current can be written as:

43 The first tem represents the current due to minority carrier diffusion and the second due to generation within the space charge region. Example 3.1 Calculate the reverse leakage current for a Silicon PN Junction with Solution : For the reverse bias of 1 Volts, depletion width W=0.26µm The magnitude of the diffusion current is The magnitude of the generation current is The generation current is several orders of magnitude larger than the diffusion current! The above example shows that for silicon PN junction diodes, Because the depletion width varies as the reverse bias., the reverse bias current would increase slowly with increase in Example 3.2 In example 3.1 suppose a similar PN junction is made but on a semiconductor with a bandgap of 0.7 ev. Other things remaining the same, will it still be true that the reverse leakage current is dominated by generation current within the depletion region? Solution : The generation current would increase by a factor, while the ideal diode saturation current would increase by a factor. The two currents are now comparable. For even smaller bandgaps, the reverse leakage current will be determined entirely by the ideal diode saturation current. Breakdown: The reverse current increases slowly with increase in reverse bias till impact ionization induced breakdown begins to occur within the space charge region. Impact Ionization: An electron or a hole travelling through a region of high electric field can acquire enough energy to create another electron-hole pair. Impact ionization is characterized by a parameter called ionization coefficient: = probability that an electron causes an impact ionization within dx = probability that a hole causes an impact ionization within dx It is natural to expect that the ionization coefficients would a function of carrier energy and therefore the electric field. There are a variety of models for impact ionization coefficient, simplest of which is :

44 for Silicon (22) As the reverse bias increases, the electric field within the junction also increases thereby increasing the probability of impact ionization. An electron or hole generated due to impact ionization within the depletion region can acquire enough energy again to cause another impact ionization. The new electron-hole pairs generated can in turn generate further electron-hole pairs. As a result of this process, a single carrier entering the depletion region can get multiplied many times over. This process of multiplication is known as Avalanche Multiplication. The normal reverse current gets multiplied by the avalanche multiplication process. When avalanche multiplication becomes large, very large reverse current begins to flow and breakdown is said to occur. To obtain an expression for breakdown voltage, it has to be precisely defined. This is explained using the Figure below: Suppose a single electron enters the depletion region at, number of electrons will come out at the end.. Due to avalanche multiplication, Breakdown : The number of electrons generated within electrons and holes in this region so that will come from impact ionization caused by the where n(x) is the number of electrons at x travelling right to the N-region and p(x) is the number of holes travelling left towards the P-region. Since no holes are assumed to enter the depletion region, p(x) must be due to impact ionization in the region. An equal number of electrons also must have been generated also so that, the number of

45 electrons that would come out of the depletion region must be: This allows Eq. (24) to be re-written as: On Integrating across the depletion region: The breakdown condition for can be now written as: where The computation of breakdown voltage is simpler if we take a one sided junction such as a P+N junction. For this case: At breakdown: The Maximum electric field at the junction when breakdown occurs can be expressed as: The max. electric field at breakdown is a weak function of doping: It can therefore be said that whenever the maximum electric field at the junction acquires a critical value of, breakdown would occur. Taking at breakdown allows an estimate of the breakdown voltage to be determined rapidly for any PN junction diode.

46 Example 2.3 Determine breakdown voltage for a PN junction shown below Assume that = 0.9 Volts Solution : We first perform a check whether at breakdown, the depletion width still lies in the lightly doped region or not. If it does then, This shows that depletion width will extend into the higher doped N-region as well resulting in the following diagram. The electric field at is obtained using the expression. Using the Poisson's equation:. The area under the electric field curve will be equal to + BV so that BV = 40.7 Volts. Example 2.4 Keeping in mind that electron ionization coefficient is larger than hole ionization coefficient, which diode or is likely to have a higher breakdown voltage with identical doping values.

47 Solution : The question can be answered by examining the electron and hole density profiles within the depletion region generated due to impact ionization. These are shown below: In the junction, the electron density is maximum near the high field region at the junction and hole density is minimum. As a result most of impact ionization is done by electrons, while the reverse holds true for junction. Therefore junction will have lower breakdown voltage. Example 2.5 Obtain an expression for the breakdown voltage of a cylindrical PN junction. This is of interest because junctions have a curvature near the periphery which can be considered as cylindrical. Solution : The Figure below shows the junction. The Poisson equation in cylindrical coordinates can be written as

48 Integration of Poisson's equation with the boundary condition that electric field at the depletion edge is zero we obtain Further integration gives The expressions above can be used to find the breakdown voltage by using the fact that at breakdown, the electric field is equal to the critical field. The table below shows the breakdown voltages computed for a doping of and different radii of curvature. As a comparison, the breakdown voltage for a planar junction turns out to be 31 Volts. The expression for multiplication factor derived earlier suggests that multiplication can be empirically modeled as The parameter n varies with the structure of the PN junction, with n=6 for diode n=4 for diode The avalanche breakdown is the most common mechanism of breakdown in PN junction diodes. There is another mechanism called Zener breakdown that comes into play in diodes with heavily doped P and N regions. As noted earlier, in reverse bias, the holes are required to flow from the P-side to the N-side and electrons from P-side to the N-side. The reverse current is normally small because there are so few holes in N-region and electrons in P-region.

49 However, there are plenty of electrons in valence band of P-side and plenty of empty states in the conduction band of N-side. Except via tunneling, the electrons from the valence band of P- region cannot flow to empty states in the conduction band of N-side due to presence of a potential barrier When the probability of tunneling becomes significant, large reverse current begins to flow and Zener breakdown is said to occur. The Figure below depicts the tunneling process: The barrier that the electron sees while tunneling, can be approximated as a triangular barrier as shown below: The tunneling property can be written as Use of the triangular barrier approximation gives : As expected, the transmission probability increases exponentially with the thickness of the

50 barrier which can be expressed as where is the electric field within the junction. As doping increases, the electric field increases causing barrier to become narrower and tunneling probability to increase. To achieve significant tunneling, the barrier width should be only a few tens of Angstroms. The field calculated for Avalanche breakdown was, which is lower than that required for Zener breakdown. It appears, therefore, that avalanche breakdown would always precede Zener breakdown! However, it is not the electric field but the carrier energy that is really important for impact ionization. A very high electric field in a very narrow region may not allow a carrier to gain enough energy so that impact ionization becomes significant. As a result, Zener breakdown occurs in very heavily doped junctions only with small depletion widths. Because of the small depletion widths, the breakdown voltage, despite the high electric field, is often Volts. Diodes which have breakdown voltages larger than 7-8 Volts break down due to Avalanche multiplication process. In the intermediate range both the processes may be active. It is possible to determine the breakdown mechanism by measuring the temperature sensitivity of the breakdown voltage. Diodes which break down via avalanche multiplication have a positive temperature coefficient, while those that breakdown via tunneling have a negative temperature coefficient. The increase in avalanche breakdown voltage with temperature occurs due to increased scattering which makes it more difficult for carriers to acquire energy from the electric field. The decrease of Zener breakdown voltage with increase in temperature occurs because of increased carrier velocity which increases the flux of carriers attempting to cross the barrier. Since transmission probability remains unchanged, the tunneling current increases with temperature. Most of the diodes that go under the name Zener diodes have a breakdown via avalanche multiplication rather than tunneling. Dynamic Characteristics

51 The I-V model derived earlier is valid under steady state conditions when charges, currents and voltages are static. To determine the behavior of the PN junction under time varying excitation, we start from the continuity equation where time explicitly comes into picture: where A is the area of the device. Integrating this equation across the depletion region gives: By virtue of depletion approximation, the last term is zero. The second term can also be neglected because it is much smaller than the first term ; while The net current can be expressed as: The first three are familiar terms. The last term can be rewritten by noting that the junction depletion charge can be expressed as: Therefore, the net current can be expressed as: The last term represents the current due to time variation of the junction depletion charge The current due to variation of depletion charge can be expressed as: where the voltage across the junction

52 where the voltage across the junction where is the junction depletion capacitance. An expression for junction dv capacitance can be easily obtained using the depletion approximation and will be discussed later. The net current can now be expressed as: Let us next look at he minority carrier currents. Under low level injection approximation, they can be assumed to be diffusive so that: As for the static case, the computation of these currents requires determination of minority carrier profiles, which in turn requires solution of continuity equation. For the computation of p(x), the hole continuity equation in N-region has to be solved: This is where the other major difference between static and time varying characteristics comes. Unlike the static case, is no longer zero. For low level injection condition: so that integration of hole continuity equation across the N- region for a long base diode gives: Far away from the junction, the hole current would be zero so that: is the diffusion charge due to excess holes stored in the N-region. The first term in the expression above is also present under static conditions and represents the current due to recombination of injected holes. The second term represents the current due to time variation of stored excess hole charge For the N-side also a similar expression can be written:

53 With these expressions for minority carrier currents, the total current after neglecting the SCR recombination current, can be expressed as: This representation of the diode's behavior is known as the Charge Control model. The operation of many semiconductor devices can be conceptualized as a two step process where the applied voltage modulates the charge within the device, which then modulates the current. Just as the term can be expressed as, similarly, the time variation of diffusion charge can be expressed as: The change in diffusion charge with the applied bias can be represented by a diffusion capacitance defined as The total device current can now be expressed as The first two terms represent current due to recombination in N and P-regions respectively, while the last two represent the current due to charge/discharge of junction and diffusion capacitances. To use the above equation, a relationship between the diffusion charges (and capacitances) and the applied bias is needed. This again requires solution of the continuity equation with the boundary condition that The continuity equation being a partial differential equation is often difficult to solve analytically. It is often assumed that the minority carrier profile under transient conditions has the same form as that under static conditions. In other words:

54 This assumption, known appropriately as the Quasi-static assumption is frequently invoked in analysis of other semiconductor devices as well in order to obtain a simplified solution. The range of validity of this assumption will be discussed a little later. Use of quasi-static assumption allows the diffusion charges to be expressed as The component of current due to minority carrier diffusion and recombination has exactly the same form now as under static conditions: The diffusion capacitance can be expressed as: For the simplified case: The final model of current under quasi-static approx. is: The first term is the conventional diode current, while the last two terms are due to capacitive effects. The expression for total current shows that current under dynamic conditions is the sum of a current which is identical in form to the static current and currents due capacitances in the device. The development of a dynamic model under quasi-static conditions therefore involves only development of a capacitance model of the device. This model is developed by assuming that charge distribution has a form as under static conditions. The validity of the quasi-static assumption for the PN junction diode can be checked by revisiting the continuity equation: The quasi-static assumption would be valid if is much smaller than either of the two

55 terms on the right: Taking assumption as:, we obtain the condition for validity of the quasi-static Similarly, for the N-side For the excitation frequency: one obtains an upper limit on the excitation If the amplitude of the sinusoidal excitation is kept less than the thermal voltage, then quasi static approximation gives reasonable result for frequencies less than The quasi-static assumption breaks down when the voltage across the diode is abruptly switched as shown below:

56 The figure above shows a schematic representation of the current waveform that may be experimentally observed: For the sake of simplicity, we shall assume a wide-base diode The charge control model gives: The diffusion capacitance, as will be shown later, is much larger than the junction capacitance, so that the last term in the expression above can be ignored. For, when the diode is in steady state: After the voltage is switched: The reverse current removes the excess charge stored in the N-region and continues to flow till all charge is removed.

57 Even though quasi-static approx. is not strictly valid here, nevertheless let us use it to get an estimate of the reverse recovery time. The QS approx. implies that: Because of the exponential dependence of charge on diode voltage, the change in diode voltage as the diffusion charge falls from 100% to say 10% of its initial value is less than 60mV and can therefore be neglected. Therefore, the diode voltage and hence the reverse current can be practically assumed to be constant over the entire reverse recovery period. This allows the solution of the differential equation to be written as: The total time for which the diode remains conducting despite the applied reverse bias can be obtained by substituting in the above expression The expression shows that the charge storage time minority carrier lifetime. is directly proportional to the The accuracy of this expression is questionable because the quasi-static approx. as mentioned earlier is not valid here because of the abrupt reversal in applied voltage. The quasi-static approx. implies that the form of minority carrier profile remains the same as under static conditions even though the junction voltage is time varying. The charge decay process is therefore modeled as shown below:

58 The consequence of such a profile is that it predicts almost constant reverse current throughout the transient unlike what happens in reality. Because the current is flowing in the reverse direction at the junction, the expression for diffusion current demands that the slope of the minority carrier profile at the junction be positive and not negative as under static conditions. The actual minority carrier profile on the N-side during the transient actually looks more like that shown below: The reverse transient can be broken into two phases: (i) Constant reverse current phase (ii) Decaying current phase During the constant current phase, the minority carrier density at the depletion edge is non zero: >0.

59 In this situation, the reverse current is primarily determined by the external resistor because (and therefore the diffusion current) can adjust to any value without appreciable change in the diode voltage. This phase of the transient is therefore characterized by a constant reverse current. When falls to zero, the minority charge does not reduce to zero as was assumed to happen in the quasi-static case. There is still a large fraction of stored charge that has to be removed. The reverse current under these conditions is unaffected by the diode voltage because is already zero and cannot be further altered. As a result, current is now determined by the dynamics of the internal hole distribution. The peak hole density decreases with time causing the reverse current also to decrease. This part of the transient is known as the fall time delay. An analytical solution of the time dependent continuity equation can be obtained to determine the values of the storage and fall times but for simplicity only the results will be stated here and compared with that obtained using quasi-static assumption. It can be seen that despite the approximation, the estimate of reverse recovery time using quasi-static approx. is quite accurate if the ratio of forward and reverse current is not too low. Junction Capacitance The junction capacitance in the preceding discussion was defined as

60 To determine an expression for junction capacitance, the incremental change response to incremental change needs to be computed. in As a result of the change in junction voltage, an extra charge will be created on the N-side and an equal but opposite charge on the P-side as illustrated in the Figure: The incremental increase in electric field within the junction as a result of these extra charges is The corresponding change in junction voltage is:

61 For a uniformly doped PN junction, the depletion approx. gives: where is the zero bias junction capacitance. The model derived for junction capacitance is based on depletion approximation. The model works well in reverse bias but tends to overestimate the junction capacitance at high forward bias. For the junction capacitance per unit area is Let us compare this value with the diffusion capacitance: for a wide base junction. For, this turns out to be at a current density of. Therefore, for current densities larger than the junction capacitance can be ignored in comparison with the diffusion capacitance. Under reverse bias, there is very little diffusion charge and it hardly responds the applied reverse bias so that the diffusion capacitance is practically nonexistent and only junction capacitance matters. The measurement of junction capacitance can yield information on doping density and the built-in voltage. This can be obtained by plotting against the applied bias as illustrated for uniformly doped junction in the Figure:

62 If the junction is one sided then the doping on the lightly doped can be extracted through capacitance measurements. This method of extraction of doping works even when doping is non-uniform. In this case: So what is measured in this case is the doping at the edges of depletion region. By changing the bias on the junction, the depletion edge can be sweeped thereby yielding the doping profile in the semiconductor. The junction capacitance for non uniform doping can be modeled as where m is known as the grading coefficient and depends on the nature of doping profile. For linearly graded junction, it can be shown to be 1/3. Example 4.1 A diode with is used in a circuit shown below:

63 Determine the maximum frequency up to which the output voltage can be considered as reasonably well rectified? Solution : The output voltage can be considered as rectified if the diode conducts for a very small fraction of the time during which the voltage applied is negative. We will take this condition as where is the reverse recovery time of the transistor and can be written as For the present circuit Example 4.2 Consider the diode with, and an area of. Which capacitance, depletion will be dominant at the forward current of 0.54mA? Assume that built-in voltage is 0.95 Volts and Solution : The diode forward voltage required for this current can be calculated to be Volts. The junction capacitance can then be calculated to be 1.13 nf. The diffusion capacitance is 21 nf. Hence it will play the dominant role. However, if either the current is reduced or if recombination lifetime were lower, depletion capacitance will also become important. Example 4.3 Consider a uniformly doped junction. The Silicon out of which the diode is made has a deep donor-like energy level within the bandgap as illustrated below. When the PN junction is forward biased, there are plenty of electrons and the defects can all be assumed to be occupied and therefore, being donor-like, they would be uncharged. When the diode is reverse biased, the depletion region becomes devoid of electrons. Initially the defects remain occupied but slowly they emit electrons and become finally unoccupied and thus positively charged. The charge density within the depletion region will thus vary from an initial value of Determine the resulting change in the depletion capacitance.

64 Solution : The depletion capacitance so that capacitance at t = 0 and t = infinity will be Using these two expressions we obtain Thus by measuring the change in capacitance, the defect density can be measured. Deep Level Transient Spectroscopy (DLTS) is a powerful technique for characterizing defects using the above principle. Equivalent Circuit Device Models Since a Model is a representation for a specific purpose, there can be two kinds of device models for Circuit analysis: (i) Models to be used with circuit simulation (ii) Models to be used for "hand analysis" of circuits In the first case, the models have to be as accurate as possible without compromising simulation speed. They can be nonlinear and relatively complex because they are numerically evaluated. In the second case, a simple model that would allow a reasonably accurate estimate of circuit characteristics with minimum computational effort is required. These models are commonly linear and obtained through simplification of more complex models using appropriate assumptions. The models of devices used for circuit simulation are general purpose in nature so that they can be used in a wide variety of situations. This results in their complexity. On the other hand, models for "hand analysis" of circuits have limited range of validity. Due to the requirements of both simplicity as well as reasonable accuracy, several simplifying assumptions have to be used which restrict their range of application.

65 There are a variety of models here, each catering to a specific kind of analysis problem. A model of a PN Junction diode suitable for circuit simulation can be obtained using the general expression for current derived in preceding lectures: The model can be made more accurate by including a parameter called the ideality factor n, to model the departure of real diode behavior from the ideal diode characteristics. A series resistance can also be included to model the diode behavior more accurately at high current densities. As mentioned earlier, the model for junction capacitance is not very accurate in forward bias especially as it begins to approach the built-in Voltage. A better capacitance model uses the conventional expression upto For higher voltages, a different model such as the one given below may be used For The revised model now has eight parameters which are listed below, along with their SPICE representation and default values.

66 The SPICE model for the diode includes several other parameters describing the reverse characteristics and breakdown. There are parameters for modeling noise also which has not been dealt with in the present treatment. In all there are at least 15 parameters in the diode model. It is obvious that this model is not suitable for "mental" simulation of circuits. As mentioned earlier, there are several models that are used for different kinds of "hand analysis" problems: Consider first the dc model: Even an expression of the form is unsuitable for analysis of a simple circuit shown below due to its nonlinear nature: The analysis of the simple diode circuit requires solution of a nonlinear equation:

67 In such cases the analysis is greatly simplified through use of the following simple diode model: In forward bias: is frequently taken as between V. The basis for this model is the weak (logarithmic) dependence of the diode voltage on current so that in comparison with other linear elements, the voltage across can be assumed to be constant. If the applied bias is such that is much larger than say about 100mV (expected deviation in diode voltage for currents which are two orders of magnitude different) then the simplified model gives fairly accurate results. The dc model can be used under transient conditions also provided the frequency of the waveform is lower than the inverse of the transit time. In reverse bias the diode can simply be modeled as an open circuit. For situations where the excitation is of the form: where is the dc forward bias voltage and is the small sinusoidal signal riding on it, a small signal model of the diode is useful. It can be derived as follows: where is the net current flowing though the diode has both a dc and an ac component

68 Eq.(12) can be re-written as Eq. (13), which represents the relationship between small signal diode current and small signal diode voltage is known as the low frequency small signal model of the diode. For so that the model is simply a resistor This simplified linear model is used to a great advantage in wide variety of situations. It is to be noted that the small signal model was obtained basically through linearization of the large signal non linear model. All that needs to be done is a Taylor series expansion of the model equations around a dc bias point. The small signal model for the high frequency case can be quickly obtained by noting that the contributions of the capacitive terms is : Therefore, the high frequency model is simply the low frequency model along with

69 capacitances in parallel as shown below: The small signal model is valid only when the small signal diode voltage is much less than the thermal voltage. The table below shows the accuracy of this model for different values of small signal voltage % % % % +1 72% -1-37% If the small signal voltage is a sinusoidal voltage, then the small signal model overestimates the peak value on the positive side and underestimates on the negative side. As a result, if peak-to-peak signal value is evaluated, the error even at is less than 10% Another model that is very useful particularly for large signal transient analysis is the charge control model. This model along with its application has already been discussed earlier. Example 5.1 Can a small signal model be used for the estimation of sinusoidal current flowing through the diode in the circuit shown below. Assume low frequency case.

70 Solution : The dc analysis of the diode gives a forward current of (5-0.7)/20K = 0.21mA. Let us apply the small signal model and then apply a consistency check. The small signal resistance of the diode will be. The small signal circuit is shown below: The small signal voltage drop across the 121 resistor (or the diode) will be 11.6mV. Now for the validity of small signal model, this voltage drop should be much smaller than the thermal voltage. This is roughly half the thermal voltage and accoding to the table given in the text, the errors would be of the order of 30%. Design Perspective PN junction diodes are used in a wide variety of applications, with each application taking advantage of a different set of diode's characteristics. A few of the applications along with the diode characteristics on which they are base are listed below:

71 Application Mode of Operation Principle Switching Forward and Reverse bias circuits with time varying signals Rectification Photodetectors Reverse bias with time Sensitivity of reverse current varying signals to carrier generation Solar Cells Forward bias with constant Sensitivity of diode current excitation to carrier generation Mixers Forward bias with time varying excitation Nonlinear diode characteristics Let us consider applications where rectifying characteristics of the PN junction diodes is exploited. In these cases, the following characteristics are of interest: (i) Maximum forward current that can flow through the device beyond which the forward ON voltage begins to increase linearly rather than logarithmically with current. (ii) The reverse leakage current at small reverse bias (iii) Breakdown voltage BV (iv) Reverse recovery time The desired diode characteristics have to be obtained at the least cost (C) possible Let us consider the tradeoffs among these diode characteristics for a wide base diode Th max. forward current limited by onset of high level injection is determined by the doping in the lightly doped region : This breakdown voltage can be expressed as The reverse leakage current is proportional to The reverse recovery is proportional to Finally, the cost of diode is proportional to silicon area used so that

72 The equations listed above can be used to obtain the following expressions This expression describes a very important tradeoff among the max. current rating, breakdown voltage and cost of a diode It shows that an increase in forward current can only be obtained either at the expense of a lower breakdown voltage or increased cost due to use of larger Silicon area. The expression also shows that high voltage, high current diodes are likely to be the most expensive diodes. Another expression describing another important tradeoff can be written using the equations listed earlier: This expression shows that an improvement in switching performance can be obtained either at the expense of increased leakage current or a reduced cost. The reduced cost or smaller diode area implies either a lower forward current or a lower breakdown voltage according to Eq. (6) It is interesting to see how breakdown voltage can be traded with switching speed. A reduction in recombination lifetime through say addition of suitable impurities will also increase leakage current. This can be countered by decreasing diode area which however will lead to reduced forward current rating unless doping is increased. This will lead to a reduced breakdown voltage. The breakdown voltage and reverse recovery are also related together in more direct manner. Regions which have higher doping also have a lower recombination lifetime so that a lower breakdown voltage diode is likely to have lower lifetime and better switching speeds. The two tradeoff expressions can also be combined to obtain another expression shown below: The expression above shows why a single diode cannot meet the needs of diverse applications. Different applications put different demands on forward current, breakdown voltage etc which can only be obtained through separate designs. Example 6.1 Design a wide base diode with a breakdown voltage current handling capacity 100mA. 20 Volts and maximum

73 Solution: We shall take diode and assume that and = 1µs Taking the critical field To be on the safe side, we take we obtain The maximum current handling capability is determined by the onset of high level injection effects. The maximum current density is Again to be on the safe side, we take To be considered as wide base diode, the width of N-region should be several times the diffusion length which is 28µm. so we take. There is no point in taking a larger value because it would unnecessarily add to the voltage drop in the neutral N-region. The final design is shown below : Example 6.2 Design a narrow base diode with similar specifications. Comment on the advantages of the narrow base over the wide base diode. Solution : As before, we take At breakdown the junction depletion width should be less than the thickness WN of the N-region, otherwise punch though,discussed in chapter on BJT, would reduce the reverse blocking voltage.at breakdown, the depletion width W can be calculated using the expression From this we obtain, W = 2.5µm. To be on the safe side, we take = 3µm. The maximum current density now is Again, to be on the safe side, we take. Advantages: The area required is an order of magnitude better. Further the transit time of diode

74 now is which is considerably smaller than the recombination lifetime limited transit time of 1µs for wide base diode. Practice Problems 1. Electrostatics: Q.1 For a uniformly doped silicon PN junction diode with an N-type doping of and a P- type doping of 2 x, answer the following questions: (a) Determine the built-in voltage of the junction at T=300K using the expression derived in section 1. (b) Sketch the energy-band diagram of the PN junction at equilibrium and show all the relevant energy values. (c) Determine the total depletion width and its fraction on the N and P-sides respectively at equilibrium. Where will most of the depletion width lie if the P type doping is much larger than the N-type doping? (d) Sketch the electric field within the space charge region and determine its maximum value. By what factor will the maximum electric field increase if the doping in both N and P-regions is doubled? (e) Sketch the potential within the space charge region at equilibrium. What fraction of the builtin voltage is dropped in the N-region? Where will most of the built-in voltage be dropped if the P type doping is much larger than the N-type doping? (f) Determine the magnitude of the depletion width and maximum electric field when the PN junction is forward biased by 0.6 Volts. Sketch the energy band diagram. (g) Determine the magnitude of the depletion width and maximum electric field when the PN junction is reverse biased by 2 Volts. Sketch the energy band diagram. Q.2 A uniformly doped silicon junction diode has an N-type doping of and a P- type doping of a magnitude such that the Fermi energy in the P-type semiconductor coincides with the valence band. Sketch the band diagram and determine the value of built-in voltage from it. Q.3 For and diodes, obtain simplified expressions for electric field, depletion width and potential from the general expressions derived earlier. Q.4 The electric field within the space charge region of a PN junction is given below:

75 (a) Where is the junction located? (b) Assuming depletion approximation, sketch the doping profile on the N and P-sides of the junction. (c) Given that the built-in potential of the PN junction is 0.75 Volts, determine whether the diode is in forward or reverse-bias condition? Q. 5 For a uniformly doped symmetrical PN junction with a doping of, determine the following at equilibrium: (a) The position within the space charge region where electron density (n) is equal to the hole density (p). (b) The position within the space charge region where n= 100 p (c) The position within the space charge region where n= 0.01 p Q.6 (a)the doping profile in a linearly graded junction can be described by the expression For x > 0, the doping is N-type and for x < 0, the doping is P-type. Using an approach similar to the one outlined for a uniformly doped PN junction, obtain expressions for electric field within the depletion region and plot it. (b) Obtain expression relating the depletion width to the voltage across the junction. Q.7 In a Silicon diode, the doping in the N region is exponential and described by the expression: Sketch the electric field within the junction. What is the dependence of maximum electric field on the peak value of doping on the N-side? Q.8 Sketch the electric field within the space charge region of a Silicon diode with the following characteristics:, Intrinsic region I of thickness 1mm.

76 Q. 9 For a uniformly doped heterojunction diode with an N-type doping of and a P-type doping of 2 x, answer the following questions: (a) Sketch the energy-band diagram of the PN junction at equilibrium and show all the relevant energy values. (b) Determine the built-in voltage of the junction at T=300K (c) Determine the total depletion width and its fraction on the N and P-sides respectively at equilibrium. 2. DC characteristics : Forward Bias Q.1 For a uniformly doped wide-base silicon PN junction diode with the characteristics given below, answer the following questions: (a) Determine the magnitude of forward bias voltage required for a current of 1mA to flow. Assume that space charge recombination current is negligible but check the validity of the assumption. (b) Determine the magnitudes of electron and hole currents at the edges of depletion region. (c) Determine the maximum current that can flow through the diode before the ideal diode equation breaks down. (d) Determine the ideality factor of the diode at currents of 1mA, 10A µand 1nA. Q.2 A uniformly doped silicon junction diode has the following characteristics =, N-region thickness of 0.5µm,. (a) Verify that the diode can be modeled as a narrow-base diode. (b) Determine the magnitude of current density at a forward bias of 0.6 Volts. (c) Determine the drift and diffusion components of electron and hole current density and sketch it as a function of position in the N-region. Q.3 A junction diode with same description as above except that the thickness of the N- region is 20 µm.

77 (a) Show that the diode can be modeled neither as a wide-base nor as a narrow-base diode. (b) Using the methodology described earlier for estimation of currents in PN junctions, obtain an expression for forward bias current under low level injection condition. Verify your derivation by checking that your expression reduces to the expressions derived for wide and narrow-base diodes under the appropriate limiting conditions Q.4 (a)the current in a PN junction is a strong function of temperature. Identify the parameters responsible for this dependence and explain which ones may be more important. (b)if the current through a forward biased junction is kept constant, then the voltage across it would change with change in temperature. Show that Neglect temperature dependence of (c)calculate the temperature coefficient for a Silicon diode at a forward bias of 0.6 volts and T=300 K. Does the sign of temperature coefficient make physical sense? Explain. Q.5 A Silicon PN junction biased at a constant voltage of 0.65 Volts is brought from darkness into sunlight. Will the current flowing through the device increase or decrease? Give reasons for you answer. Q.6 (a)a steady state forward bias voltage of 0.5 volts was measured across a diode under open circuit conditions. Explain how the diode can be forward biased and still not carry any current. (b)sketch the minority carrier density on the N-side as a function of position. 3. DC characteristics : Reverse Bias Q.1 The characteristics of a uniformly doped wide-base silicon PN junction diode is given below (a) Determine the reverse saturation current as predicted by the ideal diode equation. (b) Calculate the space charge generation current at a reverse bias of 2 Volts and compare its magnitude with the value calculated in part (a). What is the net reverse current. (c) If the lifetime is reduced by a factor of 10, what impact does it have on the values of two currents calculated above. (d) How much increase in temperature is required to double the net reverse current flowing through the diode at 300 K.

78 Q.2 (a) A Silicon PIN diode is commonly used as a radiation detector. Among the important characteristics of a Photodetector is its dark current which is simply the reverse current of the diode. Determine the generation/recombination lifetime required to obtain a dark current of about 1nA in a PIN diode of area 0.1 and i-region thickness of 100 µm at room temperature. (b) By how much should the temperature of the diode be lowered so as to reduce the current by one order of magnitude? Q.3(a) For a diode with an N-region thickness of 3 mm, determine the N-type doping required to obtain a breakdown voltage of 50 Volts. Assume that breakdown field is 4 x. (b) Determine the depletion width at breakdown and check that the entire N region does not get depleted so that the expression used is correct. Q.4 (a) A diode with a lightly doped region of thickness 2.5 µm is given. Determine the breakdown voltages for the following set of doping values : (b)what is the maximum breakdown voltage obtained and why does breakdown voltage not increase after a certain point even though the doping is lowered? what is the highest doping at which a breakdown voltage which is 90% of this maximum value could be obtained? Q.5 A junction diode is required to have breakdown voltage of 500 Volts. Determine the doping of the N-region and the minimum junction depth ( ) necessary to obtain the required breakdown voltage. 4. Dynamic Characteristics : Q.1 The depletion capacitance/area measured for a symmetrical Silicon PN junction at different bias voltages is given below:

79 (a) Determine the doping of N and P-regions (b) Determine the built-in voltage (c) Determine the depletion width at zero bias Q.2 Using results obtained earlier, show that for a linearly graded junction, the depletion capacitance can be expressed as where is the zero bias capacitance, V is the applied voltage and is the built-in voltage of the junction. Q.3 The reverse recovery waveform for a diode under abrupt switching condition is shown below: (a) Determine the recombination lifetime in the N-region. (b) How much will be the storage time if the reverse current is increased by a factor of 10 while keeping the forward current same. Q.4 Figure below shows a Si PN junction diode with N-region thickness much larger than hole diffusion length and P-region thickness much smaller than electron diffusion length.

80 Determine the effective minority carrier lifetime in the diode defined as total minority carrier charge stored in the device divided by the total current flowing through it. Q.5 A diode is excited with a constant current source as shown below: Obtain an expression for the diode voltage as a function of time after the switch is closed. Use the charge control model with quasi-static approximation, Q.6 The current flowing through a forward-biased diode is suddenly switched off as shown in the figure below: obtain an expression for the diode voltage as a function of time after the switch is opened. Use the charge control model with quasi-static approximation. 5. Circuit Models Q.1 A uniformly doped wide-base silicon PN junction diode has the following characteristics : (a) Obtain a suitable value of the cut-in voltage to be used in the simplified dc model of the diode at about a forward current of 1mA.

81 (b) Obtain a high frequency small signal model of the diode at a forward current of 1mA. (c) Determine the admittance of the diode at frequencies of 1kHz and 1MHz. (d) Obtain a small signal model of the diode at a reverse bias of 5Volts. Q.2 Suggest a diode model that is most suitable for analysis of each of the circuits shown below: Assume a Silicon diode with a turn-on voltage of 0.65 at 1mA and transit time of 1µs. Check the validity of your answer by calculating the output voltage in each case and comparing it with the accurate results obtained using SPICE simulations. 6. Design Perspective : Q.1 Two semiconductors A and B have identical properties except that bandgap of A is larger than that of B. What will be the relative advantages/disadvantages of diodes fabricated on the two semiconductors? Q.2 Two Silicon diodes C and D are identical in all respects except that recombination lifetime in C is larger than that in D. What will be the relative advantages/disadvantages of the two diodes. Q.3 Design a diode structure that can be used as a capacitor of a constant value of 10pF±1pF for voltages ranging between 0-20 Volts. Your design should be such that the capacitor has minimum area and requires values of doping not less than. Q.4 Design a Silicon diode with a breakdown voltage of 500 Volts and a maximum current