Engineering: Elec 3509 Electronics II Instructor: Prof. Calvin Plett,

Transcription

1 Engineering: Elec 3509 Electronics II Instructor: Prof. Clvin Plett, emil Objective: To study the principles, design nd nlysis of nlog electronic circuits. Description: In this course, the student will lern both nlysis nd design of electronic circuits. Both discrete nd integrted circuits will be discussed. This course builds on the concepts covering nlysis of bsic circuits nd signls (covered in ELEC 2501) nd lso bsic electronic devices nd circuits, such s diodes, BJTS, MOSFETS nd Amplifier/Rectifier/Regultor Circuits (covered in ELEC 2507). In this course, single trnsistor circuits will be etended to multiple trnsistor circuits mde of Bipolr Junction Trnsistors. Vrious one nd two trnsistor mplifier circuits will be studied, followed by n eplortion of the opmp. Finlly some opmp ppliction such s design of filters nd oscilltors will be seen. Grding: Lbs (5) 35% Midterm Em 15% Finl Em 50% Totl 100% In-Clss Quizzes +5% bonus All lbs must be completed with n verge grde of 50% or better to pss the course. At lest 50% on the finl em is required to pss the course. Assignments (nd old ems) re on the course web pge. Students re highly encourged to solve them. Answers to mny problems re found t the bck of the book. Others will be provided. Acdemic ccommodtion for ny reson must be sought s soon s possible, preferbly erly in the term. Verifiction will be required. As per fculty regultions, Lb Eemptions re not llowed References: 1. Microelectronic Circuits, 4 th, 5 th, 6 th, or 7 th Edition, A. Sedr nd K. Smith, Oford University Press, 1998, 2004.C.L. Alley nd K.W. Atwood, Microelectronics, 1986, TK7874.A P.R. Belnger et l, Introduction to Circuits with Electronics, 1985, TK7867.B R. Boylestd nd L. Nshelsky, Electronic Devices nd Circuit Theory, TK7867.B P. Gry, Anlysis nd Design of Anlog Integrted Circuits, TK7874.G H. Lm, Anlog nd Digitl Filter Design, TK7872.F5L J. Millmn, Microelectronics, TK7874.M C.J. Svnt et l, Electronic Circuit Design, TK7876.S R.J. Smith, Circuits, Devices nd Systems, TK45.S M.H. Rshid, Microelectronic Circuits: Anlysis nd Design, M.N. Horenstein, Microelectronic Circuits nd Devices, TAs: Tenttively: Hrel Lichtenstein, Klid Ali Adem, Dvid Berton, Mingze Li, Pengshui Ren, Weicong N 1

2 Week 1, 2: Week 3, 4: Week 5, 6: Week 7, 8: Week 9, 10: Lecture Outline Review of Bsic Electronic Devices nd Circuits: p-n Junction, Diode Eqution, Bipolr Junction Trnsistors (BJT): Concepts, Current Reltions, Regions of Opertion, Chrcteristics, Bising, Smll-Signl BJT model, Common Emitter Amplifier: AC nlysis, Input nd Output Resistnce, Voltge/Current Gins, Frequency Response. Common Bse Configurtion nd Cscode Amplifier, Common Collector Configurtion, CC-CB Widebnd Amplifier, Current Source/Sink Bis. Frequency Anlysis of Trnsistor Amplifiers, Bode plots, Differentil Amplifier Stge, CMG, DMG, CMRR, Anlysis of 741 IC Op-Amp. Power Amplifiers: Clss A, Clss B, Clss AB, Clss C, Filters: RC filters theory, Second-order trnsfer functions. Filter Design Methodology: Types, Specifictions, Approimtions nd Prcticl Circuit Topologies, Applictions. Week 11, 12: Feedbck Stbility nd Liner Oscilltor Circuits, Applictions, Review. Notes on Lb Projects nd Eercises Gols: The lbortory portion of the course reinforces this theme through nlysis nd design of electronic circuits. As well, through the lb eperiments, students will etend their previous eperience of circuit design using few discrete trnsistors, nd will begin to use ICs s the bsis for designs. Topics: The lb topics form coherent sequence following the lectures, beginning with BJT chrcteristics, followed by BJT mplifiers, op-mp circuitry, nd, finlly, the op-mp's use in filters nd oscilltors. Orgniztion: The lbs re n integrted miture of 10 multi-week eercises nd projects. In order to complete ll of the work, students ttend the lb every week; there re no problem nlysis sessions in the course. For every lb, students work in groups of two nd provide one report per group of two. Groups of three or more re not llowed. Groups of 1 re llowed, but ttempts will be mde to find prtners for ll. Eercises: For the lb eercises, students re epected to hve completed ny required preprtion before they come to the lb, nd, in the lb, to tke notes which must be initiled by T.A. before they leve. For most of the eercises, forml report is written fter ll the prts of the lb hve been completed, nd must be submitted by 30 minutes fter their lb scheduled strting time seven dys fter the period in which the lb's lst eercise ws performed. The report must include the initiled lb notes s n ppendi. The intent is to hve lbs submitted vi culern with more detils to be provided lter. Lb 5 on oscilltors hs n in-lb quiz nd no forml report. Projects: As with the eercises, students re epected to hve completed ny required preprtion before they come to project lb. During one of the periods for ech project, the student will be required to demonstrte working circuit. If fter the demonstrtion, the T.A. is stisfied tht the circuit nd the demonstrtion re cceptble, the T.A. will initil the student's design sche- 2

3 mtic. This initiled schemtic must be submitted s n ppendi to forml engineering report fully nlyzing nd documenting the designed circuit(s). Sufficient dt should be recorded to show tht ll the requirements hve been stisfied. The finl report is due in the stirwell filing cbinet by 30 minutes fter their lb scheduled strting time 7 dys fter the student's lst scheduled lb period for the project. For the second project, the finl demonstrtion will require some time nd so will be mde t n ppointed time during the lb period. Thus, it is epected tht the student will hve his or her circuit functioning to meet the specifiction before the finl period of this project. It is emphsized tht full dvntge should be tken of the scheduled lbortories nd the dvice vilble from fculty members nd teching ssistnts, s well s from lbortory demonstrtions, during these periods. Ltes: Lte reports nd demonstrtions re ech penlized 30% if received within one week of the listed dedline, while lter ones will receive grde of 0. However, in order to pss the course, students must complete ll lbs Lbortory Regultions: Food nd drinks re not llowed in the lbortory t ny time. Most importntly, students re epected to disply mture nd professionl ttitude while in the lb. Lb Equipment: The person responsible for most of the undergrdute electronics lbs is Mr. Ngui Mikhil, nd his room number is 5124 ME. Any ml-functioning equipment should be reported to the T.A.s who in turn will report problems to Ngui. Helth nd Sfety: students should be fmilir with the loctions of fire etinguishers, first-id kits, the emergency phone number (4444), regultions nd the University Helth-And-Sfety document. More informtion is provided on the course web pge. Components nd Tools: Bords, component kits nd tool sets cn be purchsed directly from the lb technicin. Wire strippers, smll-tipped screwdriver nd pir of needle-nosed pliers re essentil tools for performing the lb work. Lb Outline Lb 1: BJT A.C. nd D.C. Opertion -BJT D.C. Chrcteristics nd the current Mirror. -BJT A. C. Chrcteristics Lb 2: Amplifier Project -Single Trnsistor nd Two-Trnsistor Amplifiers -Cscode Amplifier Design Review nd Development -Cscode Demonstrtion Lb 3: Bipolr Op-Amp Simultion -Design, Schemtic -To investigte the effect of vrious design prmeters Lb 4: Active Bnd-Pss Filter Project -Introduction to Active Filters nd Filter Simultions nd Mesurements -Chebyshev Filter Design Review -Chebyshev Filter Demonstrtion Lb 5: Oscilltors -Wien Bridge nd the Active-RC Phse Shift Qudrtic Oscilltors 3

4 Introduction to Liner circuits nd Systems. {SS4, SS5, SS6, SS7 Ch1} - system view point of the circuit {SS4,5,6,7 = Sedr & Smith 4th, 5th, 6th, 7th ed.} Signl Representtion v A = V A + v. totl = DC + c Amplifiers: Symbol clss of 2-port networks giving more voltge, current or power t their output thn t their input. input output input output (common terminl) (of course, power supplies not shown) voltge mplifier ut voltge gin A v ut = = ---- gin voltge in db: 20log A v, note, bsolute vlue required since A v my be negtive current mplifier: i in current gin i in trnsconductnce Amp power Amp P in P out A p P out ut = = , in db, 10 log P in i 10 A p in 4

5 Frequency Response A sinewve into liner mplifier lwys gives sinewve out. However, its mplitude nd phse re usully different. Amplifier Trnsfer Function is the gin of the mplifier versus frequency: j Hj = j or using the comple frequency vrible s = j : Hs = s s H(j) (db) frequency response: mplitude response Hj vs. H(j) phse response Hj vs NETWORK THEOREMS Thevenin s, Norton, {SS4 E1-E3, SS5 C1-C3, SS6 App D (DVD), SS7 App D (website)} Thevenin nd Norton Theorems were studied in n erlier course. Thevenin s theorem sttes tht ny circuit cn be replced with n equivlent circuit consisting only of n equivlent voltge source (the Thevenin voltge source) in series with n output impednce. Norton s theorem is similr ecept tht the Thevenin voltge source is replced with Norton current source which is prllel to n output dmittnce. The purpose of these theorems is to llow us to redrw the circuit to one which my be esier to nlyze or understnd. originl circuit equivlent circuit + 6k 2k V + 3V th - 3k 1V - + 2k I 2V N 2k - 1mA R th 4k R N 1k v th = open circuit voltge R th = equivlent driving resistnce I N = equivlent short circuit current R N = Norton resistnce 5

6 Source Absorption Theorem {SS4 E3-E5, SS5 C3-C5, SS6 (dvd), SS7 (website)} When controlled current is controlled by the voltge cross itself, i.e., v I = g m v Then the controlled source cn be replced by n impednce 1 Z = -----, i.e., g m v I z v I v g v m 1 g m Miller s Theorem {SS , SS , SS , SS } When n dmittnce bridges two nodes, i.e., y then the dmittnce cn be replced by n dmittnce to ground from ech node, i.e., y 1 y 2 where: y 1 = y y 2 = y notes: for resistors, y = 1/R, y 1 = 1/R 1, y 2 = 1/R 2, for cpcitors, y = sc, y 1 = sc 1, y 2 = sc 2 6

7 note tht is the gin between nd. Wrning, Not vlid if or re subsequently chnged, i.e., by moving test signl to the output of n mp to determine the output impednce. Also note tht if the gin is function of frequency, the Miller effect is only vlid t the frequency for which it ws originlly clculted. Emple ---- = K = 1M R s v s g m Determine R in Use Miller s Theorem R s R in 0.1A/V v s R 1 R 2 g m R in From originl circuit => = g m = 1 g m ---- = 1 g m = 10 5 R = = 10 1 R = = 1 M 1 7