PM50CSE120 FLAT-BASE TYPE TYPE INSULATED PACKAGE
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- Cameron Lizbeth Gregory
- 5 years ago
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1 MITSUBISHI <TELLIGET OWER OWER MODULES> FLT-BSE TYE TYE FETURE a) dopting new 4th generation planar IGBT chip, which performance is improved by 1µm fine rule process. b) Using new Diode which is designed to get soft reverse recovery characteristics. 3φ 50, 10 Current-sense IGBT for 15kHz switching Monolithic gate drive & protection logic Detection, protection & status indication circuits for overcurrent, short-circuit, over-temperature & under-voltage coustic noise-less 5.5/7.5kW class inverter application LICTIO General purpose inverter, servo drives and other motor controls CKGE LES Dimensions in mm 1±1 95± φ5.5 MG HOLES Screwing depth Min ±0.5 B BT 74±0.5 89±1 Terminal code 1. UC 2. U 3. U1 4. C WC 8. W 9. W1. C C 13. U W 16. FO 0.5± W U R6 6-M5UTS 2-φ φ LBEL : DETIL
2 FLT-BSE TYE TERL FUCTIOS BLOCK DIGRM Rfo=1.5kΩ C C W 1 U WC W W1 C 1 UC U U1 Rfo TEM Gnd Out Th C W U MXIMUM RTGS (Tj = 25, unless otherwise noted) ERTER RT Condition Ratings CES ±IC ±IC C Tj Collector-Emitter oltage Collector Current Collector Current (eak) Collector Dissipation Junction Temperature D = 15, C = 15 TC = 25 TC = 25 TC = ~ +150 W COTROL RT Condition Ratings D Supply oltage pplied between : U1-UC C FO IFO put oltage Fault Output Supply oltage Fault Output Current 1-C, W1-WC, 1-C pplied between : U-UC, -C W-WC, U W-C pplied between : FO-C nk current at FO terminal m
3 FLT-BSE TYE TOTL SYSTEM Condition Ratings CC(ROT) Supply oltage rotected by D = 1 ~ 16.5, verter art, OC & SC Tj = 125 Start 800 CC(surge) TC Tstg iso Supply oltage (Surge) Module Case Operating Temperature Storage Temperature Isolation oltage pplied between : -, Surge value or without switching (ote-1) 60Hz, nusoidal, Charged part to Base, C 1 min. 00 ~ ~ (ote-1) TC measurement point is as shown below. (Base plate depth 3mm) rms BT B W U 65mm Tc THERML RESISTCES Min. Typ. Max. Rth(j-c)Q Rth(j-c)F Rth(j-c )Q Rth(j-c )F Rth(c-f) Junction to case Thermal Resistances Contact Thermal Resistance verter IGBT part (per 1 element), (ote-1) verter FWDi part (per 1 element), (ote-1) verter IGBT part (per 1 element), (ote-2) verter FWDi part (per 1 element), (ote-2) Case to fin, Thermal grease applied (per 1 module) (ote-2) TC measurement point is just under the chips. If you use this value, Rth(f-a) should be measured just under the chips /W ELECTRICL CHRCTERISTICS (Tj = 25, unless otherwise noted) ERTER RT CE(sat) EC ton trr tc(on) toff tc(off) ICES Collector-Emitter Saturation oltage FWDi rward oltage Switching Time Collector-Emitter Cutoff Current D = 15, IC = 50 Tj = 25 C = 0, ulsed (Fig. 1) Tj = 125 IC = 50, D = 15, C = 15 (Fig. 2) D = 15, C = 15 0 CC = 600, IC = 50 Tj = 125 ductive Load (upper and lower arm) (Fig. 3) CE = CES, C = 15 (Fig. 4) Tj = 25 Tj = 125 Min. Typ. Max µs m
4 FLT-BSE TYE COTROL RT ID th(on) th(off) OC SC toff(oc) OT OTr U Ur IFO(H) IFO(L) tfo Circuit Current put O Threshold oltage put OFF Threshold oltage Over Current Trip Level Short Circuit Trip Level Over Current Delay Time Over Temperature rotection Supply Circuit Under-oltage rotection Fault Output Current Minimum Fault Output ulse Width D = 15, C = 15 1-C X1-XC pplied between : U-UC, -C, W-WC U W-C D = 15 (Fig. 5,6) Tj = 25 Tj = 125 Tj 125, D = 15 (Fig. 5,6) D = 15 (Fig. 5,6) Base-plate Trip level Temperature detection, D = 15 Reset level Tj 125 Trip level Reset level D = 15, FO = 15 (ote-3) D = 15 (ote-3) Min Typ Max m µs m ms (ote-3) Fault output is given only when the internal OC, SC, OT & U protection. Fault output of OT protection operate by lower arm. Fault output of OC, SC protection given pulse. Fault output of OT, U protection given pulse while over level. MECHICL RTGS D CHRCTERISTICS Mounting torque Mounting torque Weight Main terminal Mounting part screw : M5 screw : M5 Min. Typ. Max m m g RECOMMEDED CODITIOS FOR USE CC D C(on) C(off) fwm tdead Supply oltage Control Supply oltage put O oltage put OFF oltage WM put Frequency rm Shoot-through Blocking Time pplied across - terminals pplied between : U1-UC, 1-C W1-WC, 1-C (ote-4) pplied between : U-UC, -C, W-WC U W-C Using pplication Circuit input signal of IM, 3φ sinusoidal WM F inverter (Fig. 8) r IM s each input signals (Fig. 7) (ote-4) llowable Ripple rating of Control oltage : dv/dt ±5/µs, 2p-p Recommended value ± khz µs
5 FLT-BSE TYE RECUTIOS FOR TESTG 1. Before appling any control supply voltage (D), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state. fter this, the specified O and OFF level setting for each input signal should be done. 2. When performing OC and SC tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above CES rating of the device. (These test should not be done by using a curve tracer or its equivalent.), (U,,W), (U,,W) C (0) C (15) U,,W, () D (all) Fig. 1 CE(sat) Test U,,W, () D (all) Fig. 2 EC Test a) Lower rm Switching C (15) C C C (15) (Upper rm) (Lower rm) b) Upper rm Switching (Upper rm) (Lower rm) trr CE Irr U,,W CS 90% 90% D (all) % % % % tc (on) tc (off) C U,,W CS td (on) tr td (off) tf (ton= td (on) + tr) (toff= td (off) + tf) D (all) Fig. 3 Switching time Test circuit and waveform C (15), (U,,W) ulse CE C Over Current D (all) U,,W, () Fig. 4 ICES Test IC toff (OC) Constant Current OC, (U,,W) Short Circuit Current C CC Constant Current SC IC U,,W, () D (all) IC Fig. 5 OC and SC Test Fig. 6 OC and SC Test waveform D C U,,W D C C 0 C t 0 tdead tdead tdead Fig. 7 Dead time measurement point example t
6 FLT-BSE TYE D D k µ U1 U UC 1 C GD GD GD GD U + M D k µ W1 W WC U GD GD W GD GD k µ TEM Th D k µ 1 W GD GD C GD GD C C 5 1k Rfo : terface which is the same as the U-phase Fig. 8 pplication Example Circuit OTES FOR STBLE D SFE OERTIO ; Design the CB pattern to minimize wiring length between opto-coupler and IM s input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Quick opto-couplers: TLH, TLH 0.8µs. Use High CMR type. The line between opto-coupler and intelligent module should be shortened as much as possible to minimize the floating capacitance. Slow switching opto-coupler: recommend to use at CTR = 0 ~ 0%, put current = 8 ~ m, to work in active. Use 4 isolated control power supplies (D). lso, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between and terminal. Use line noise filter capacitor (ex. 4.7nF) between each input C line and ground to reject common-mode noise from C line and improve noise immunity of the system.
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N A C D Q Q Q 1 234 5678 9 11 13 15 17 2 14 16 18 V (14 TYP.) R (2 TYP.) 1. VUPC 2. UFO 3. UP 4. VUPI 5. VVPC 6. VFO 7. VP 8. VVPI 9. VWPC 10. WFO 11. WP 12. VWPI 13. 14. 15. 16. 17. 18. 19. 20. 21. 22.
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Three Phase IGBT Inverter Output N A C D Q Q Q 1 234 5678 9 11 13 15 17 2 14 16 18 V (14 TYP.) R (2 TYP.) 1. VUPC 2. UFO 3. UP 4. VUPI 5. VVPC 6. VFO 7. VP 8. VVPI 9. VWPC 1. WFO 11. WP 12. VWPI 13. 14.
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6121 Baker Road, Suite 108 Minnetonka, MN 55345 www.chtechnology.com Phone (952) 933-6190 Fax (952) 933-6223 1-800-274-4284 Thank you for downloading this document from C&H Technology, Inc. Please contact
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