Investigation of Inter-Line Dynamic Voltage Restorer in Multi Feeder Distribution System for Voltage Sag Mitigation
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1 Proceedings of the 14th nternational Middle East Power Systems Conference (MEPCON 10), Cairo University, Egypt, December 19-1, 010, Paper D 163. nvestigation of nter-line Dynamic Voltage Restorer in Multi Feeder Distribution System for Voltage Sag Mitigation Ahmed Hossam-Eldin Ahmed Elserougi Ahmed Massoud Shehab Ahmed Electrical and computer Elect. and computer Engineering Electrical Engineering Department Engineering Dept. Dept. Alexandria university, Egypt Qatar university, Qatar Texas A&M University at Qatar Hossamudn009@yahoo.com abbas_zone@yahoo.com Ahmed.massoud@qu.edu.qa Abstract - The nter-line Dynamic Voltage Restorer (DVR) consists of several voltage source inverters connected to different independent distribution feeders with common dc bus. When one of the inverters compensates for voltage sag that appears in its feeder (voltage control mode), the other inverters pump the required power into the dc bus (power control mode). Each inverter will have both voltage and power controllers; only one controller is in use during the abnormal conditions according to its feeder state. The inverter will be switched to the voltage controller during voltage sag. However the inverter will be switched to the power controller if its feeder voltage was normal and real power is needed to compensate for sag in another feeder(s). The voltage controller uses one of the dynamic voltage restoration techniques. n this paper, the inphase technique is applied. Since the voltage restoration process may need real power injection into the distribution system. The power controllers share in injecting this power; a proposed scheme is introduced to determine the reference power of each power controller. Simulation results substantiate the proposed concept. ndex Terms Dynamic voltage restorers, DVR, voltage sag, power Quality.. NTRODUCTON Dynamic Voltage Restorers (DVRs) are very effective series-compensation devices for voltage sag mitigation. Due to the increase in using equipments that are sensitive to voltage variations, the voltage sag problem becomes one of the important power quality problems. The voltage sags are caused by sudden increase in loading, faults or motors starting. Voltage sag mitigation devices are classified into; Conventional solutions using tap changers. These devices are heavy and buly; that is why they are rarely used. Uninterruptible Power Supplies: the main disadvantage of this method is that the UPS has to carry the entire load without any energy contribution from the grid which is very difficult in high power applications. Static synchronous compensator (STATCOM): t wors by rebuilding the incoming voltage waveform by switching bac and forth from inductive to capacitive load. f it is inductive, it will supply reactive AC power. f it is capacitive, it will absorb reactive AC power. Usually a STATCOM is installed to support networs that have a poor power factor and often poor voltage regulation [1]. Dynamic Voltage Restorers: it is a voltage source converter (VSC) which is connected in series with the grid. The basic operating principle of the DVR is to inject an appropriate voltage in series with the supply through injection transformer whenever voltage sags or swells tae place. The dynamic voltage restorer (DVR) [, 3] is the most technically advanced and economical device for voltage-sag mitigation in distribution systems. Energy storage units in DVRs are responsible for supplying the active power component needed during voltage sag. f this energy is obtained from neighbour feeder(s) it is called interline dynamic voltage restorer (DVR) [4-6]. The DVR consists of several DVRs connected to different distribution feeders in the power system with common dc bus, as shown in Fig 1. The voltage-restoration process needs realpower and/or reactive power injections into the distribution system, so when one of the DVR compensates for voltage sag, the other DVRs restore the voltage the common dc bus via complementing the required energy [5]. Each inverter will have both voltage and power controllers, only one controller will be in use during the abnormal conditions according to its feeder state. Fig 1: nterline dynamic voltage restorer (DVR) for n feeder 79
2 . POWER CONTROLLER WTH VRTUAL MPEDANCE NJECTON FOR VOLTAGE SAG MTGATON For inter-line dynamic voltage restorer with two radial independent feeders, if voltage sag occurred at one of the feeders, its inverter will compensate for the voltage sag via injecting suitable voltage (voltage control mode). Since the voltage-restoration process needs real power injection into the distribution system, this real power is decided by the type of voltage-restoration method [6-8], namely, n-phase injection, Pre-sag supply voltage injection and Energy saving injection. n the first method, the inverter injects a voltage in phase with the supply voltage. The second method has minimum inverter voltage injection but a phase jump may introduce problems for loads sensitive to supply voltage phase jumps. n the third method, the power injected by the inverter is minimized. The other inverter will be responsible for restoring the energy absorbed from the dc bus via injecting suitable virtual impedance (power control mode). Assuming that the feeder is feeding a three phase balanced load, Fig shows per phase equivalent circuit of feeder with series virtual impedance injection. Fig 3 shows the corresponding phasor diagram. Since the three phases load is balanced, all the following analysis will be done for per phase circuit. The voltage injection is simulated by a voltage drop across series impedance. The impedance injection must not perturb the load voltage magnitude. Moreover, the power consumed by this impedance represents the required power to be transferred. P P Fig. Feeder circuit with virtual impedance injection To transfer power and to eep the load voltage magnitude unchanged, the injected voltage must have two components, namely V r which is in phase with current phasor, and V x, which is perpendicular to the current phasor, as shown in Fig 3. The V r component absorbs active power ( P) from source and V x component eeps the load voltage magnitude unchanged. For a given transferred power P, the corresponding value for the capacitive reactance x should be estimated from the following relations to ensure constant load voltage magnitude. The load power is given by (1) V cos( ). (1) The supply power is given by (), as indicated in the phasor diagram shown in Fig 3. Hence max Fig 3. Phasor diagram of feeder P V cos( ) () cos PL P ( ) V 1 The maximum value for angle β is the load power factor angle where the supply input power factor will be unity. Moreover, the maximum allowable P corresponds to unity input power factor. For a given load power factor, the maximum value for P is given by (4) V(1 cos( )) (4) P max The resistance r, which represents absorbed active power from feeder, is given by P V {cos( ) cos( )} r (5) From the phasor diagram, shown in Fig 3, the chord ab length is given by V inj (3) V sin(0.5 ) Vr Vx (6) Hence, the capacitive reactance x can be calculated as x ( V Substituting (6) in (7), yields inj (7) Vr V x 4 sin ( 0.5 ) r (8) Fig 4 shows the relation between P (i.e. r) and x for different values of load power factor assuming that load voltage and current magnitudes are 1 p.u. The locus of unity input pf is part of a circle, as shown in Fig 4. This can be proved as follows. V s V L Z (9) Substituting with phasor values, yields ( r jx ) (10) Hence ( 1 r ) jx 1 (11) ) 80
3 Eq(11) represents a circle equation of radius 1p.u and centred at (1, 0) in the complex impedance plane. Fig 4: Relation between P (or r) and x for different values of load power factor. PROPOSED CONTROL SCHEME The angle of voltage phasor V s is assumed zero. For given P and measured signals (, V, pf) a voltage source inverter is used to inject a suitable voltage in series with the grid; this injected voltage has a reference magnitude is equal to (. r x ) where r, x calculated from Eqs (5), (8) and voltage angle is equal to ( ) from Fig 3. The bloc diagram of power controller is shown in Fig 5. For supply voltage V s =1p.u, Z load =1p.u and load power factor 0.8 lag with reference power P =0.1 p.u for 0.1<t<0.s due to voltage sag in another feeder, the performance of power controller is shown in Fig 6. At 0.8 lag load power factor, the virtual injected resistance and capacitive reactance values will be 0.1 and p.u respectively which verifies the graph shown in Fig 4. From results shown in Fig 6, the supply power increased with P but the load voltage V Load and load power oad does not change, this power ( P) is fed to the dc bus without affecting the load voltage magnitude. P Fig 5: Bloc diagram for proposed control scheme Fig 6: Performance of power controller for 0.8lag load power factor; voltages and power in p.u. V. CASE STUDY OF DVR WTH TWO FEEDERS SYSTEM Case 1: sag condition at feeder 1 with normal condition at feeder ; The two feeders fed constant impedance loads with the following data V s1 Load 1 V s Load Table. simulation data for case 1 0V per phase, 50Hz, with 0% voltage sag for 0.1<t<0.s. 10+j10 ohm per phase. 0V phase,50hz. 10+j10 ohm per phase. The simulation results are shown in Fig 7. The load voltage and power of load 1 does not change due to voltage sag in supply 1 because the inverter 1 injects voltage V inj1 to maintain constant voltage. The inverter 1 is switched to voltage controller during the sag; this voltage injection consumes an active power P 1 from the dc bus. This power is taen from feeder which pumps an active power P to the dc bus via impedance injection (P =P 1 ), which means that the inverter is switched to power controller and injects voltage V inj to pump the required power. The load voltage and power of load does not change during the compensation. The supply power P s1 decreased which means that the injected voltage acts as voltage source which helps the supply in feeding the load. The supply power P s increased to feed the load and pump the required power to the dc bus at the same time. 81
4 From simulation this values can be obtained ( P 1 = r 1 =0.1364, x 1 =0.1984), ( P = r =0.1091, x =0.1834) and ( P 3 = r3 =0.0545, x 3 =0.1378).This verified the graph shown in Fig.4. Fig 7. Case 1 simulation results; voltages in volt and powers in watt V. PROPSED SCHEME FOR MULT-FEEDER SYSTEM f there are more than one feeder (assume m-feeder) used to pump P power to the dc bus, each feeder will contribute with certain ratio according to input command P =1,, 3.., m for each feeder. From measured signals P (max) of each feeder can be estimated; it is the maximum power which the feeder can contribute with in the dc bus; where P V (1 pf ) (1) (max) P can be calculated from the following proposed scheme; first of all we must satisfy the following condition; P P (max) (13) m 1 Then P (max) P P m P ; where =1,, 3,,m. 1 (max) (14) Assume 3 feeders connected to loads with 0.75, 0.8 and 0.9 lagging power factor. The maximum power can be absorbed from the feeders is equal to {(1-0.75) + (1-0.8) + (1-0.9)} = 0.55 p.u For P=0.3p.u (i.e. <0.55) for 0.1<t<0.s, each feeder will contribute with a certain ratio estimated from (14). The simulation results are shown in Fig. 8.The simulation result shows the load power P load and the supply power P s of each feeder, the difference between them is the pumped power from that feeder to the dc bus. Figure 8: Multi-feeder scheme simulation CASE STUDY Assume DVR with five feeders with the following table Feeder1 Feeder Feeder3 Feeder4 Feeder5 Table. Muti-feeder system data 0V phase, connected to 10+j10 ohm per phase load, with 10% voltage sag from s 0V phase, connected to 10+j10 ohm per phase load, with 10% voltage sag from s 0V phase, connected to ohm per phase impedance,0.707 pf lag 0V phase, connected to ohm per phase impedance,0.8 pf lag 0V phase, connected to ohm per phase impedance,0.85 pf lag The feeder 1 and will absorb from P dc bus and feeder 3, 4 and 5 will shared in pumping this power to dc bus with different ratios according to P max of each feeder. t is easy to calculate the ratios from proposed multi-feeder feeding scheme. The ratios are P 3 = P, P 4 = P and P 5 =0.333 P. This verified by simulation results as shown in Fig.9. 8
5 REFERENCES [1] Singh, B. ; Saha, R. ; Chandra, A. ; Al-Haddad, K. ; Static synchronous compensators (STATCOM): a review, Power Electronics, ET Volume :, ssue:4,pp , July 009. [] A. Ghosh and G. Ledwich, Compensation of distribution system voltage using DVR, EEE Trans. Power Del., vol. 17, no. 4, pp , Oct. 00. [3] S. S. Choi, B. H. Li, and D. M. Vilathgamuwa, Dynamic voltage restoration with minimum energy injection, EEE Trans. Power System, vol. 15, no. 1, pp , Feb. 000 [4] Vilathgamuwa, D.M.; Wijeoon, H.M.and Choi S.S, nterline dynamic voltage restorer: a novel and economical approach for multi-line power quality compensation, ndustry Applications Conference, th AS Annual Meeting, pp vol.. [5] Wijeoon, H.M.; Vilathgamuwa, D.M.; Choi, S.S., nterline dynamic voltage restorer: an economical way to improve interline power quality, Generation, Transmission and Distribution, 003, EE Proceedings, Vol. 150, ssue 5, pp [6] D. Mahinda, H. M. Wijeoon, and S. S. Choi, A Novel Technique to Compensate Voltage Sags in Multi-line Distribution System; the nterline Dynamic Voltage Restorer, EEE transactions on industrial electronics, Vol. 53, No. 5, pp ,Oct [7] Hongfa Ding, Shu Shuangyan, Duan Xianzhong, Gao Jun, A Novel Dynamic Voltage Restorer and its Unbalanced Control Strategy Based on Space Vector PWM, Electrical Power and Energy Systems, vol. 4, 00, pp [8] Massoud, A; Ahmed, S; Enjeti, P; Wayne Williams, B;, "Evaluation of a Multilevel Cascaded Type Dynamic Voltage Restorer Employing Discontinuous Space Vector Modulation," ndustrial Electronics, EEE Transactions, Volume 57, No. 7, pp , July 010. Fig.9. Simulation output for multi-feeder system Case study CONCLUSON New control scheme is proposed for the power controller(s) in DVR system. When one of the feeders is subjected to voltage sag, the voltage restoration will need real power so each power controller of the other feeders will share in injecting the required power to mitigate this sag. 83
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