SESUB - Its Leadership In Embedded Die Packaging Technology

Transcription

1 SESUB - Its Leadership In Embedded Die Packaging Technology Sip Conference China 2018 TDK Corporation ECBC, PAF, SESUB BU Kofu, Japan October 17, 2018

2 Contents SESUB Introduction SESUB Process SESUB Quality SESUB Potential Application Summary ECBC PAF SESUB BU 2

3 What Could be the Next Big Thing in the Semiconductor Growth? Autonomous Vehicles? AR / VR Hear Phone / Voice Commander Source: WSTS, JEITA, Gartner, TDK ECBC PAF SESUB BU 3

4 Infrastructure for Future Networking System Today Cloud Server Require Huge Data Servers or Wireless Network Entry Points (Base Station) Network Traffic over Wireless Requires Data Speed & Connectivity ECBC PAF SESUB BU 4

5 Infrastructure for Future Networking System Tomorrow Mobile Edge Computing (MEC) Cloud Server Locate MECs nearby Users In order to shorten Latency Require Huge Data Servers or Wireless Network Entry Points (Base Station) Network Traffic over Wireless Requires Short Latency in Addition to Capacity for Connected Car ECBC PAF SESUB BU 5

6 Semiconductor Packaging Platforms Integration Category 2D 3D Increased Functionality, Performance, Cross Over Models Multiple Dies IC GVI Die Count Single Die Interconnect Technology Bumping, Pillars, Studs, Through-Silicon-Via, Bump-Less, Embedded Technologies Source: Yole, TDK Modularizing by SiP for Cross Over Models Contributes Time-In-Market with Lower Development ECBC PAF SESUB BU 6

7 SESUB Concept SESUB = Semiconductor Embedded in SUBstrate IC Package Technology SiP Technology WL-CSP QFN Laminate SiP 2.5D SiP TDK SESUB SiP IC (Active die) is embedded in organic substrate, and other SMT integrated on it IC die Embedded inside PCB Other components Mounted on PCB ECBC PAF SESUB BU 7

8 SESUB Structure Laminate SiP IC (Active device) and passives are mounted on PCB in side by side SESUB SiP IC (Active device) is embedded in substrate, passives are mounted on top Active Passive Passive Passive Passive Substrate IC die X-Section at plane A Plane A Molding ~550um Passive Passive 670um (typ) Mold 940um (typ) SESUB SiP Embedded IC die Lay 4 Lay 3 Lay 2 Lay 1 IC die ~80um 270um (typ) SESUB ECBC PAF SESUB BU 8

9 Key Features of SESUB Technology 1.Miniaturizing -> Help to put additional function in limited area 2. Reliable connection -> Help to improve long term reliability 8.5x8.5mm 5.6x4.6mm IC Solder WB Cu plating -65% Shrink Size or Capable to integrate more functionality WL-CSP IC QFN/QFP IC SESUB Example of Miniaturization 3. Better heat dissipation -> Help to dissipate IC heat to M/B Laminate SiP CROSS LINE SESUB SiP CROSS LINE Better Connection compared with Soldering or Wire Bonding 4. Low loss & noise emission -> Help to lower loss & noise emission (Especially digital circuit) Laminate SiP Noise emission SESUB SiP Less noise emission Tc : -6degC Signal Coupling Thermal simulation result ECBC PAF SESUB BU 9

10 1. Miniaturizing SESUB is the best solution to minimize SiP size Smart phone trend: Additional Functions in same space Or make space for Battery. To save space is requirement. -> Requirement for SiP is as small as possible ECBC PAF SESUB BU 10

11 2. Reliable Connection Current solution (Solder, WB) Potential REL Failure under Stress because of IMC. IMC (Intermetallic Compound) : Composed of multiple constituents from metal and the others metal at elevated temperature. IMC growth thicker (become Fragile) Chance to crack Cause joint open failure Thermal Thermal Stress Sn Sn (reflow) Sn IMC IMC(growth thicker) Cu Solder Ball Wire Bond + REL Failure Cu TCT Cu Solder ball TCT: Temperature Cycle Test ( degc) Solder Joint IMC Sn IMC IM C Cu Au Ball Bond Joint IMC Au Au-Al IMC Al IMC IMC Crack Requested addition process (e.g. Underfill) to prevent stress to the connection Sn Crack Au Al Cu IMC Crack ECBC PAF SESUB BU 11

12 2. Reliable Connection SESUB Solution for long term Reliability Thermal Stress No chance IMC SESUB Via connection Cu Cu + Cu Cu TCT TCT: Temperature Cycle Test ( degc) Copper to Copper joint -> No IMC created (Same metal) Die Cu RDL on Chip Via (Cu plating by SESUB) Lower chance to make crack with Cu/Cu connection after Stress or Manufacturing conditions ECBC PAF SESUB BU 12

13 3. Better Heat Dissipation SESUB can help to Dissipate Heat IC Die (Top View) SESUB (Side View) Heat Spot Embedded IC die Heat Spot Cu Via Many Cu Via can be put underneath Heat Spot intentionally -> SESUB can dissipate most heat to M/B (70% by thermal simulation result) Heat Releasing Image 30% Embedded IC die Heat Spot M/B (Mother Board) Heat 70% Heat Heat from SESUB will be released by M/B Efficiently ECBC PAF SESUB BU 13

14 3. Better Heat Dissipation Example in real application QFN Package SESUB Confirmation of lower thermal resistance by measurement and simulation Thermal simulation Thermal simulation QFN Package 20 /w SESUB 5 /w t=0.9mm t=0.22mm Embedded IC die 1/4 Thickness of QFN Package Down ECBC PAF SESUB BU 14

15 4. Low loss & noise emission Redundant Parasitic for Better Performance SESUB help to good performance for Digital signals by shortest traces Laminate SiP Minimum Signal Coupling Redundant Noise Emission SESUB SiP TOP VIEW Passives TOP VIEW IC Voltage drop IC SIDE VIEW Noise emission SIDE VIEW Less noise emission Signal Coupling Large Noise Small Noise ECBC PAF SESUB BU 15

16 Contents SESUB Introduction SESUB Process SESUB Quality SESUB Potential Application Summary ECBC PAF SESUB BU 16

17 Image of IC Embedding Process EOS (Embedding Organic Sheet) is soft and flowable, before cure. It flows during laminate keeping its volume with no stress concentration. EOS2 EOS1 ECBC PAF SESUB BU 17

18 Image of IC Embedding Process Completed SESUB Symmetric structure makes SESUB flat ECBC PAF SESUB BU 18

19 SESUB Warpage Performance (Sheet level) SESUB Warpage Over temperature Range warpage(mm) TDK internal spec. <3mm x150mm SESUB Sheet Temp (degc) in Reflow condtion Shadow Moire Module Piece Substrate Warpage is under ECBC PAF SESUB BU 19

20 SESUB Warpage Performance (SiP Level) Warpage in Reflow Condition Co-planarity Specification 50μm Module Size: 5.8x3.0mm Molding : Molding & Shield Module Thickness: 1.0mm Die size : 2.6x2.0mm Pad Surface : LGA (ENEPIG) 15μm Warpage(um) Warpage vs Teperature Warpage in Reflow Condition 30degC 220degC 260degC 220degC 30degC Temperature ( ) SESUB Module:11x11mm FCBGA:9x9mm(reference) 45μm Co-planarity Specification 60μm Module Size : 11.0x11.0mm Shielding : Metal Can Shield Module (Sub) thickness : 1.1mm (0.33mm) Die size : 5.9x5.4mm, 3.2x2.3mm (80μmt) Pad Surface : Bumped LGA FCBGA : 9.0x9.0mm (reference) Package (Sub) thickness : 0.5mm (0.18mm) Die size : 5.4x4.6mm (210μmt) Pad surface: BGA Module Warpage is Similar Level to Other Package with Same Size ECBC PAF SESUB BU 20

21 SESUB Robustness against Warpage What would happen, when bending SESUB? 150 x 150mm SESUB before B/E. 2x3mm Low-K bare die embedded. ECBC PAF SESUB BU 21

22 Bending Experiment (1) Result : No failure detected at R=15 to 2cm. Leakage I[uA] VBAT Initial R[cm] N=10 4 R = 1 cm. Radius(R) was changed from 15 to 1cm. But SESUB broke at R = 1 cm. R=3cm ECBC PAF SESUB BU 22

23 Bending Experiment (2) Result : No failure detected after R=5cm,3x Bend,5x Reflow. Leakage I[uA] VBAT Initial After Bend After Reflow N=104 Sample A I[uA] VBAT Initial After Bend After Reflow N=104 Sample B Experiment Flow Sample A:Etest 1x bend (both directions) Etest 5x reflow Etest Sample B:Etest 3x bend (both directions) Etest 5x reflow Etest Bending cirteria = 5 cm radius ECBC PAF SESUB BU 23

24 Thin Si a) The thinner the chip, the more flexible it is. b) The crack happen by mechanical stress concentration. After safely embedded in SESUB, resin work as stress relief and become much stronger than die itself. ECBC PAF SESUB BU 24

25 Contents SESUB Introduction SESUB Process SESUB Quality SESUB Potential Application Summary ECBC PAF SESUB BU 25

26 TDK SESUB product has proven in the HVM Customer Assy & Test SiP SESUB Smart Phone (mid-17 to mid-18) Input > 50 Mil pcs Input > 50 Mil pcs > 50 Mil pcs Defect rate < 100 dppm Yield > 99% > 99% Competitor SiP Product Standard defect rate level : ~ 500 dppm Why Customer products can have high yield SESUB Substrate High & Stable Yield TDK can support customer s success by extensive design experiences ECBC PAF SESUB BU 26

27 SESUB Sheet Level Reliability Testing Results Item Standard Condition Criteria Result High Temp. Storage JESD22-A degC * 1000hr R increase <10% PASS High Current Test 400mA * 1000hr R increase <10% PASS Heat Shock [Liquid] IEC ~ +150degC * 3000cyc R increase <10% PASS High Temp. Humidity Bias JESD22-A degC 85%, 35V * 3000hr IR>5.0*1e8[ohm] PASS Reflow J-STD-020 MSL3 (60degC/60%RH * 40hr) 5 times reflow R increase <10% PASS ECBC PAF SESUB BU 27

28 SESUB Module Board Level Reliability Testing Results test item abbreviation standard condition Module1 Module2 Module3 Temperature Cycling TC JESD22-A104-55degC to +125degC * 850cyc PASS PASS PASS Drop test - JESD22-B g, 0.5msec * 30drops PASS PASS PASS Mechanical Shock MS MIL-STD kg, 0.25msec PASS N/A N/A Cyclic Bending - JESD22-B u strain * 25k bend PASS N/A N/A Vibration VFV JESD22-B103 5g, 1mmp-p, 5-500Hz PASS N/A N/A (30pads) ECBC PAF SESUB BU 28

29 Contents SESUB Introduction SESUB Process SESUB Quality SESUB Potential Application Summary ECBC PAF SESUB BU 29

30 SESUB SiP Products (All are OEM Products) Application μdcdc Buck Convertor Boost Up Converter Power Management Unit μdcdc Buck Convertor Power Supply Package Size 2.3x2.9mm (7.0mm 2 ) 2.3x2.4mm (121mm 2 ) 11.0x11.0mm (121mm 2 ) 2.5x2.0mm (7.3mm 2 ) MP Ramp 2011 / Q / Q / Q / Q2 Application Wearable Battery Charger Quick Battery Charger Envelope Tracker Wireless Power Receiver Advanced Function (Power) Package Size 2.8x2.6mm (7.3mm 2 ) 5.0x5.0mm (25mm 2 ) 5.8x3.0mm (17.7mm 2 ) 5.0x4.0mm (20mm 2 ) MP Ramp 2014/ Q4 2016/ Q / Q / Q1 ECBC PAF SESUB BU 30

31 SESUB Technology Lineup & Roadmap Layers Stack 4 Layers 2 Layers 4 Layers 6 Layers Multi chip 2 chip horizontally Multi chip horizontally Package Open Top Over Molding Shielded Over Molding Metal Can Shield Case SESUB with Thin film Capacitor Thickness 4 Layers 300um 2 Layers 250um ~220um 4 Layers 200um 2 Layers Line/Space 34/46um 15/20um Occupation ratio 15% ~ 60% 10% ~ 70% Now in MP Status in future ECBC PAF SESUB BU 31

32 Introduction of Thin Film Capacitor TFCP-S (Sheet type) TFCP-D (Discrete type) Cu Dielectric(BT) Ni foil Two terminal capacitor Multi terminal capacitor (Top side terminal) (Double side terminal) Much thinner Capacitor ECBC PAF SESUB BU 32

33 Contents SESUB Introduction SESUB Process SESUB Quality SESUB Potential Application Summary ECBC PAF SESUB BU 33

34 Summary SESUB key features I. Miniaturization II. Long term Reliability III. Better Heat Dissipation IV. Low loss & noise emission SESUB is already proven technology in HVM TDK has extensive layout design experience & Know-How TDK wish to co-work with customer for their product success ECBC PAF SESUB BU 34

35 Visit TDK Product Center on our web site for more detail.