TO-220-3L Inner Circuit Product Summary C) RDS(on) Parameter Symbol Test Conditions Value Unit

Transcription

1 H1M65B1 Silicon Carbide Power MOSFET N-CHANNEL ENHANCEMENT MODE TO-22-3L Inner Circuit Product Summary VDS C) RDS(on) 65V 25A 1mΩ Features Low On-Resistance Low Capacitance Avalanche Ruggedness Halogen Free, RoHS Compliant Applications SMPS / UPS / PFC EV Charging station & Motor Drives Benefits Higher System Efficiency Parallel Device Convenience High Temperature Application High Frequency Operation Power Inverters & DC/DC Converters Solar/ Wind Renewable Energy Maximum Ratings (Tc=25 C) Parameter Symbol Test Conditions Value Unit Drain Source Voltage V DS, max =V, I DS=1µA 65 V Continuous Drain Current I D =2V, T C=25 C 25 =2V, T C=11 C 14.5 A Pulse Drain Current I D, pulse t PW limitation per Fig Avalanche energy, Single Pulse E AS V DD=1V, I D=9A 1 mj Power Dissipation P D T C=25 C 1 W Gate Source Voltage (static), op Static -5/+2 Gate Source Voltage (dynamic), max AC (f > 1Hz) -1/+25 V Junction & Storage Temperature, T stg -55/+ Soldering Temperature T L 26 C Revision Preliminary.1 H1M65B1 Dec

2 Electrical Characteristics (Tj=25 C) Parameter Symbol Test Conditions Min. Typ. Max. Unit Drain-Source Breakdown Voltage V (BR)DSS =V, I DS=1µA 65 V Gate Threshold Voltage (th) V DS=1V, I DS=5mA V V DS=65V, =V <1 5 Zero Gate Voltage Drain Current I DSS V DS=65V, =V µa 2 2 = C Gate-Source Leakage Current I GSS =2V, V DS=V 25 na =2V, I DS=12A 1 13 Drain-Source On-State Resistance R DS(on) =2V, I DS=12A, mω 125 = C Input Capacitance C iss 125 =V, V DS=4V Output Capacitance C oss 125 f =1MHz, V AC=25mV Reverse Transfer Capacitance C rss 24 Effective Output Capacitance, Energy Related Effective Output Capacitance, Time Related C o(er) C o(tr) =V, V DS= to 4V I D=const., =V, V DS= to 4V Turn On Delay Time t d(on) V DS=4V, pf Rise Time t r =-4/+2V, 17 ns Turn Off Delay Time t d(off) I D=1A, R L=4Ω, Fall Time t f R G(ext)= 8.2 Ω C oss Stored Energy E oss =V, V DS=4V 13 f =1MHz, V AC=25mV Turn-on Switching Energy E on V DS=4V, 1* µj Turn-off Switching Energy E off =/2V, I D=12A, R G(ext)= 2.7 Ω 14* Internal Gate Resistance R G(int.) f =1MHz, V AC=25mV 2 Ω *Base on the results of calculation, note that the energy loss caused by the reverse recovery of FWD is not included in E on. Built-in SiC Diode Characteristics (Tj=25 C) Parameter Symbol Test Conditions Typ. Unit Inverse Diode Forward Voltage V SD =-5V, I SD=3A 4.4 V Continuous Diode Forward Current I S =-5V, T C=25 C 17 A Reverse Recovery Time t rr =V, 54 ns Reverse Recovery Charge Q rr I SD=12A, V DS=4V, 72 nc Peak Reverse Recovery Current I rrm di/dt=3a/µs 2.57 A Revision Preliminary.1 H1M65B1 Dec

3 Gate Charge Characteristics (Tj=25 C) Parameter Symbol Test Conditions Value Unit Gate to Source Charge Q GS 13.5 V DS=4V, Gate to Drain Charge Q GD 34 nc =-5/+2V, Total Gate Charge Q G 66 I D=12A Gate plateau voltage V pl 8.1 V Thermal Resistance Parameter Symbol Value Unit Thermal Resistance, Junction to Case R θ,jc 1.25 K/W Typical Device Performance 4 =18 =2 =16 4 = =14 =12 = =18 =16 =14 =12 = = o C Fig. 1 Forward Output Characteristics at Tj = 25 C Fig. 2 Forward Output Characteristics at Tj = C On-Resistance, R on (mω) = o C =2V = 25 o C = o C V DS =2V Gate-Source Voltage, Fig. 3 On-Resistance vs. Drain Current for Fig. 4 Transfer Characteristics for Various Tj Various Tj Revision Preliminary.1 H1M65B1 Dec

4 Typical Device Performance 5 = o C 3 On-Resistance, R on (mω) On-Resistance, R on (mω) =12V =14V =2V =16V =18V I DS =12A Gate-Source Voltage, I D =12A Junction Temperature, Fig. 5 On-Resistance vs. Gate Voltage for Various Tj Fig. 6 On-Resistance vs. Temperature for Various Gate Voltage 2. On-Resistance, R on (P.U.) =2V I DS =12A =-5 = =5 =1 = = Junction Temperature, Fig. 7 Normalized On-Resistance vs. Temperature Fig. 8 Reverse Output Characteristics at Tj = 25 C -4 = o C =-5 = =5 1 V AC =25mV f =1MHz =1 = =2 Capacitance (pf) 1 1 Ciss Coss Crss Drain to Source Voltage Fig. 9 Reverse Output Characteristics at Tj = C Fig. 1 Capacitances vs. Drain to Source Voltage ( - 1V) Revision Preliminary.1 H1M65B1 Dec

5 Typical Device Performance 1 3. Capacitance (pf) 1 1 Ciss Coss Crss V AC =25mV f =1MHz Gate Threshold Voltage, V th V DS =1V I DS =5mA Drain to Source Voltage Junction Temperature, Fig. 11 Capacitances vs. Drain to Source Voltage ( - 4V) Fig. 12 Threshold Voltage vs. Temperature 1 C oss Stored Energy, E oss (µj) V AC =25mV Maximum Power Dissipation, P D (W) f =1MHz Case Temperature, T C Fig. 13 Output Capacitor Stored Energy Fig. 14 Maximum Power Dissipation Derating vs. Case Temperature 8 1 Peak Forward Current, I Fpeak =2V D=1% D=2% D=3% D=5% D=7% DC Thermal Impedence, Z thj-c ( o C/W) D=8% D=5% D=3% D=1% D=5% D=2% D=1% Single Pulse Case Temperature, T C 1E-3 1E-6 1E-5 1E-4 1E Pulse time, t (sec) Fig. Drain Current Derating vs. Case Temperature Fig. 16 Transient Junction to Case Thermal Impedance Revision Preliminary.1 H1M65B1 Dec

6 Typical Device Performance 1 2 1µs Limited by R DS(on) T c Single Pulse 1ms 1ms 1µs Gate-Source Voltage, 1 5 I DS =12A V DS =4V Parameter: t PW Gate Charge, Q G (nc) Fig. 17 Safe Operating Area Fig. 18 Gate Charge Characteristics 4 3 Switching Energy (µj) V DD =4V R G(ext.) =2.7Ω =/2V E total E off E on Switching Energy (µj) V DD =3V R G(ext.) =2.7Ω =/2V E total E off E on Fig. 19 Clamped Inductive Switching Energy vs. Drain Current (VDD=4V)* Fig. 2 Clamped Inductive Switching Energy vs. Drain Current (VDD=3V)* 12 V DD =4V I D =12Α =/2V Switching Energy (µj) E total E off E on Fig. 21 Clamped Inductive Switching Energy vs. External Gate Resistor (RG(ext.))* *Base on the results of calculation, note that the energy loss caused by the reverse recovery of FWD is not included in E on. Revision Preliminary.1 H1M65B1 Dec

7 Recommended Solder Pad Layout (TO-22-3L) Mechanical Parameters Parameter Symbol Typical Unit A 3.48 B 2.54 Length mm C 2.54 D 1.27 Revision Preliminary.1 H1M65B1 Dec

8 Mechanical Parameters *The information provided herein is subject to change without notice. Revision Preliminary.1 H1M65B1 Dec