Implementation of Hopfield Neural Network Using Double Gate MOSFET. A thesis presented to. the faculty of

Transcription

1 Implementaton of Hopfeld Neural Network Usng Double Gate MOSFET A thess presented to the faculty of the Russ College of Engneerng and Technology of Oho Unversty In partal fulfllment of the requrements for the degree Master of Scence Amt Parasmal Borundya March 2008

2 2 Ths thess ttled Implementaton of Hopfeld Neural Network Usng Double Gate MOSFET by AMIT PARASMAL BORUNDIYA has been approved for the School of Electrcal Engneerng and Computer Scence and the Russ College of Engneerng and Technology by Janusz A. Starzyk Professor of Electrcal Engneerng and Computer Scence Denns Irwn Dean, Russ College of Engneerng and Technology

3 3 Abstract BORUNDIYA, AMIT PARASMAL,M.S., March 2008, Electrcal Engneerng Implementaton of Hopfeld Neural Netwrok Usng Double Gate MOSFET (95 pp.) Drector of Thess: Janusz A. Starzyk Hopfeld Neural Network has been used to solve the constrants satsfacton problems. To make these networks solve problem n real tme, ndependent of the sze, would requre buldng a massvely parallel structure. A CMOS crcut can be used to construct such network to fnd the soluton. Current CMOS technology s reachng ts physcal lmtaton n deep submcron regme and new devces are explored whch can provde scalablty n accordance to Moore s Law. To further ncrease the network capacty double gate transstors can be used. Double gate MOSFET model of the hysteress neuron proposed n ths thess utlzes 8 transstors as compared to 60 transstors needed wth an operatonal amplfer s model. Ths structure not only reduces the count of transstors by 86% but also demonstrates that larger crcuts of double gate MOSFETs can be bult, bolsterng the fath n double gate MOSFET devces as a possble substtute of CMOS devces n a near future. Approved: Janusz A. Starzyk Professor of Electrcal Engneerng and Computer Scence

4 4 Dedcaton Dedcated to Mr. and Mrs. Starzyk

5 5 Acknowledgments A good teacher Explans, a Superor teacher Demonstrates whle a Great teacher Inspres unknown. Dr. Starzyk truly eptomzes these words. He s one of the most nfluental people n my lfe. I have ganed mmense knowledge and experence from hm, whch s nvaluable. Wthout hs expertse n the feld of Neural Network and analog crcut desgn, ths thess wouldn t have been possble. I sncerely thank hm for demonstratng confdence n me and provdng an opportunty to work under hs able gudance. I am also thankful to Dr. Savas Kaya, for allowng me to use the Double Gate MOSFET model and other resources. Hs advce and gudance was of great help n shapng the thess. The varous dscussons wth hm helped me. I thank Dr. Jeffrey Dll and Dr. Xaopng Shen for beng on the commttee and revewng my thess. I am grateful to Mrs. Zofa Starzyk for all her support, encouragement and provdng me wth a helpng hand. Wthout her help and consderaton t wouldn t have been a smooth salng for me. I take ths opportunty to thank my beloved parents and all my famly members for belevng n my ablty and provdng constant encouragement and support. I also thank Ihtashr, for her patence and support whch she constantly provded durng my Masters program. I also thank my frends Lankesh, Santosh, Basawaraj and Ansh for ther help. Lastly I thank GOD, the Almghty for provdng me wth strength and for Hs chocest blessngs.

6 6 Table of Contents Page Abstract... 3 Dedcaton... 4 Acknowledgments... 5 Lst of Tables Lst of Fgures Introducton Background and Motvaton Research Goals Thess Organzaton Chaos Introducton Hstory Negatve Resstance Negatve Resstance Converter Chua s Crcut Chua s Crcut Usng Opamp Smulaton Results Hopfeld Neural Network Introducton... 26

7 Hstorcal Background Neural Network vs Conventonal Computer Bologcal Neuron Model Artfcal Neuron Model Neural Network Archtectures Hopfeld Neural Network Hysteress Neuron Model Hysteress Neural Network System Hysteress Actvaton Functon Equlbrum Ponts Smulatons of Hopfeld Neuron Model Smulaton usng Multsm Smulaton usng OrCAD Smulaton usng Spce N-queens Problem Introducton System Stablty for Hysteress Neural Network Problem Statement and Soluton Network Topology Double Gate MOSFET Implementaton of HNN Introducton Double Gate MOSFET Structure... 63

8 8 5.3 Double gate Spce Model UFDG Double Gate Structures Self Bas Amplfer Spce 3 Code Smulatons Results Double gate Structure for Schmtt Trgger Spce 3 Code Smulaton Results Double gate Neuron Model Spce 3 Code Smulaton Results Summary Hysteress Neuron Model usng OTA Concluson and Future Work Concluson Future Work References Appendx 1: Multsm Model Detals LM 741 Models Detals BZX83C10 Model Detals Appendx 2: OrCAD Model Detals Opamp Zener Dode 1N4744A Model... 89

9 9 Appendx 3: Spce3 Models Detals Spce3 Zener Model Spce3 opamp Model Runnng the Netlst fle Appendx 4: Matlab Code for N-Queen Problem Appendx 5: DG/SOI MOSFET Devce-Lne Parameters Appendx 6: DG MOSFET Model Lne and Structural Parameters Used n Smulaton NMOS Double Gate Model PMOS Double Gate Model Runnng UFDG Smulaton on Spce

10 10 Lst of Tables Page Table 1: Bran vs Computer Comparson Table 2: Number of Solutons for Dfferent Sze of Queen Problem... 58

11 11 Lst of Fgures Page Fgure 1: Opamp based negatve mpedance converter Fgure 2: I-V graph for negatve mpedance converter Fgure 3: Approxmate I-V characterstcs of opamp n all regons of operatons Fgure 4: Chua s crcut Fgure 5: Opamp based mplementaton of Chua s crcut Fgure 6: Smulaton result for Chua s crcut Fgure 7: Smulaton result for Chua s crcut Fgure 8: Anatomy of bologcal neuron [Lode07] Fgure 9: Mathematcal neuron model Fgure 10: Threshold logc functon Fgure 11: Pecewse lnear functon Fgure 12: Log sgmod functon Fgure 13: Multlayer feed forward archtecture Fgure 14: Recurrent neural network archtecture Fgure 15: State of Hopfeld neural network Fgure 16: Hopfeld neural network archtecture Fgure 17: General hysteress neuron Fgure 18: Hysteress neural network system Fgure 19: Hysteress functon Fgure 20: Multsm schematc of hysteress neuron

12 12 Fgure 21: Double crcular chaos phenomenon usng HNN Fgure 22: Double well defned crcular chaos usng HNN Fgure 23: Doubly attractors usng HNN Fgure 24: Hysteress characterstcs usng HNN Fgure 25: Hysteress neuron crcut wth OrCAD Fgure 26: OrCAD smulaton for chaos Fgure 27: Crcular chaos usng OrCAD Fgure 28: Hysteress characterstcs usng OrCAD Fgure 29: Chaotc attractor from hysteress neuron usng Spce Fgure 30: Double crcular chaotc attractors usng Spce Fgure 31: Hysteress characterstcs usng Spce Fgure 32: One of the solutons for 8 queen problem Fgure 33: Matlab smulaton results for 8x8 queen problem Fgure 34: Connecton topology for 8-queen network Fgure 35: Moore s law graph [Inte07] Fgure 36: Non classcal CMOS devces [Hutc02] Fgure 37: Double gate MOSFET structure Fgure 38: General double gate operaton modes Fgure 39: Self bas confguraton of double gate MOSFET Fgure 40: Double gate MOSFET self-bas amplfer confguraton Fgure 41: Schmtt trgger usng double gate MOSFET Fgure 42: Schmtt trgger wth conjugate bas ±0.5V... 69

13 13 Fgure 43: Schmtt trgger wth conjugate bas ±0.3V Fgure 44: Double gate neuron model Fgure 45: Double gate MOSFET hysteress neuron smulaton one Fgure 46: Double gate MOSFET neuron model smulaton two Fgure 47: RC OTA desgn for hysteress chaos generator Fgure 48: OTA bases hysteress neuron Fgure 49: Chaos usng RC OTA Fgure 50: Hysteress usng RC OTA

14 14 1. Introducton 1.1 Background and Motvaton Constrant satsfacton problems have been the subject of research for many years. Efforts have been made to solve them by wrtng effcent algorthms [Sos90] and codng effcent computer programs [Fnk87]. All these approaches were hampered by the sequental nature of the computer smulaton. J.J. Hopfeld proposed the Neural Network approach to fnd the soluton for these NP hard (Nondetermnstc Polynomal-tme hard) problems [Hopf85]. In recent tmes the chaotc phenomenon was explored helpng to solve these problems [Toku97]. Chaotc phenomenon helps to search for the global optmal soluton. An example applcaton s used n ths thess to llustrate ths approach. In the approach that combnes chaotc search wth neural network soluton, hysteress neural network s used to solve the N-queens problem [Naka99]. The soluton can be effcently mplemented based on hysteress neurons whose analog mplementaton uses just a few components. The slcon chps are approachng VLSI scalng lmt [ITRS07] and dfferent desgn approaches and mproved slcon devces are studed to extend the Moore s laws [More69] n comng years. Double gate MOSFET has been studed for varous dgtal and analog applcatons [Vara05] but ths thess s the frst attempt to use t n the feld of neural networks. It shows how to effcently mplement hysteress neural network that can solve N-queens problem. To summarze, f we leverage the capabltes of double-gate MOSFET to buld the hysteress neuron wth sgnfcantly less transstors, larger network can be desgned n the

15 15 same slcon area. These networks have regular structures of dentcal buldng blocks; hence the sze of the buldng block s crucal for the overall sze of the network. These networks can be made to solve varous constrant satsfacton problems n real tme ndependent of the problem sze. The objectve of ths thess work s to show how double-gate MOSFET can be used to buld a hysteress neuron and usng ths neuron buld a Hopfeld neural network to solve a selected applcaton problem. Meetng these objectves bolsters the fath that double-gate MOSFET can be utlzed to buld larger ntegrated crcuts helpng to mprove desgn effcency, reduce the desgn area and nternal delays. Other objectve of ths thess s to analyze the chaotc phenomenon and study organzaton of the hysteress neural networks to propose a crcut topology that effcently solves the 8-queen problem. 1.2 Research Goals Specfc research goals of ths thess are Broadly study the chaos phenomenon and ts occurrence n electrcal crcuts, Analyze the hysteress neuron and ts stablty, Analyze the hysteress neural network for solvng the N-queen problem, Propose the crcut topology for solvng 8-queen problem, Implement the hysteress neuron usng double gate MOSFET. 1.3 Thess Organzaton The thess s organzed n sx chapters.

16 16 Chapter 2, broadly studes the chaos phenomenon n nature and n the electrcal crcuts. The non-lnearty of the electrcal crcut characterstcs s dscussed to get better understandng of the chaos phenomenon n electrc crcuts. One of such nonlnear crcuts that demonstrate varous chaotc phenomenons s Chua s crcut [Mats84]. In Chapter 2, Chua s crcut s mplemented and smulated usng Multsm software. Chapter 3 dscusses general prncples of Hopfeld neural networks. The chapter ntroduces the concept of the neural network and compares t wth the conventonal computer. Bologcal and artfcal neuron models are explaned to get better understandng of how the network works. Feed forward and recursve network archtectures are explaned. The Hopfeld hysteress neuron model s analyzed wth respect to the hysteress actvaton functon and ts equlbrum ponts. Ths neuron model s mplemented usng operatonal amplfer and s smulated usng Multsm, OrCAD and Spce3 smulators. Chapter 4 states the N-queen problem and dscusses the stablty crteron of the hysteress neural network as a cost functon to fnd the soluton. The network topology for solvng 8 queens problem s also proposed n ths chapter. Ths approach can be easly extended to a general N-queens problem. Chapter 5 dscusses the double-gate MOSFET structure and ts UFDG model [UFDG06]. Self bas amplfer and Schmtt trgger crcuts are mplemented and smulated usng Spce3. Usng these blocks, a double-gate MOSFET hysteress neuron s bult and smulated. Chapter 6 provdes the concluson for the thess work and dscusses future work.

17 17 2. Chaos 2.1 Introducton Chaos theory descrbes the behavor of certan non lnear dynamcal systems whch under specfc condtons exhbt dynamcs that are very senstve to ntal condtons [Wk07]. Most of the systems are determnstc, meanng that f provded wth the same ntal condtons to the system, the system could predct the fnal result. It s certan that, the result obtaned for any number of teratons, usng the same ntal condtons, wll be the same [Utex07]. But, n the case of non lnear dynamc systems a small error n the ntal condton can produce a dfferent result. Ths s because the non lnear systems are very senstve n nature and as a consequence the results observed seems to be random [Wk07], [Utex07]. 2.2 Hstory The noton of determnsm was challenged wth the dscovery of the chaos phenomenon. The varous laws of physcs have gven a good connecton between cause and effect around us. These laws helped to get almost accurate predctons of any physcal system f the ntal condtons are known. Newton s laws of moton best demonstrate the phlosophy of determnsm. Usng these laws we can predct the tme the planets take to orbt around sun, projectles, tme for tdes [Utex07]. To make a correct predcton based on these laws, t s requred to provde precse ntal condtons to an nfnte precson. However, provdng the nfnte precson s almost mpossble for any known system.

18 18 Thus, f accurate predctons cannot be made usng almost the same ntal condtons the system can be chaotc. Edward Lorenz, a professor at Massachusetts Insttute of Technology n early 1960 was the frst to study the chaos phenomenon. He wrote a smplfed weather model program whch can be smulated on a dgtal computer. Precsely, he studed the nature of the ar flow current when the ar s heated by the Sun rays [Utex07]. Hs mathematcal model contaned varous equatons that modeled ths ar current. Even though he had a prmtve computer to work wth, few weather predctons were made. Whle carryng out these experments he accdentally dscovered the phenomenon of chaos [Utex07], [Thn07]. Lorenz code was runnng on a computer, whch s a completely determnstc system. Therefore, he expected to get same results when he provded the same set of ntal condtons. To hs surprse he dd not get the same results, and the patterns developed dffered a lot from the prevous teratons. Lorenz beleved that he had provded the same numbers n all the teratons for ntal condtons, but after careful study of these numbers he came to concluson that what he beleved as the same nput values dffered slghtly from each other [Utex07]. Ths s due to the precson of the computer. Whle hs prnt copy could show numbers up to three decmal places, nternally the computer had sx decmal places precson. He dd not notce ths dfference because the values dffered very slghtly and could be taken as the same set of values. Ths lad the foundaton for the study of chaotc systems [Thn07]. Thus, n the chaotc system even an magnably small error n two sets of ntal condtons can produce a large dscrepancy wth the prevously obtaned results.

19 19 Chaos s also manfested n some electrcal crcuts. Dr. Yoshsuke Ueda, Professor, Department of Electrcal Engneerng, Kyoto Unversty, ndependently dentfed the chaos phenomenon usng analog computer n 1961 [Ueda07]. He performed the analog smulaton of a non lnear oscllator. He stated the chaos demonstrated by the analog computer s truly a natural phenomenon [Ueda07]. Later n 1983, Dr. Leon O. Chua, Professor, Department of Electrcal Engneerng and Computer Scence, at Unversty of Berkeley, desgned a smple crcut that exhbt the chaos phenomenon [Mats84]. The crcut was buld wth few basc components and became a classcal example to demonstrate the chaotc phenomenon n the electrcal crcuts Negatve Resstance Negatve resstance, also known as negatve dfferental resstance s a property of the electrcal crcut elements composed of actve devces n whch, over a certan voltage ranges, current s a decreasng functon of voltage [Wk07]. Ths range s called negatve resstance regon Negatve Resstance Converter The operatonal amplfer (opamp) based schematc dagram for negatve resstance converter s as shown n Fgure 1, redrawn as descrbed by Chua, [Chua07] has both the postve feedback and the negatve feedback.

20 20 RnegF 523? 4 U Vout LM741AH/883 vn _ Rgnd 523? RposF 523? Fgure 1: Opamp based negatve mpedance converter. Equaton shows the relatonshp between current and voltage for a negatve mpendence converter and the results are plotted as shown n Fgure 2 gnd ( R ) posf v R R = [Chua07] (2.3-1) negf n Fgure 2: I-V graph for negatve mpedance converter.

21 21 The slope of the curve s negatve, and hence the crcut s called the negatve mpedance converter. The opamp s operatng n a lnear mode; therefore the curve s a straght lne. Opamp causes non-lnearty and occurs when opamp operates n the saturated regon. Fgure 3, shows the approxmate I-V characterstcs of the opamp n all regons of operaton as observed n the artcle by Chua [Chua07]. Fgure 3: Approxmate I-V characterstcs of opamp n all regons of operatons. 2.4 Chua s Crcut Fgure 4, shows the basc Chua s crcut. Ths crcut [Mats84], exhbt a chaos. The crcut conssts of A lnear resstor R Two capactors C1 and C2 One nductor L

22 22 One non-lnear resstor RN R L C1 C2 RN Fgure 4: Chua s crcut. Ths crcut can be easly bult usng all basc elements and non-lnear resstor, whch can be mplemented usng negatve resstance converter [Kenn92]. The current n the nonlnear resstance depends upon the appled voltage across ts termnal. Hence, t can be consdered as a voltage controlled devce. From the dscusson n Secton 2.3.1, opamp can be used to develop negatve mpedance converter (NIC) and the I-V characterstcs conssts of three pecewse lnear segments. Ths NIC s the basc block for buldng the non lnear resstance for Chua s crcut Chua s Crcut Usng Opamp The complete Op-amp based mplementaton of Chua s crcut s as shown n the Fgure 5

23 23 Fgure 5: Opamp based mplementaton of Chua s crcut. The above crcut was redrawn n Multsm software usng the schematc from Chua s webste [ChMs07]. The two NIC n parallel provdes wth the non-lnear resstance component n the Chua s crcut as shown n Fgure 5. In the above crcut the nductor, resstor and capactors together mplement a conventonal oscllator whch gves damped oscllatons f solated from other crcut elements [Cros07]. The opamp and other resstors together yeld the nonlnear negatve resstance. Ths crcut also provdes the energy for the dynamc crcuts.

24 Smulaton Results The crcut was mplemented and smulated usng Multsm software. The voltage across capactors C1 was plotted aganst the voltage across C2. The result was vewed usng the smulated Aglent osclloscope avalable n Multsm software and the chaos was seen usng X-Y dsplay on osclloscope wth probes placed across C1 and C2 as shown n Fgure 5, 6 and 7. Fgure 6: Smulaton result for Chua s crcut. From Fgure 6, t can be seen that double scroll attractors can be obtaned usng relatvely smple crcut proposed by Chua.

25 25 Fgure 7: Smulaton result for Chua s crcut. Fgure 7, demonstrates vertcal double scroll attractors usng dfferent value resstors, capactors. Dependng on the values of crcut parameters used, Chua s crcut demonstrates varous chaos phenomenons. One of the mportant lmtatons of the Chua s crcut mplemented n Fgure 5 s that t conssts of an nductor whch s not easly fabrcated n VLSI. Ths motvated for buldng crcuts whch can exhbt chaos phenomenon usng the components that can be easly fabrcated n VLSI. One of the crcuts s dscussed n the Chapter 3 usng opamp.

26 26 3. Hopfeld Neural Network 3.1 Introducton Accordng to Haykn [Smo98], neural network s a massvely parallel dstrbuted processor that has a natural propensty for storng expermental knowledge and makng t avalable for use. Neural network s smlar to the bran n The way network acqures the knowledge through a learnng process. The way network used synaptc weghts to store the knowledge. Thus, the human bran s source of nspraton for all neural networks study. The bran s a hghly complex, non-lnear, dynamc and parallel processng unt wth complex assocatons between nputs, outputs and nternal states. A neural network tres to smulate some of the propertes of the bran for solvng the real world problems, such as speech recognton, mage analyss, and some NP hard problems whch are dffcult to solve usng the conventonal computers. Ths s achevable because the neural network structure s hghly parallel (thus mprovng the speed of operatons) and has a property to learn and generalze the nput [Smo98]. Followng are few mportant propertes of artfcal neural network (ANN) descrbed by Haykn [Smo98], ANN can be lnear as well as non-lnear. Many phenomena n the nature are nonlnear and are mportant. The ANN learns by constructng the nput-output mappng. The ANN has the ablty to adapt ts weght to the changng ambence. Each neuron n the network s affected by the actvty of the other neurons.

27 27 ANN has ablty to self-organze and represents the nformaton t receves durng the learnng phase. The parallel nature of ANN makes t sutable for mplementaton n VLSI and s nherently fault tolerant. Most of the dscusson n ths chapter s based on a Smon Haykn s [Smo98] book on neural networks and dscusson presented by Wenle Zhang n hs course on Neural Network. Some of the fgures were redrawn usng Mcrosoft Vso for the better understandng of the archtecture Hstorcal Background McCulloch and Ptts are poneers n the feld of neural networks (NN); they ntroduced the frst mathematcal model of bologcal neurons [Ptt43]. Ths neuron model was consdered as a compettor for Von Neumann model for basc computng machne as t was capable of performng all Boolean operatons. Further development of the NN concepts and applcatons occurred wth the nventon of Rosenblatt s Perceptron [Rose58]. The Perceptron was a sngle layer and sngle neuron wth ablty to perform bnary classfcaton for lnearly separable patterns. Perceptron model was not able to mplement XOR functon snce t dd not have the ablty to classfy the non-lnearly separable patterns. In the last few decades there has been a greater nterest n ths feld attrbuted to dscoveres of back-propagaton learnng model, Hopfeld neural network, recurrent neural networks, and assocatve memores. Some mpressve applcatons such as mage recognton, speech recognton, and assocatve memory were developed based on varous neural network models.

28 Neural Network vs Conventonal Computer A neural network (NN) does not use the conventonal algorthmc approach lke a computer does. The computer can solve problems that have a predefned methodology, thus lmtng the problem solvng ablty. But the NN learns lke the bran from the assocatons between data and hence do not have to be programmed for a specfc task. Choosng the problem becomes mportant and snce no predefned steps are present, the operaton can be unpredctable as compared to computers whose behavor s completely predctable. On average the neuron n the bran works at a speed of 100 Hz as compared to several mllons of nstructons per second performed by a computer [Smo98]. Despte ths slow speed compared to a computer, the bran s network can perform some tasks lke recognton, plannng, and acton control at a remarkable ease as opposed to the computer. Most of the computers cannot be useful f a sngle component s damaged but the bran network s able to work apprecably well even f there s a sgnfcant damage to the parts of the bran. Table 1: Bran vs Computer Comparson Processng Elements Sze Speed Archtecture Fault Tolerant Learnng Ablty Energy Per operaton Bran neurons 10-6 m 100 Hz parallel, dstrbuted Yes Yes Joules/Sec Computer 10 8 transstors 10-7 m 10 9 Hz seral, centralzed No Lttle 10-6 Joules/Sec

29 29 Above, Table 1 summares comparson between the bran and the modern computer based on the readngs n the book by Smon Haykn [Smo98] and from Wkpeda webste [Wk07]. Computers can be better suted for algorthmc problems whle the neural networks can be better for nonalgorthmc problems lke classfcaton and recognton. 3.2 Bologcal Neuron Model Neurons are the basc functonal elements of the neural network n the bran. It s a massvely parallel nformaton processng network wth about neurons. Each neuron s connected to many (10,000 or more) synapses. Fgure 8: Anatomy of bologcal neuron [Lode07].

30 30 The neuron has many dendrtes, an axon and a body. Neurons transmt the sgnals n the form of the electrcal mpulses. Dendrtes act as an nput source to the neuron, as they carry the sgnal from the other neurons to the cell body of the neuron. The axon conducts the sgnals away from the cell body. The neurons can ether be n a frng or n a restng state. The neuron fres when the total ncomng stmulus receved s greater than the threshold. The neurons are connected through synapses. A synapse s a tny gap between the axon of one neuron and a dendrte of other one. When there s an mpulse through the neuron cell t transmts a chemcal called neuron-transmtter nto the synapse. The neurotransmtters, dependng upon ther strength, nduce or nhbt the mpulses n the connectng neuron [Smo98], [Wk07], [Lode07]. 3.3 Artfcal Neuron Model The mathematcal model of an artfcal neuron can be descrbed n the followng fgure Fgure 9: Mathematcal neuron model. The general artfcal neuron model has the followng fve components,

31 31 1. Inputs (X ): the nputs to the neuron come from the external envronment or through other neuron outputs. They can have a dscrete or a real value. 2. Weghts (W ): The weghts are the real-valued numbers. They determne the contrbuton of each neuron to the system. One of the frst thngs the model does s to calculate the weghted sum of nputs [Scho07]. W = w + (3.3-1) 1x1 + w2 x2 w3 x3 3. Threshold or Bas (u): Ths s the quantty whch s subtracted from the weghted sum to get the nput for the transfer functon [Scho07]. For smplcty most of the tme the bas s regarded as an addtonal nput wth values w 0 =u and x 0 =-1. W = w + (3.3-2) 0 x0 + w1 x1 + w2 x2 w3 x3 4. Transfer Functon: The transfer functon gves the relatonshp between the nput and the output of the neuron. There are varous functon used to descrbe the networks transfer functon, most of them are nonlnear wth a lmted output range. Threshold functon or Step functon: Ths transfer functon was used n the McCulloch-Ptts [Ptts43] neuron model called as threshold logc unt (TLU) [Wk07]. f ( x ) = 1, f x 0 = 0, f x < 0 (3.3-3)

32 32 Fgure 10: Threshold logc functon. Pecewse lnear functon: Ths transfer functon has the form [Wk07] f ( x) = 1, f x 1 2 = x, f 1 2 < x < 1 2 (3.3-4) = 0, f x 1 2 Fgure 11: Pecewse lnear functon.

33 33 Sgmodal functon: The most commonly used transfer functon n the neural networks s a sgmodal functon. For nstance, a sgmodal functon can be defned as [Wk07] f ( x) ax 1 = 1 + e (3.3-5) Where a, s the slope parameter. Fgure 12: Log sgmod functon. 5. Output (Y ): The neuron calculates the output [Scho07] accordng to the followng formula y = = f f n = 1 n = 0 w w x x u (3.3-6) For the example elaborated n the Fgure 9 the output can be wrtten as

34 ( wx + wx + w x w ) y + 34 = f x3 (3.3-7) The fnal output value depends upon the transfer functon and can be dscrete or contnuous. 3.4 Neural Network Archtectures In any neural network the neurons are grouped together nto layers. Data s fed through the nput layer, processed by one or several hdden layers and fnally the network provdes the output through the output layer. Feed Forward Network: In ths knd of the Networks there s no feedback n the system [Smo98]. The nput after processng through the hdden layers s drectly gven out as output. Fgure 13: Multlayer feed forward archtecture.

35 35 Recurrent neural network archtecture: Feedback occurs n almost every part of the human bran. Thus a recurrent neural network was ntroduced and can be defned as a network that has feedback to all the nputs [Smo98]. The feedback can be to all nput neurons ncludng the neuron s own nput. Fgure 14: Recurrent neural network archtecture. 3.5 Hopfeld Neural Network Hopfeld Neural Networks (HNN) was ntroduced by J.J. Hopfeld [Hopf82]. The ntroducton of HNN regnted the nterest n the feld of neural networks. The neural network research was makng a slow progress after t began wth great enthusasm, due to varous shortcomngs of the already exstng neural network models. HNN can serve as a

36 36 content-addressable memory (CAM). A CAM s able to retreve the complete memory based on suffcent partal nformaton provded to the network [Wk07]. HNN was also used to solve optmzaton problems lke travelng salesman problem [Hopf85]. The unt of HNN has a sngle layer of processng unts wth bnary threshold lmts. Ths means that the output of HNN unt s ether 0 or 1 dependng whether the nput s less or greater than the threshold value. a = 1, f wjs j u = 0, otherwse j (3.5-1.a) In some cases the output can also take values -1 or 1. Mathematcally t can be llustrated as [Wk07] a = 1, f wjs j u = 1, otherwse j (3.5-1.b) where, w j s weght of connecton unt and j, s j s the state of unt j and u s the threshold of the unt. These actvty values are called, states. At each moment the network has a specfc state, and a state can be represented by a vector of zeros and ones, such as [Smo98] In the followng fgure the state vectors s ( u u ) U 1, 2,... = (3.5-2) u n ( 1,0,0,1) U = (3.5-3)

37 37 Fgure 15: State of Hopfeld neural network. The state changes as the value of each unt changes wth tme. The HNN are recursve type of networks. The processng unts n the HNN are fully connected, that s every unt s connected to every other unt and output of each unt has a feedback nto nput of each unt. Ths recursve arrangement helps HNN to be n a stable state f no external nput s appled. The connectons n the HNN have the followng restrctons [Wk07]: w =, In ths case none of the unts n HNN has connecton to tself, and 0 (3.5-4) w = w, j (3.5-5) j j, In the above case all connectons are symmetrc. The Hopfeld Neural network archtecture [Smo98] s as shown below

38 38 U1 U2 Un T 21 T n1 T 12 T n2 T 1n T 2n Fgure 16: Hopfeld neural network archtecture. Each network state n HNN has the energy assocated wth t gven by [Wk07] E = 1 2 Wju ju (3.5-6) j ( j) Ths energy functon s not any physcal energy of the system but can be used as an objectve functon whch s mnmzed by the network whle updatng ts states. The successve updatng of the state n the network s a convergence process and as a result of ths, the energy of the system gets mnmzed [Smo98]. The energy s ether reduced or unchanged durng the updatng process. Even f the unts are chosen randomly to update ther states; the network wll converge to a local mnma or global mnma n the above gven energy functon. The convergence condtons can be lnked to a Lyapunov functon [Wk07]. Once the system reaches the local mnma t s not possble for the system to reach the global mnma unless the process of updatng wth dfferent ntal values s

39 39 started agan. If the weghts are symmetrc the energy functon wll decrease monotoncally and f non-symmetrc weghts are used n the network, the network may exhbt some perodc or chaotc behavors [Wk07]. Ths chaotc behavor was seen n a relatve small phase space and dd not hamper the performance of the network ablty [Hopf85]. The HNN s used to solve many combnatoral problems but, the solutons obtaned may or may not be the optmum based on the value of the energy functon. If the energy functon reaches the local mnmum, rather than the global mnmum of the system, the soluton cannot be consdered as an optmum. To enhance the search ablty of the network chaotc neural networks (CNN) have been proposed [Toku97]. Tokuda observed that CNN provdes an excellent search ablty to fnd the optmal soluton to the combnatoral problems. In the current work the hysteress neural network s studed. The hysteress phenomenon was used to solve N-queen problem by Nakaguch [Naka99]. Ths approach s analyzed and used n ths thess. 3.6 Hysteress Neuron Model In the hysteress neuron the actvaton functon s a hysteretc functon. Ths neuron s smlar to a conventonal neuron as t calculates the weghted sum of the nputs and weghts. It dffers from the conventonal Neuron model by havng a nonlnear hysteress actvaton functon. The followng fgure llustrates the basc neuron model.

40 40 Fgure 17: General hysteress neuron. The weghted sum of the nput functonalty can be mplemented usng the ntegrator and a summng amplfer usng the opamp. The hysteress actvaton functon can be mplemented usng the Schmtt trgger Hysteress Neural Network System Nakaguch, n hs work [Naka99] descrbed the mplementaton of hysteress neural network system, shown n Fgure 18.

41 41 Fgure 18: Hysteress neural network system. The complete analyss of the above crcut was carred out by Nakaguch [Naka99]; some of the mportant equatons are used n ths secton n order to understand the hysteress neural network. Followng s the smplfed equaton whch represents the above crcut, λ d dt x y = 0 ( ) = h x = 1 f f x j= 1 N = x wj y x 0 1 j + u [Naka99] (3.6-1) where, t R, s tme, x y w R, { 1,0} s the nternal state of the neuron. s the output of the neuron λ 0 s a tme constant j R, s the weght of the output between

42 42 h ( x ) s a hysteress functon Hysteress Actvaton Functon h ( x ) swtches from 0 to 1 f x reaches the rght threshold 1 and swtched from 1 to 0 f x reaches the left threshold 0. The regon between 0<x <1 s called hysteress regon [Naka99]. Ths s shown n Fgure.19. Fgure 19: Hysteress functon Equlbrum Ponts The equlbrum pont n ths network s be gven by Equaton p N = w jy j=1 j u [Naka99] (3.6-2) where, p s the equlbrum pont of the th neuron u s the nput value to the th neuron.

43 The equlbrum ponts are dependent on the output of the system and reman constant n the system as long as the outputs are unchanged. There are two types of equlbrum ponts dependng upon the output of the system. p s sad to be a real equlbrum pont f followng condton s satsfed. ( 2 1)( 2y 1) > 1 43 p [Naka99] (3.6-3) The cell (neuron) correspondng to ths pont s sad to be stable. p s sad to be a magnary equlbrum pont f followng condton s satsfed. ( 2 1)( 2y 1) 1 p [Naka99] (3.6-4) The cell (neuron) correspondng to ths pont s sad to be unstable. Hence, f p 0 the cell has to cross zero, the left threshold of the hysteress regon and the output of the cell changes from y = 1 to y = 0 p 0 For y = 1, y changes from 1 0 Smlarly f p 1the cell has to cross the rght threshold of the hysteress regon and the output of the cell changes from y = 0 to y = 1 p 1 For y = 0, y changes from 0 1 Thus the trajectory of the cell s always drected to the equlbrum pont. 3.7 Smulatons of Hopfeld Neuron Model The smulatons were done usng Multsm 8.0, OrCAD 10.3 and Spce3 software.

44 Smulaton usng Multsm 8.0 Fgure 20: Multsm schematc of hysteress neuron. Fgure 20 shows the schematc of hysteress neuron usng Multsm, the opamp used n the fgure s LM741 and a BZX83_C10 Zener dode s used. These models (Appendx 1 gves the detals for these models) are avalable n the Multsm lbrary. The above crcut s based on the neural network crcut dscussed n Secton [Naka99]. Multsm s very useful for ths research snce t contans the Smulated Aglent Osclloscope (SAO). The SAO helped to work n a smulated laboratory envronment wthout actually performng the experments n a laboratory. For certan values of the nputs, the hysteress neuron showed the chaotc phenomenon. As stated prevously the combnaton of neural network and chaotc phenomenon can be used to fnd the optmal soluton for the constrant satsfacton problem. The followng smulaton results that were obtaned for varous nputs confrms that hysteress neuron

45 45 shows chaotc phenomenon and can reach the hysteress regon wth proper ntal condtons.. A square waveform wth the frequency of 1000 Hz and duty cycle 50% was used n the smulaton. Only the ampltude of the square waveform was changed to observe dfferent chaos and hysteress characterstcs. Intally the ampltude of the square wave was 70 mv and the followng results was observed Fgure 21: Double crcular chaos phenomenon usng HNN. The smulaton was run agan wth the same confguraton but ncreasng the ampltude to 100 mv. The smulated output s as shown n the Fgure 22, gvng well defned double crcular chaos.

46 46 Fgure 22: Double well defned crcular chaos usng HNN. If the ampltude s further ncreased the same crcut shows double attractors as shown n the followng fgure. Fgure 23: Doubly attractors usng HNN. Increasng the ampltude to 700 mv, the hysteretc characterstcs can be obtaned wth the same crcut as shown n Fgure 24.

47 47 Fgure 24: Hysteress characterstcs usng HNN. From the above dscusson, the hysteress neural network can be consdered as a chaotc crcut whch can go to the stable state wth proper ntal condtons and hence a soluton can be obtaned Smulaton usng OrCAD 10.3 The next step for buldng the hysteress neural network crcut usng double gate MOSFET s to buld a Spce netlst for the crcut and to be able to generate the same knd of smulaton waveforms as dscussed n Secton usng OrCAD. The approach taken n ths thess to move desgn obtaned n OrCAD to Spce3 smulator. Spce3 smulator s used because the double gate model [UFDG06] s avalable for smulaton only n Spce3 smulator. OrCAD s a good tool for schematc entry for the prototype desgn and has an extensve component lbrary, as t was necessary to have a nonlnear opamp 741 model. On the other hand Spce3 uses a command lne nterface and models of devces and components need to be bult or acqure from CAD vendors. Thus t was

48 convenent to test the desgn usng the symbols provded n OrCAD lbrares rather than wrtng the netlst for each Opamp 741 Model n Spce3. 48 Fgure 25: Hysteress neuron crcut wth OrCAD The above fgure shows the schematc of hysteress neuron usng OrCAD 10.3, based on the dscusson n the Secton [Naka99]. The opamps used n the fgure are LM741 and the Zener dode s IN4744A (Appendx 2 gves the detals for these models). Both models were present n the lbrares of OrCAD. The smulatons were run for dfferent values of the ntal condtons and sgnal frequences. Fgure 26: OrCAD smulaton for chaos.

49 By changng the ntal condtons, lke ncreasng the ampltude, we get crcular chaos as shown below 49 Fgure 27: Crcular chaos usng OrCAD. Modfyng the ntal condtons n the same crcut, a hysteress characterstc s obtaned as shown n Fgure 28. Fgure 28: Hysteress characterstcs usng OrCAD.

50 50 Thus approxmately the same characterstcs for the hysteress neuron lke those obtaned earler by usng Multsm were smulated usng OrCAD 10.3 schematc desgn tool. The next step was to generate a netlst for ths crcut and smulate t usng Spce3 smulator. Here the double gate model [UFDG] was avalable n Spce3 was used n smulaton Smulaton usng Spce3 In order to mplement the hysteress neuron usng double gate MOSFET, the followng Spce3 netlst was generated. VIN 4 0 PULSE (0 0.1MV MS) dd N4744A ZENER 1 dd N4744A ZENER 1 rr e+003 rr e+002 rr e+002 rr e+002 rr rr cc E-6 VV dc 15 ac 0 0 xu U3_OPEN_VS- 12 OPAMP1 rr e+002 VV6 0 V6_OPEN_2 dc 15 ac 0 0 VV4 7 0 dc 15 ac 0 0

51 51 VV3 0 6 dc 15 ac 0 0 xu OPAMP1 VV2 0 2 dc 15 ac 0 0 VV1 1 0 dc 15 ac 0 0 xu OPAMP1 The model nformaton used n ths netlst of opamp 741 and 1N4744A Zener dode and the methodology to run the program s detaled n the Appendx 3. Ths netlst was run on Solars 10 operatng system and results were plotted and captured usng the screen shots. Fgure 29: Chaotc attractor from hysteress neuron usng Spce3. In the above fgure the chaotc attractor has an octagonal shape. Changng the ampltude of the nput wave, yelds double crcular chaotc attractors shown n Fgure 30.

52 52 Fgure 30: Double crcular chaotc attractors usng Spce3. The followng fgure llustrates the Hysteretc phenomenon demonstrated wth the same crcut but wth dfferent set of the ntal condtons. Fgure 31: Hysteress characterstcs usng Spce3. The next step s to use the same netlst and to produce hysteretc characterstcs usng the double gate MOSFET. Ths smulaton wll be dscussed n Chapter 5 after the descrpton of N-queens problem.

53 53 4. N-queens Problem 4.1 Introducton The 8-queen puzzle was proposed by a German chess player Max Bazzel [Wk07] n Later ths puzzle was studed extensvely by mathematcans and was extended to N-queens problem. Ths s one of the constrant satsfacton problems and hence t s NPcomplete. It s dffcult for all classcal search algorthms to fnd soluton for the N-queen problem n an acceptable tme. Varous approaches [Sos90], [Fnk87] has been used to solve the N-queen problem effcently. Snce the problem has a smple and regular structure ths can be used n fndng dfferent strateges usng neural networks. 4.2 System Stablty for Hysteress Neural Network In the Secton the stablty of sngle hysteress neuron was ntroduced. The output of the system doesn t change when all the cells n the network have a real equlbrum pont and the system s beleved to reach a stable state. Extendng the condtons for the real and magnary ponts n the Equatons and to the complete system, we obtan the followng condtons: f ( 2 p 1)( 2y 1) > 1 ( ) [Naka99] (4.2-1) the system s sad to be stable, and f ( 2 p 1)( 2y 1) < 1 ( ) [Naka99] (4.2-2) the system s consdered to be unstable.

54 54 One can nfer that If p > 1 ( ) only y = 1 have real equlbrum ponts and y = 0 have magnary equlbrum ponts. These magnary equlbrum ponts have the possbltes to change ther output from y = 0 to y = 1 If p < 0 ( ) only y = 0 have real equlbrum ponts and y = 1 have magnary equlbrum ponts. These magnary equlbrum ponts have the possbltes to change ther output from y = 1 to y = 0 From the above dscusson, t can be concluded that t s only the magnary equlbrum ponts whch change ther states. These cells try to change ther output n the hysteress regon whch s n the range [0, 1]. When these magnary equlbrum ponts locate the hysteress regon they become stable [Naka99]. Once all these ponts become stable, the system acheves the stablty, whch corresponds to the soluton of the problem for whch the network s desgned. 4.3 Problem Statement and Soluton Place N (N>3) queens, on the N x N board such that no two queens attack each other. In 8-queen problem t s necessary to place 8 queens n such a way that no two queens are able to attack each other. One of the 8 queen problem s solutons s as shown n Fgure 32

55 55 Q Q Q Q Q Q Q Q a) b) Fgure 32: One of the solutons for 8 queen problem. In Fgure 32 (b), 1 corresponds to the place where a queen s placed whle a 0 corresponds to the place where no queen s placed. In the N-queen problem no two queens can occupy the same row, column and dagonal, transformng these condtons nto varous constrants. The sum of the outputs on the rows s 1 [Naka99]. N m = 1 y m = 1 (, j) [Naka99] (4.3-1) The sum of outputs on the columns s 1 [Naka99] N m= 1 y mj = 1 (, j) [Naka99] (4.3-2)

56 Accordng to Nakaguch [Naka99] the sum of the outputs for the dagonal can be ether 1 or 0, as a queen can be n the dagonal or may not be present y 1 (, j) -k, j-k 1 -k, j-k N 0 y 1 (, j) -k,j+ k 1 -k,j+ k N [Naka99] (4.3-3) The above equatons are the constrants for solvng the N-queen problem. There can be many dfferent solutons for the same sze of chess board dependng upon the ntal condtons. The stable system s the one that has stable equlbrum pont and these constrants can be used to obtan the equlbrum for the hysteress neural network. Substtutng the values from Equaton 4.3-1, and nto the Equaton for the equlbrum pont becomes Equaton [Naka99] p j N N = 1 y + + m 1 ymj α j 1 y j, j k y j. j+ k + uj (4.3-4) m= 1 m= 1 1 j, j k N 1 j, j+ k N Substtutng the above value of equlbrum ponts nto Equaton gves [Naka99] λ j x. j = x j N N + 1 y + + m 1 y mj αj 1 m= 1 m= 1 y j, j k 1 j, j k N y j. j+ k 1 j, j+ k N + u (4.3-5) The soluton to the N-queen problem can be obtaned by havng a stable system. The stable system can be obtaned when all the equlbrum ponts are n the hysteress regon. The equlbrum pont has the value nsde the hysteress regon once all the constrants are satsfed. Usng these constrants a Matlab code was wrtten and the smulaton result for 8 queens problem s shown n Fgure 33 (refer Appendx 4 for Matlab code). j

57 If all the equlbrum ponts of the system are n the hysteress regon the system s sad to be stable and ths corresponds to the soluton for the N-queen problem. 57 Fgure 33: Matlab smulaton results for 8x8 queen problem. There are 92 solutons for the 8-queen problem whch depends on the ntal condton. Table 2 [Naka99] gves the number of solutons for varous szes of chess board and the number of teratons requred to obtan these solutons.

58 58 Table 2: Number of Solutons for Dfferent Sze of Queen Problem Table N # of Solutons N 2 C N x x x X X X X x x x x10 20 The N-queen system has a large set of dfferental equatons and when executed n the software each one of them s executed sequentally. Due to the nherently sequental nature of computer, as the number of queens to be placed ncreases, the tme taken to execute all the equatons ncreases exponentally. The dfferental equatons can be mplemented usng the analog crcut. Each cell (neuron) n the system can swtch ts state n parallel, ndependently of each other. Thus n a resultng parallel network, the executon tme s ndependent of the number of queens to be placed, consderng that such a network s realzable physcally, meanng mplementaton usng hardware.

59 Network Topology The N-queen problem requres only one queen to be placed n a sngle row, column or a dagonal. As a result each neuron s connected to all the neurons whose output nfluences the output of the neuron and feedback to tself. Consder the followng fgure. The smulated crcut topology s shown for two cases (neuron number 6: yellow and 13: green). Ths can be easly extended to all neurons. Fgure 34: Connecton topology for 8-queen network. Consder the queen at locaton (6). Ths neuron (representng the queen) s connected to all neurons from row 2 (neuron numbers 5, 7, 8) and column 2 (neuron numbers 2, 10, 14) and all the neurons along the forward dagonal (neuron number 1, 11, 16) and

60 60 backward dagonal (3, 9) n addton t has ts own feedback. The connectons are shown n the black lne. All neurons surroundng t affect the output of ths neuron. Neuron representng the queen at locaton (13), s connected to all neurons from row 4 (neuron numbers 14, 15, 16) and column 1 (neuron numbers 1, 5, 9) and all the neurons along the forward dagonal (neuron number 10, 7, 4) and n addton t has ts own feedback. The connectons are shown wth the red dashed lne. The neuron (number 13) s at the corner of the 8x8 board; hence t doesn t consder any connecton wth the backward dagonal neurons. Only the neurons n forward dagonal affect the output.

61 61 5. Double Gate MOSFET Implementaton of HNN 5.1 Introducton Comng decade wll have a plethora of challenges for the slcon ndustry whch successfully provded us wth many system mprovements over the last few decades. Gordon More predcted that the number of transstors on a chp would double every two years [More65]. For more than 40 years the slcon ndustry proved ths predcton, whch s now commonly known as Moore s law. Fgure 35: Moore s law graph [Inte07]. The number of transstors per mcroprocessor chp ncreased from some thousands n 1970 to nearly a bllon n recent tmes [Inte07]. The ndustry managed to squeeze more and more transstors by scalng down the sze of a sngle transstor. Reducng the physcal dmensons of the transstor ncreased the system speed and densty. Accordng to Internatonal Technology Roadmap for Semconductors [ITRS07] the ndustry wll soon

62 62 ht a roadblock n comng decade whch wll hamper the progress of devce shrnkng. The devces are reachng the physcal lmts of shrnkng; short channel effects and quantum phenomenon wll prohbt the smooth scalng of the devces n the near future. To combat such challenges, the slcon ndustry s usng a dual approach; frst, t s puttng hard efforts to utlze the exstng technology to shrnk the devces as much as possble and second, t s also consderng the feasblty for new devces, whch wll provde the same or better performance and scalablty as the current MOSFET technology. The followng fgure descrbes new devces, ther advantages, ther scalng ssues and desgn challenges as llustrated n the paper, Extendng the road beyond CMOS [Hutc02]. Fgure 36: Non classcal CMOS devces [Hutc02].

63 Double Gate MOSFET Structure Sekgawa proposed the double-gate transstor structure n early 1980s [Sek84]. The Double gate transstor conssts of a conductng channel surrounded by gates on both sdes. Havng two gates ensures that no part of a channel s far away from a gate. Ths gves better control of the channel by the gate electrode. In addton, the voltage appled to the gate termnal determnes the amount of current flowng through the channel. Fgure 37: Double gate MOSFET structure. The salent features of the double gate are [Wong02] Better control of short channel effects. Reductons of I off ; dran current when gate voltage s zero. Hgher current drve capabltes. The double gate can be operated n two modes. One of the common modes s swtchng both gates smultaneously. Ths mode s called smultaneously drven double gate (SDDG) MOSFET. Another mode s applyng a bas to the second gate (back-gate) to dynamcally change the threshold voltages. Ths mode s called as ndependently drven double gate (IDDG) MOSFET [Wong02].

64 64 V S Vg V D V S V D Top Gate Vg Top Gate SOURCE DRAIN SOURCE DRAIN Bottom Gate Vgb Bottom Gate Fgure 38: General double gate operaton modes. Kaya proposed the use of double gate MOSFET for mplementng the tuneable analog crcut blocks va varyng the bottom gate bas. The major mportance of ths s stated below [Kaya06] Increasng the functonalty of the devce. Reducng the area and other parastc effects. Hgh-speed and low power consumpton. Most of the devces mplemented usng double gates MOSFET are ndvdual crcut blocks wth some specfc functonalty. Ths research uses the DG MOSFET model as a part of the larger crcut to mplement the hysteress neuron and the entre system of cells based on the hysteress neuron crcuts. The DG MOSFET model used n ths research was developed by Unversty of Florda [UFDG06]. 5.3 Double gate Spce Model UFDG The UFDG s a generc model for double gate developed by SOI group at Unversty of Florda [UFDG06]. The model s compatble wth the Spce3 smulator and s faster than TCAD model. The UFDG model has fve termnals desgnated as dran, front gate,

65 65 source, back gate and body. The syntax for ths model n the Spce3 s gven [UFDG06] as MXXXX ND NGF NS NGB [NB] MNAME L=exp W=exp [M=exp] [AD=exp] [AS=exp] [AB=exp] [NRD=exp] [NRS=exp] [NRB=exp] [PDJ=exp] [PSJ=exp] [RTH=exp] [CTH=exp] [off] [IC= V ds, V gfs, V gbs, V bs ] where ND: Dran node, NGF: Front gate node, NS: Source node, NGB: Back gate node, NB: Body node, MNAME: Model name, L: Gate length, W: Gate wdth; the quanttes n the bracket are optonal and ( for the remanng devce lne parameters refer Appendx 5). In the thess the length and wdth of the double gate model used are L=100E-9 and W=1E-6 for NMOS transstor and L=100E-9 and W=2E-6 for PMOS transstor. Varous parameters of the model used n smulaton are defned n the Appendx 6 for NMOS and PMOS double gate. Appendx 6 also llustrates the methodology for runnng the Spce3 smulaton usng the UFDG model. 5.4 Double Gate Structures Self Bas Amplfer A hgh-gan push pull amplfer usng DG CMOS nverter, when based n the transton regon, usng the TCAD smulator s proposed [Kaya06]. The amplfer characterstcs can be altered by varyng the bas of the bottom gate. The bas for the DG CMOS can be of the same voltage.e. V p bg =V n bg or t can be of conjugate par V p bg = -V n bg wth equal magntude but havng opposte polarty. A thrd confguraton of the amplfer called self bas can be obtaned f the output of the IDDG CMOS par drves the bottom-gates respectve transstors.e. V p bg =V n bg =V out as shown n Fgure 39.

66 66 Fgure 39: Self bas confguraton of double gate MOSFET Spce 3 Code Followng s the spce3 netlst for the self bas confguraton of double gate MOSFET..wdth n=80 out=80.opton post MN0 out n ss out NDG L=100E-9 W=1E-6 IC=0, 0, 0, 0 MP0 out n dd out PDG L=100E-9 W=2E-6 IC=0, 0, 0, 0 VSS ss 0 DC -0.5 VIN n 0 DC 0.5 VDD dd 0 DC 0.5.DC VIN V.PRINT DC out.option + ABSTOL=1E-18 PIVTOL=1E-30 GMIN=1E-18 ITL1=1000

67 67 + VNTOL=1E-6 RELTOL=1E-3 CHGTOL=1E-18 The NDG (NMOS) and PDG (PMOS) double gate model characterstcs are gven n the Appendx 6. As seen from the code the power supply used s ± 0.5 V, whch s typcally used for the low power applcatons Smulatons Results The gan for the self bas confguraton s sgnfcantly lower and the curve obtaned s lnear. Fgure 40: Double gate MOSFET self-bas amplfer confguraton. 5.5 Double gate Structure for Schmtt Trgger An effcent and programmable Schmtt Trgger structure usng only 4 double gate MOSFET usng the TCAD smulator s proposed [Kaya06]. The double gate CMOS amplfer s lateral shft of transfer functon s demonstrated and can be easly utlzed to

68 68 buld Schmtt trgger. The Schmtt trgger s a two stage devce n whch the response of the frst stage s shfted usng the conjugate bas of the second stage. The wdth of hysteress depends upon the conjugate bas of the second stage [Kaya06]. Fgure 41: Schmtt trgger usng double gate MOSFET Spce 3 Code The spce3 netlst for the Schmtt trgger confguraton of double gate MOSFET s.wdth n=80 out=80.optons post MN GN1 L=100E-9 W=1E-6 IC=0, 0, 0, 0 MP GP1 L=100E-9 W=2E-6 IC=0, 0, 0, 0 MN GN2 L=100E-9 W=1E-6 IC=0, 0, 0, 0 MP GP2 L=100E-9 W=2E-6 IC=0, 0, 0, 0 VSS 7 0 DC -0.3V VDD 2 0 DC 0.3V VIN 1 0 DC 1V

69 69 VIN 1 0 PWL(0nS nS 1 200nS -1 ).OPTIONS + ABSTOL=1E-18 PIVTOL=1E-30 GMIN=1E-10 ITL1= VNTOL=1E-6 RELTOL=1E-3 CHGTOL=1E-18 The GN1 GN2 (NMOS) and GP1, GP2 (PMOS) model characterstcs are gven n the Appendx 6. As seen from the code the power supply used s ± 0.3 V, whch s typcally used for the low power applcatons Smulaton Results The Schmtt Trgger s wdth s tunable usng the conjugate bas n the second stage, llustrated from the Fgure 42 and 43. In Fgure 42 the conjugate bas appled was ±0.5V. Fgure 42: Schmtt trgger wth conjugate bas ±0.5V.

70 70 In the Fgure 43 the conjugate bas appled was ±0.3V. Thus t can be concluded that the wdth of the Schmtt trgger can be easly tuned by applyng the proper conjugate bas voltages. Fgure 43: Schmtt trgger wth conjugate bas ±0.3V. 5.6 Double gate Neuron Model Fgure 44 llustrates the double gate neuron model usng the self bas confguraton and Schmtt trgger confguraton. As seen from the fgure ths model utlzes only 8 transstors. The transstor szes used n the smulaton are NMOS : Length = 100E-9 and Wdth = 1E-6 PMOS : Length = 100E-9 and Wdth = 2E-6

71 71 The transstor models of NMOS and PMOS used n these smulatons are gven n the Appendx 6. A 1N4744A Zener dode s used n ths smulaton. The model detals for the Zener dode are gven n Appendx 3.1. Fgure 44: Double gate neuron model Spce 3 Code Ths spce3 netlst wrtten for the double gate MOSFET neuron model s as follows xv5 4 0 Pulse_V_SourceV5.SUBCKT Pulse_V_SourceV5 1 2 V 1 2 dc 0 ac pulse(-1v 1V 0NS 0NS 0NS 1MS 2MS).ENDS dd N4744A ZENER 1 dd N4744A ZENER 1

72 72 rr e+003 rr e+002 rr e+002 rr e+002 rr rr cc E-6 VV dc 15 ac 0 0 xu self_bas.subckt self_bas wdth n=80 out=80.opton post MN ss 10 NDG L=100E-9 W=1E-6 IC=0,0,0,0 MP dd 10 PDG L=100E-9 W=2E-6 IC=0,0,0,0 VSS01 ss 0 DC -0.5 VDD01 dd 0 DC 0.5.OPTION + ABSTOL=1E-18 PIVTOL=1E-30 GMIN=1E-18 ITL1= VNTOL=1E-6 RELTOL=1E-3 CHGTOL=1E-18.MODEL NDG NMOS LEVEL=10 See Appendx 6 for NDG model.model PDG PMOS LEVEL=10

73 73 See Appendx 6 for PDG model.ends rr e+002 VV6 0 V6_OPEN_2 dc 15 ac 0 0 VV4 7 0 dc 15 ac 0 0 VV3 0 6 dc 15 ac 0 0 VV2 0 2 dc 15 ac 0 0 VV1 1 0 dc 15 ac 0 0 xu1 8 5 self_bas xu2 9 8 schmtt_trgger.subckt schmtt_trgger 9 8 MN GN1 L=100E-9 W=1E-6 IC=0,0.5,0,0 MP GP1 L=100E-9 W=2E-6 IC=0,0,0,0 MN GN2 L=100E-9 W=1E-6 IC=0,-0.5,0,0 MP GP2 L=100E-9 W=2E-6 IC=0,0,0,0 VSS 17 0 DC -0.5V VDD 16 0 DC 0.5V.OPTIONS + ABSTOL=1E-18 PIVTOL=1E-30 GMIN=1E-10 ITL1= VNTOL=1E-6 RELTOL=1E-3 CHGTOL=1E-18.MODEL GN1 NMOS LEVEL=10 See Appendx 6 for GN1 model

74 74.MODEL GN2 NMOS LEVEL=10 See Appendx 6 for GN2 model.model GP1 PMOS LEVEL=10 See Appendx 6 for GP1.MODEL GP2 PMOS LEVEL=10 See Appendx 6 for GP2.ENDS rr MODEL 1N4744A ZENER 1 D See Appendx 3.1 for Zener 1N4744A model.ends.tran 0.1MS 50MS.END Smulaton Results The methodology to run the netlst n elaborated n the Appendx 6.3. Fgures 45 and 46 are the double gate MOSFET model hysteress characterstcs, obtaned after the netlst was run on Solars 10 machne. The double gate hysteress neuron can be used as a buldng block to buld a larger Hopfeld neural network. Ths network can solve several constrant satsfacton problems ncludng the N-queens problem dscussed n chapter 4. If a network wth topology, suggested n Secton 4.4 s mplemented, the network can be utlzed to solve the 8 queen problems.

75 75 Fgure 45: Double gate MOSFET hysteress neuron smulaton one. Fgure 46: Double gate MOSFET neuron model smulaton two.

76 Summary Double gate MOSFET not only saves the transstor count but also operates at lower voltages than present CMOS devces. Suppose we buld a network for solvng the 8- queen problem, usng hysteress neuron. 60 transstors are needed to buld the sngle opamp based neuron, as a one LM741 operatonal amplfer requres 20 transstors [N74107]. The number of transstors requred for 8x8 networks wll be 3840 whle the count of transstors usng double gate neurons s 512 snce t requres only 8 transstors to buld a sngle neuron. Ths s 3328 transstors less than opamp mplementaton whch s a sgnfcant reducton n the transstor count. The supply voltage requred for opamp based neuron s between ±12V and ±15V whle t s ±0.5V n double gate MOSFET based neuron. Any applcaton utlzng a neural network prncple has hundreds of neurons and the sze of network s comparatvely large for 8x8 neural networks. Thus, usng the double gate neuron model, the same functonalty can be obtaned usng less number of transstors operatng at lower voltages. Ths thess also demonstrated that we can buld larger crcuts usng the double gate MOSFET rather than usng t for desgnng small ndvdual components. Ths attempt of mplementng a neural network usng double gate MOSFET can be consdered as a proof of concept for mplementng larger ntegrated crcuts usng double gate MOSFET. Double gate MOSFET can be consdered as an opton for futurstc devce whch mght be able to replace the conventonal CMOS n comng decades.

77 Hysteress Neuron Model usng OTA Operatonal transconductance amplfer (OTA) s a voltage controlled current source (VCCS). It takes dfferental nput voltage and produces output current. A smple desgn of hysteress chaos generator usng just sx elements - two capactors, two resstors, one lnear VCCS and one hysteress VCCS s proposed [Naka96]. Fgure 47 gves a block level crcut desgn of hysteress chaos generator usng the hysteress VCCS. Fgure 47: RC OTA desgn for hysteress chaos generator. Km proposed the Schmtt trgger desgn [Km97], usng OTA and a regster. Usng the Schmtt trgger desgn usng OTA, hysteress OTA s buld wth the help of bult n models of OTA n Multsm software. Fgure 48 gves complete realzaton for the block level desgn of hysteress chaos generator llustrated n the Fgure 47.

78 78 Fgure 48: OTA bases hysteress neuron. The crcut shown n Fgure 48 was smulated n the Multsm software and the results are shown n the Fgures 49 and 50. Fgure 49 demonstrated the chaos phenomenon usng OTA based hysteress chaos generator. Fgure 49: Chaos usng RC OTA.

79 Changng the ntal condtons the hysteress characterstcs wth the same crcut can be obtaned. 79 Fgure 50: Hysteress usng RC OTA.