Parallel Port Signals

Transcription

1 Table of Contents Parallel Port Signals Introduction...1 Signal timing...1 Wave forms...3 Using a transceiver...4 LCDproc with hd44780/winamp driver...5 T6963 display...6 Timing with LCDproc...6 Other signals...7 Data vs. control line...8 Noise on the power line...9 Questions for further testing...9 Introduction For many years the parallel port of a personal computer has been an easy way to connect electronics using digital I/O lines to a computer. Early examples are LED bar graphs and LC displays. However, using the parallel port has sometimes been troublesome, especially if exact timing was necessary or long cables were used. While it was possible to use direct I/O commands to drive the lines of a parallel port years ago, today's operating systems do not allow or restrict the use of direct I/O. Some kind of device API has now to be used instead, which is said to be slower than direct I/O. The following sections present results from a measurement experiment about the following questions: 1. How fast can signals on a parallel port be driven? 2. How can the timing be controlled? 3. Is parallel port device access slower than direct I/O? For this experiment the following components were used: Parallel port of a Toshiba Tecra S2 Break-out board for parallel port connected with 1.8m cable to the laptop FTDI FT245RL DIP interface board Rigol digital oscilloscope FreeBSD 7.3 operating system Self-written test program. Signal timing The table below shows signal timings resulting from the test program toggling one pin on the data port of the parallel port or on the FT245 from 0 to 1 and reverse with a given 2011, Markus Dolze <bsdfan@nurfuerspam.de> 1

2 delay. The delay created using nanosleep(3) system call. The following observations were made: On the parallel port of my laptop the 1 voltage level was around 3,3V instead of expected 5V. For long delays (10ms, 20ms) the sleep system call creates acceptable timings. For very small delay values (1-3) the minimum timing possible was 2ms (which is nearly a delay value of Without any delay, direct I/O resulted in very fast (5us) signals switches, with PPI being 4 times slower. On the USB port single USB messages (each toggle of the signal was one USB command) seem to take a minimum of 2ms. Delay Direct I/O PPI USB ms 20 ms 20 ms 0 10 ms 10 ms 10 ms 5 us 20 us 2 ms 2011, Markus Dolze <bsdfan@nurfuerspam.de> 2

3 Delay Direct I/O PPI USB ms 2 ms 4 ms 3 2 ms 2 ms Wave forms For this experiment a 74HC245 transceiver was used to drive the signal arriving at the break-out board. A trigger was set at 2,3V. Observations: The parallel port has a signal rise time of about 50ns. The 74HC245 is much faster and delivers 5V signal voltage. The FT245 delivers 5V signals as well, but has a much slower rise time. 2011, Markus Dolze <bsdfan@nurfuerspam.de> 3

4 Parallel Port Parallel Port with 74HC245 FT245 Using a transceiver For the following experiment the transceiver was used a well. The same timing code as in section Signal timing was used. Signal voltage levels are at 5V. Signal timings do not differ notably from the Direct I/O ones. Parameter Delay = Delay = , Markus Dolze <bsdfan@nurfuerspam.de> 4

5 Parameter Wave form LCDproc with hd44780/winamp driver The following diagramms show the effects of different settings in the LCDd config file related to bus timing on the parallel port. For this test the EN (enable = strobe) line was used to acquire data. 2011, Markus Dolze <bsdfan@nurfuerspam.de> 5

6 Parameter DelayBus = false DelayBus = true DelayMultiplier = 1 Very short pulses of 5us to 5V (on a control line) at the same parallel port delivering 3,3V for data signals. The pulse width increases from 5us to 2ms. 2011, Markus Dolze <bsdfan@nurfuerspam.de> 6

7 Parameter DelayBus = true DelayMultiplier = 10 DelayBus = true DelayMultiplier = 100 No change in timings compared to DelayMultiplier = 1. DelayBus = true DelayMultiplier = 1000 The pulse width does not increase, but the delay in between the signals. The pulse width does not increase, but the delay in between the signals. 2011, Markus Dolze <bsdfan@nurfuerspam.de> 7

8 T6963 display Timing with LCDproc ### TBD ### Parameter Default settings Delay = on 2011, Markus Dolze <bsdfan@nurfuerspam.de> 8

9 Parameter Write each byte twice to the parallel port. Other signals The following table shows some other signals I watched during my tests. Description Reset line (yellow) with noisy power line (cyan) Reset line with noisy power line and capacitor 2011, Markus Dolze <bsdfan@nurfuerspam.de> 9

10 Description Negative contrast voltage with soft-start circuit. Negative power is delayed by a few milliseconds after power on. Data vs. control line These diagrams shows the difference in signals on the parallel port of my Toshiba Tecra S2. The data lines only reach 3,3V and have a good edge. The control lines reach 5V but have slower rise times. Data line Control line 2011, Markus Dolze <bsdfan@nurfuerspam.de> 10

11 Noise on the power line This is what happens if I power on my 5V power supply using a LM317. Without a capacitor a stable voltage is reached only after several ms. Power line Same power line with capacitor 10µF between 5V and GND. Questions for further testing What is the delay between rising parallel port line and output on 74HC245? Does Speedstep have an effect on the timing? What effect do the different timing mechanisms in LCDproc have? How fast can the FT245 output signals if several bytes are written at once? 2011, Markus Dolze <bsdfan@nurfuerspam.de> 11