Image Sensor Advanced Package Solution. Prepared by : JL Huang & KingPak RD division

Transcription

1 Image Sensor Advanced Package Solution Prepared by : JL Huang & KingPak RD division

2 Contents CMOS image sensor marketing overview Comparison between different type of CMOS image sensor package Overview for KingPak imbga/imlcc CMOS image sensor package Summary

3 CMOS image sensor marketing overview CCD sharing the market over 20% at 2010 and drop to less than 5% at 2017, it means CMOS image sensor replace the CCD gradually and contains the 90% of overall image sensor revenue in (6.6 billions in 2012 and keep growth to 11 billions in 2017) >20% <5% 6.6 B 11 B Marketing Information from Yole Development

4 CMOS image sensor marketing overview Consumer/mobile devices are the major applications in CMOS image sensor and sharing over 80% in the TAM. CMOS keeps the higher growth momentum(cagr=11%)from 2012 to 2017.because consumer keep growth and lots of new applications commercialized gradually during this period. Marketing Information from Yole Development

5 CMOS image sensor marketing overview Based on CAGR vs. revenue by different application, Surveillance/ Automotive/Tablet applications with lower market sharing but with higher CAGR(>20%) during 2012~2017 which expected with attractive requirement in coming future. Equipped cars with multiple cameras pushed by upcoming requirement to make the passengers more safety. The automotive market is expected to reach $400M in (Sensor with higher reliability requirement is necessary driven by market demand) Marketing Information from Yole Development

6 CMOS image sensor marketing overview Except the consumer electronic devices for CMOS image sensor, lots of innovative applications (medical, automotive, defense, industrial, security.etc) drive this market keeps growth in the future.

7 Distribution of different CMOS image sensor package solutions The wafer level package and COB sharing the equal market in 2012 and expected TSV technology will penetrate gradually to cover over 50% market in 2015 and COB/ShellCase WLCSP sharing the remains. TSV will become the main stream package solution from cost driven especially for consumer products but still with constrain for special applications which with high reliability requirement. 50% 52% 48% Marketing Information from Yole Development

8 CMOS image sensor package solutions Major existing package techniques for CMOS image sensor. Interconnect & I/O Redistribution (W/B; T-contact; TSV; Flip Chip) Cavity sealed by glass (Epoxy bond/ Eutectic bond) Flip Chip & RDL (on Glass) NeoPAC Eutectic Hermetic Bond (on die) Interconnect & I/O Redistribution Wafer level package TSV & RDL (on Sensor) TSV WLCSP Epoxy Bond (on die) T-contact & RDL (on Sensor) Shellcase WLCSP Cavity Sealed by Glass imbga / ibga Wire Bond & RDL (on Substrate) COB PLCC CLCC Epoxy Bond (on Housing)

9 COB sensor package status quo COB is the conventional image sensor package with lower assembly cost and easily time to market. Still with specific market sharing in consumer application. COB line requires clean room infrastructure and good particle control to ensure higher camera module assembly yield. Poor shift/tilt control during module assembly because of lens holder mount on PCB but need consider the deviation for die to PCB.. lens VCM Holder Sensor die PCB Au wire PCB + Flex PCB

10 Shellcase CSP sensor package status quo Shellcase s unique IP for image sensor package since year Should be the 1 st high volume production technology of WLCSP for image sensor by 200mm. T-contact package must have >150um scribe line design in wafer process(standard scribe line 80um) which will reduce the utilization on wafer and increase the die cost. RDL T-contact line edge connection is the weakness for reliability.

11 NeoPAC sensor package status quo The thinnest package(~0.6mm; driven by mobile application) for wafer level solution and perform good sealed by SnAg/Cu eutectic bonding. (pass MSL1 in component level) Constrain for NeoPAC package is high I/O application because big fan-out area needed in X/Y direction. Large package size will impact the board level reliability. Board level reliability for TC and/or bending w/o using underfill still under improvement. Seal ring

12 TSV sensor package status quo General TSV w/o IP concern for IDM/package house to make wafer level package by TSV technology and already MP demonstrated by 200mm. Leverage existing BEOL process to form TSV by following process of Si RIE/low temp CVD insulation/ti sputtering/cu plating. Continue yield/reliability improvement(tsv dry etch control/tsv metal peeling/oxide crack..etc) and extended the production capability to 300mm wafer level package.

13 TSV sensor package status quo Shellcase innovation (MVP technology) for low cost TSV(Via last) based on existing PCB tools. TSV fabricated by silicon wet anisotropic etch and laser drill through polymer insulator and metallic bond pad. Announced pass component pre-con MSL1 and TCT2000 cycles (-40~125 o C)

14 TSV sensor package status quo Stacked CIS is Sony s cutting-edge technology for image sensor announced at 2012 and it will be the trend to driven the lower cost (~30% die size reduction) by maturated process yield. Except lower cost by compact die size for stacked CIS, it still have the advantage of (i) ISP & CIS can develop their technology separately and stacked TSV process can link them in between (ii)stacked structure makes it possible to place large circuits on small chips and enables circuits to speed up signal processing speeds through TSV and reduce power consumption. TSV A/R~3.3 TSV A/R~1.5 TSV full filled by Cu BSI CIS ISP

15 imbga/imlcc Package Schematic Outline imbga/imlcc package structure & dimension I K G J A B H 3.3 C E D Symbol Material Design thickness A Glass lid 400±50um (210um) B Dam adhesive 100±25um C Wafer 200±10um (50um) D D/A epoxy resin 25±15um E Substrate 290±50um (130um) F Solder ball 220±25um G Molding gap 35±15um H Total height 1235±150um I Dam width 400±100um J Bond pad edge to dam 150um (min) K Sensor area edge to dam 150um(min) Better reliability performance from cavity encapsulated by EMC to provide the 2 nd guard for glass sealed and improve the MSL resistivity. Standard offering of package height for imbga/imlcc is 1.2/1.0mm, the thin down feasibility can achieve 0.75/0.55 mm. F

16 imbga/imlcc Package technical challenge imbga/imlcc technical challenge Glass sealed dam epoxy selection --- Good adhesive to Si/glass, higher TI/ lower modulus and CTE mis-match to BOM materials required. Glass sealed tilt control --- B-stage and epoxy dispense/ bonding optimization to well control it less than 25um, keep pushing to 20um. Transfer Film Assist Molding technique --- Stress control (by insert) and mold tape buffer to reduce the molding stress concentrated on dam area and easily delaminated post reliability test. insert insert Mold tape Glass EMC Glass Sensor die Dam Dam Sensor die

17 Comparison between different type of CMOS image sensor package Cost : COB should be the 1 st choice and WLCSP will be the alternative Form factor: NeoPAC for Z-height and WLCSP is better for X/Y dimension. Sensor shift & tilt control: Competitive between NeoPAC & imbga/imlcc.

18 Comparison between different type of CMOS image sensor package The reliability performance of above 4 package solution all can pass component level MSL3+TCT1000 condition but imbga/imlcc shows better board level reliability compare with others.

19 imbga/imlcc reliability Qualification Component-Level reliability Qualification (8*8mm/64Balls) Reliability Test Items Test Condition Duration Results Pre-condition (MSL3+IR reflow*3) 30 o C/60%RH 192hrs Pass TCT -55 o C~125 o C 1000 cycles Pass THT 85 o C, 85%RH 1008 hrs Pass HTS 125 o C 1008 hrs Pass Board-Level reliability Qualification Reliability Test Items Test Condition Duration Results TCT -55 o C~125 o C 1000 cycles Pass Mechanical Shock Peak Input Acceleration= 1500G Input Duration= 0.5ms In-situ Data Collection at 100KHz 200 drops Pass The reliability performance can pass the above test condition and under verification to fulfill AECQ100 automotive requirement.

20 Feasibility of embedded Passive & Active component Integrated VCM driver IC & passive component inside the sensor package with well encapsulation protected and easily combined for module ready Driver IC 0201 Same concept with DNP(JP), applying SONY s camera module within passive/ active components inside the coreless cavity substrate. imlcc package embedded driver IC & capacitance

21 Reflowable wafer level module Already demonstrate the feasibility of reflowable WL-camera module by fixed focus with low resolution (VGA to 2M). Continue evaluate the feasibility combined with VCM for WLcamera module.

22 Blue glass instead of IR-cut for better image quality in wide angle application BSI design with wider light gathering angle compare with FSI, the absorption/ interference filter by different incident angle will have wavelength variation and it can minimize by blue glass. Image quality and ghost can effective improve by blue glass. Not available for wafer type blue glass, KP s imbga package is the best way to provide this solution with small form factor. FSI BSI Absorption/Interference filter by 0 o vs. 30 o angle of incident

23 Summary Marketing information revealed the promising growth moment for image sensor compare with others semiconductor products, lots of new innovation will enrich the application & business in the future. The new package solution still driven by cost/performance and TSV should be the mainstream based on the devoted players till now. Stacking CIS (ISP+CIS) is new revolution in image sensor industry which facilitates the compacted sensor design by wafer bonding/tsv technology. Except cost consideration, higher reliability (ex. automotive) and different customized requirement will drive others package solutions to meet the market demand. KingPak s package solution will focus on niche products which requires higher reliability or large sensor size applications.

24 Thanks so much for your attention on this subject!