AN High-performance PCB antennas for ZigBee networks. Document information. Keywords
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1 Rev May 2015 Application note Document information Info Content Keywords Meander antenna, Inverted-F antenna, Dipole antenna, JN516x, ZigBee Abstract This application note describes three designs of printed antenna for use with the NXP JN516x series of wireless microcontrollers used in IEEE based systems, such as ZigBee networks.
2 Revision history Rev Date Description Initial version Contact information For more information, please visit: All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
3 Table 1. Reference board summary Reference design Short description Embeds OM15006 SSB W and TW with antenna JN5168 and TEA Introduction The NXP JN516x wireless microcontrollers are designed for use in the nodes of lowpower wireless networks based on the IEEE protocol standard. These networks may employ higher level networking protocols built on top of IEEE , such as ZigBee PRO or ZigBee-RF4CE. The antenna for use with a JN516x device must be selected by the developer and this application node describes three designs for a suitable high-performance PCB antenna: Meander antenna - see Section 2 Inverted-F antenna (IFA) - see Section 3 Dipole antenna - see Section 4 2. Meander antenna The meander antenna simulations have been done with ADS from Cadence and EMPro from Agilent. 2.1 Two-layer printed antenna PCB characteristics Substrate FR4. Substrate thickness = 1.0 mm. Εr = 4.6, Er TanD = Copper thickness = 17 µm. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
4 2.1.2 Antenna layout Fig 1. Meander antenna layout diagram Table 2. Meander antenna layout dimensions Reference (in diagram) Distance (mm) A 0.5 B 7.7 C 1.6 D 4.5 E 17.7 F 1.1 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
5 2.1.3 Counter poise The counter poise is made of metallic tin plate with a thickness of 0.3 mm. Fig 2. Counter poise dimensions Assembled view Fig 3. 3D view of meander antenna with its counter poise All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
6 2.2 Simulation results S parameters Fig 4. S11 parameter S11 results S11[2.350 GHz] = 4.31 db. S11[2.400 GHz] = 4.51 db. S11[2.510 GHz] = 4.6 db. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
7 2.2.3 S11 Smith chart Fig 5. S11 Smith chart All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
8 Fig 6. S11 Smith chart All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
9 D radiation The maximum gain is in the theta direction. Fig 7. Total gain for all directions All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
10 (1) Maximum gain 1.2 dbi at 13 Fig 8. Gain in theta direction All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
11 Fig 9. Gain in phi direction All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
12 Fig 10. Directivity versus Theta Radiation efficiency Table 3. Radiation efficiency at 1 GHz, 2.4 GHz and 3 GHz Frequency Efficiency 1 GHz 40.6% 2.4 GHz 87.1% 3 GHz 28.2% All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
13 3. Inverted-F antenna (IFA) The Inverted-F antenna simulations have been done with ADS from Cadence. 3.1 One-layer printed antenna PCB characteristics Substrate FR4. Substrate thickness = 1.6 mm. Εr = 4.6, Er TanD = Copper thickness = 35 µm Antenna layout Fig 11. Inverted-F antenna layout diagram Table 4. Inverted-F antenna layout dimensions Reference (in diagram) Distance (mm) A 1.5 B 20.3 C 4.4 D 15.2 E 6.3 F 10.3 G H 1.85 I 1.05 J 21 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
14 3.2 Simulation results S parameters Fig 12. S11 parameter S11 results S11[2.366 GHz] = 19.6 db. S11[2.447 GHz] = 19.8 db. S11[2.551 GHz] = 44.9 db. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
15 3.2.3 S11 Smith chart Fig 13. S11 Smith chart D radiation The maximum gain is in the theta direction. Fig 14. Total gain for all directions All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
16 Fig 15. Gain in theta direction All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
17 Fig 16. Gain in phi direction Radiation efficiency Table 5. Radiation efficiency at 1 GHz, 2.4 GHz and 3 GHz Frequency Efficiency 1 GHz 18% 2.4 GHz 25% 3 GHz 20.1% All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
18 4. Dipole antenna The dipole antenna simulations have been done with ADS from Cadence. 4.1 One-layer printed antenna PCB characteristics Substrate FR4. Substrate thickness = 1.6 mm. Εr = 4.6, Er TanD = Copper thickness = 35 µm Antenna layout Fig 17. Dipole antenna layout diagram Table 6. Dipole antenna layout dimensions Reference (in diagram) Distance (mm) A 22.2 B 3 C 2.2 D 0.7 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
19 4.2 Simulation results S parameters Fig 18. S22 parameter S22 results S22[2.367 GHz] = 3 db. S22[2.426 GHz] = 5.8 db. S22[2.547 GHz] = 1.5 db. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
20 4.2.3 S22 Smith chart Fig 19. S22 Smith chart D radiation The maximum gain is in the theta direction. Fig 20. Total gain for all directions All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
21 Fig 21. Gain in theta direction All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
22 Fig 22. Gain in Phi direction Radiation efficiency Table 7. Radiation efficiency at 1 GHz, 2.4 GHz and 3 GHz Frequency Efficiency 1 GHz 26% 2.4 GHz 22.54% 3 GHz 41.8% All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
23 5. Legal information 5.1 Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 5.2 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations A non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Evaluation products This product is provided on an as is and with all faults basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of noninfringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
24 6. List of figures Fig 1. Meander antenna layout diagram... 4 Fig 2. Counter poise dimensions... 5 Fig 3. 3D view of meander antenna with its counter poise... 5 Fig 4. S11 parameter... 6 Fig 5. S11 Smith chart... 7 Fig 6. S11 Smith chart... 8 Fig 7. Total gain for all directions... 9 Fig 8. Gain in theta direction Fig 9. Gain in phi direction Fig 10. Directivity versus Theta Fig 11. Inverted-F antenna layout diagram Fig 12. S11 parameter Fig 13. S11 Smith chart Fig 14. Total gain for all directions Fig 15. Gain in theta direction Fig 16. Gain in phi direction Fig 17. Dipole antenna layout diagram Fig 18. S22 parameter Fig 19. S22 Smith chart Fig 20. Total gain for all directions Fig 21. Gain in theta direction Fig 22. Gain in Phi direction All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
25 7. List of tables Table 1. Reference board summary... 3 Table 2. Meander antenna layout dimensions... 4 Table 3. Radiation efficiency at 1 GHz, 2.4 GHz and 3 GHz Table 4. Inverted-F antenna layout dimensions Table 5. Radiation efficiency at 1 GHz, 2.4 GHz and 3 GHz Table 6. Dipole antenna layout dimensions Table 7. Radiation efficiency at 1 GHz, 2.4 GHz and 3 GHz All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V All rights reserved. Application note Rev May of 26
26 8. Contents 1. Introduction Meander antenna Two-layer printed antenna PCB characteristics Antenna layout... 4 Counter poise Assembled view Simulation results... 6 S parameters S11 results S11 Smith chart D radiation Radiation efficiency Inverted-F antenna (IFA) One-layer printed antenna PCB characteristics Antenna layout Simulation results S parameters S11 results S11 Smith chart D radiation Radiation efficiency Dipole antenna One-layer printed antenna PCB characteristics Antenna layout Simulation results S parameters S22 results S22 Smith chart D radiation Radiation efficiency Legal information Definitions Disclaimers List of figures List of tables Contents Please be aware that important notices concerning this document and the product(s) described herein, have been included in the section 'Legal information'. NXP Semiconductors N.V All rights reserved. For more information, visit: Date of release: 22 May 2015 Document identifier:
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Rev. 1.0 December 12, 2016 Application note Document information Info Content Keywords, 2.4 GHz LNA, 2.4-2.5 GHz ISM, WiFi (WLAN) Abstract This document provides circuit schematic, layout, BOM and evaluation
BGU8103 GNSS LNA evaluation board
BGU8103 GNSS LNA evaluation board Rev. 1 10 July 2015 Application note Document information Info Content Keywords BGU8103, GNSS, LNA Abstract This document explains the BGU8103 GNSS LNA evaluation board
Symbol Parameter Conditions Min Typ Max Unit V F forward voltage I F =10mA
SOT23 Rev. 6 6 March 2014 Product data sheet 1. Product profile 1.1 General description Low-power voltage regulator diodes in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package. The
Symbol Parameter Conditions Min Typ Max Unit V F forward voltage I F =10mA
Rev. 3 11 October 2016 Product data sheet 1. Product profile 1.1 General description Low-power voltage regulator diodes in a small SOD323 (SC-76) Surface-Mounted Device (SMD) plastic package. The diodes
20 ma LED driver in SOT457
in SOT457 Rev. 1 December 2013 Product data sheet 1. Product profile 1.1 General description LED driver consisting of resistor-equipped PNP transistor with two diodes on one chip in an SOT457 (SC-74) plastic
B (bottom) Package type descriptive code. VFBGA176 Package style descriptive code
VFBGA176, plastic, very thin fine-pitch ball grid array; 176 balls; 0.5 mm pitch; 9 mm x 9 mm x 0.86 mm 30 July 2018 Package information 1 Package summary Terminal position code B (bottom) Package type
PNP 5 GHz wideband transistor. Oscilloscopes and spectrum analyzers Radar systems RF wideband amplifiers
Rev. 3 22 January 2016 Product data sheet 1. Product profile 1.1 General description PNP transistor in a plastic SOT23 envelope. It is primarily intended for use in RF wideband amplifiers, such as in aerial
BB Product profile. 2. Pinning information. 3. Ordering information. FM variable capacitance double diode. 1.1 General description
SOT23 Rev. 3 7 September 2011 Product data sheet 1. Product profile 1.1 General description The is a variable capacitance double diode with a common cathode, fabricated in silicon planar technology, and
D (double) Package type descriptive code XSON16. P (plastic) JEDEC package outline code. MO-252 Mounting method type
XSON16 plastic extremely thin small outline package; no leads; 16 terminals; body 2.5 x 3.2 x 0.5 mm 8 June 2016 Package information 1. Package summary Terminal position code D (double) Package type descriptive
Hex inverting HIGH-to-LOW level shifter
Rev. 7 5 February 2016 Product data sheet 1. General description The is a hex inverter with over-voltage tolerant inputs. Inputs are overvoltage tolerant to 15 V. This enables the device to be used in
D (double) Package type descriptive code. SC-73 Package type industry code. SC-73 Package style descriptive code
heatsink; leads 8 February 2016 Package information 1. Package summary Terminal position code D (double) Package type descriptive code Package type industry code Package style descriptive code SO (small
Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit I F forward current [1] ma V R reverse voltage V V RRM
![Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit I F forward current [1] ma V R reverse voltage V V RRM](/thumbs/90/103886689.jpg "Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit I F forward current [1] ma V R reverse voltage V V RRM")
23 March 2018 Product data sheet 1. General description in a very small SOD323F (SC-90) flat lead Surface-Mounted Device (SMD) plastic package. 2. Features and benefits High switching speed: t rr 50 ns
PTN General description. 2. Features and benefits. SuperSpeed USB 3.0 redriver
Rev. 1 7 September 2015 Product short data sheet 1. General description is a small, low power IC that enhances signal quality by performing receive equalization on the deteriorated input signal followed
UM PN7120 NFC Controller SBC Kit User Manual. Rev July User manual COMPANY PUBLIC. Document information
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Analog high linearity low noise variable gain amplifier
Rev. 2 1 August 2014 Product data sheet 1. Product profile 1.1 General description The is a fully integrated analog-controlled variable gain amplifier module. Its low noise and high linearity performance
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.
Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic
Quad 2-input EXCLUSIVE-NOR gate
Rev. 6 10 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a quad 2-input EXCLUSIVE-NOR gate. The outputs are fully buffered for the highest
Hex non-inverting precision Schmitt-trigger
Rev. 4 26 November 2015 Product data sheet 1. General description The is a hex buffer with precision Schmitt-trigger inputs. The precisely defined trigger levels are lying in a window between 0.55 V CC
Analog high linearity low noise variable gain amplifier
Rev. 2 29 January 2015 Product data sheet 1. Product profile 1.1 General description The is a fully integrated analog-controlled variable gain amplifier module. Its low noise and high linearity performance
Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit I F forward current T j = 25 C V RRM
29 June 2018 Product data sheet 1. General description, in an ultra small SOD523 (SC-72) flat lead Surface-Mounted Device (SMD) plastic package. 2. Features and benefits High switching speed: t rr 50 ns
High-speed switching diode, encapsulated in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package.
7 December 2018 Product data sheet 1. General description 2. Features and benefits 3. Applications 4. Quick reference data, encapsulated in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic
BC857XQA series. 45 V, 100 ma PNP general-purpose transistors
45 V, 100 ma PNP general-purpose transistors Rev. 1 26 August 2015 Product data sheet 1. Product profile 1.1 General description PNP general-purpose transistors in a leadless ultra small DFN1010D-3 (SOT1215)
45 V, 800 ma PNP general-purpose transistor. General-purpose switching and amplification. Symbol Parameter Conditions Min Typ Max Unit
Rev. 1 21 April 217 Product data sheet 1 General description 2 Features and benefits 3 Applications PNP general-purpose transistors in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package.
80 V, 1 A NPN medium power transistors. Type number Package PNP complement Nexperia JEITA JEDEC BCP56T SOT223 SC-73 - BCP53T
8 V, A NPN medium power transistors Rev. 5 July 26 Product data sheet. Product profile. General description NPN medium power transistors in a medium power SOT223 (SC-73) Surface-Mounted Device (SMD) plastic
BAS116GW. 1. General description. 2. Features and benefits. 3. Applications. 4. Quick reference data
5 April 208 Product data sheet. General description, encapsulated in an SOD23 small Surface-Mounted Device (SMD) plastic package. 2. Features and benefits High switching speed: t rr = 0.8 µs Low leakage
Analog controlled high linearity low noise variable gain amplifier
Analog controlled high linearity low noise variable gain amplifier Rev. 4 15 February 2017 Product data sheet 1. Product profile 1.1 General description The is, also known as the BTS5001H, a fully integrated
D (double) Package type descriptive code. SMA; PMOS Package type industry code. SMA; PMOS Package style descriptive code
SMA PMOS rectangular surface mounted package; 2 8 February 2016 Package information 1. Package summary Terminal position code D (double) Package type descriptive code SMA; PMOS Package type industry code
PDTB1xxxT series. 500 ma, 50 V PNP resistor-equipped transistors
Rev. 3 May 204 Product data sheet. Product profile. General description PNP Resistor-Equipped Transistor (RET) family in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic package. Table. Product
BAV70SRA. 1. General description. 2. Features and benefits. 3. Applications. 4. Quick reference data
14 September 2018 Product data sheet 1. General description 2. Features and benefits 3. Applications 4. Quick reference data with common cathode configurations encapsulated in a leadless ultra small DFN1412-6
D (double) Package type descriptive code TSSOP8. TSSOP (thin shrink small outline package) Package body material type
TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm 8 June 2016 Package information 1. Package summary Terminal position code D (double) Package type descriptive
Wide working voltage range: nominal 2.4 V to 75 V (E24 range) Two tolerance series: ± 2 % and ± 5 % AEC-Q101 qualified
Rev. 1 29 May 2018 Product data sheet 1 Product profile 1.1 General description General-purpose Zener diodes in an SOT323 (SC-70) leadless very small Surface- Mounted Device (SMD) plastic package. 1.2
BAT54W series. 1. Product profile. 2. Pinning information. Schottky barrier diodes. 1.1 General description. 1.2 Features and benefits
SOT2 Rev. 20 November 2012 Product data sheet 1. Product profile 1.1 General description Planar with an integrated guard ring for stress protection, encapsulated in a very small SOT2 (SC-70) Surface-Mounted
40 V, 0.75 A medium power Schottky barrier rectifier
2 May 216 Product data sheet 1. General description Medium power Schottky barrier rectifier with an integrated guard ring for stress protection, encapsulated in a very small SOD323 (SC-76) Surface-Mounted
BAS21GW. 1. General description. 2. Features and benefits. 3. Applications. 4. Quick reference data
15 June 2017 Product data sheet 1. General description, encapsulated in an SOD123 small Surface-Mounted Device (SMD) plastic package. 2. Features and benefits High switching speed: t rr 50 ns Low leakage
Leadless ultra small SMD plastic package Low package height of 0.37 mm Power dissipation comparable to SOT23 AEC-Q101 qualified
19 August 2015 Product data sheet 1. General description PNP general-purpose transistor in a leadless ultra small DFN1006B-3 (SOT883B) Surface-Mounted Device (SMD) plastic package. NPN complement: BC846BMB.