RV-3049-C2 Application Manual

Transcription

1 Application Manual Date: March 28 Revision N : 3. /6 Headquarters: Micro Crystal AG Mühlestrasse 4 CH-254 Grenchen Switzerland Tel. Fax Internet sales@microcrystal.com

2 TABLE OF CONTENTS. OVERVIEW GENERAL DESCRIPTION APPLICATIONS BLOCK DIAGRAM PINOUT PIN DESCRIPTION FUNCTIONAL DESCRIPTION DEVICE PROTECTION DIAGRAM REGISTER ORGANIZATION REGISTER OVERVIEW CONTROL PAGE REGISTER FUNCTION CONTROL_ (address h bits description) CONTROL_INT (address h bits description) CONTROL_INT FLAG (address 2h bits description) CONTROL_STATUS (address 3h bits description) CONTROL_RESET (address 4h bits description) WATCH PAGE REGISTER FUNCTION SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS REGISTER DATA FLOW OF TIME AND DATE FUNCTION ALARM PAGE REGISTER FUNCTION SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS ALARM REGISTER TIMER PAGE REGISTER FUNCTION TEMPERATURE PAGE REGISTER FUNCTION EEPROM DATA PAGE REGISTER FUNCTION EEPROM CONTROL PAGE REGISTER FUNCTION EEPROM CONTROL (address 3h bits description) XTAL OFFSET (address 3h bits description) XTAL TEMPERATUR COEFFICIENT (address 32h bits description) XTAL TURNOVER TEMPERATUR COEFFICIENT T (address 33h bits description) RAM DATA PAGE REGISTER FUNCTION DETAILED FUNCTIONAL DESCRIPTION POWER-UP, POWER MANAGEMENT AND BATTERY SWITCHOVER POWER UP SEQUENCE SUPPLY VOLTAGE OPERATING RANGE AND LOW VOLTAGE DETECTION RESET POWER-UP RESET, SYSTEM RESET AND SELF-RECOVERY RESET REGISTER RESET VALUES EEPROM MEMORY ACCESS /6

3 4.4. TIMER FUNCTION TIMER INTERRUT ALARM FUNCTION ALARM INTERRUPT INTERRUPT OUTPUT INT WATCH ENABLE FUNCTION SELF-RECOVERY SYSTEM CLOCK OUTPUT CLKOUT COMPENSATION OF FREQUENCY DEVIATION AND FREQUENCY DRIFT vs TEMPERATURE TEMPERATURE CHARACTERISTICS TUNING FORK CRYSTAL COMPENSATION PRINCIPLE THERMOMETER AND TEMPERATURE VALUE SETTING THE FREQUENCY COMPENSATION PARAMETERS METHOD OF COMPENSATING THE FREQUENCY DEVIATION CORRECT METHOD FOR TESTING THE TIME ACCURACY TESTING THE TIME ACCURACY USING CLKOUT OUTPUT TESTING THE TIME ACCURACY USING INTERRUPT OUTPUT Hz TIME ACCURACY OPT: A / OPT: B SPI INTERFACE SPI INTERFACE SYSTEM CONFIGURATION SPI INTERFACE DATA TRANSMISSION COMMAND BYTE DEFINITION SPI INTERFACE READ / WRITE EXAMPLES ELECTRICAL CHRACTERISTICS ABSOLUTE MAXIMUM RATINGS FREQUENCY AND TIME CHARACTERISTICS STATIC CHARACTERISTICS SPI INTERFACE TIMING CHARACTERISTICS SPI INTERFACE DYNAMIC CHARACTERISTICS APPLICATION INFORMATION RECOMMENDED REFLOW TEMPERATURE (LEADFREE SOLDERING) PACKAGES DIMENSIONS AND SOLDERPADS LAYOUT MARKING AND PIN # INDEX PACKING & SHIPPING INFORMATION HANDLING PRECAUTIONS FOR CRYSTALS OR MODULES WITH EMBEDDED CRYSTALS DOCUMENT REVISION HISTORY /6

4 Highly accurate, with SPI Interface. OVERVIEW RTC module with built-in Tuning Fork crystal oscillating at khz Factory calibrated, all built-in Temperature Compensation circuitry Time accuracy: Temperature Range Opt: A Opt: B 25 C +/- 3 ppm +/- 3 ppm C to + 5 C +/- 4 ppm +/- 5 ppm - C to + 6 C +/- 5 ppm +/- ppm -4 C to + 85 C +/- 6 ppm +/- 25 ppm -4 C to +25 C +/- 8 ppm +/- 3 ppm Ultra low power consumption: 8nA V DD = 3.V / T amb = 25 C Wide clock operating voltage:.3 5.5V Wide interface operating voltage:.4 5.5V Extended operating temperature range: -4 C to +25 C SPI serial interface with fast mode SCL clock frequency of MHz Provides year, month, day, weekday, hours, minutes and seconds Highly versatile alarm and timer functions Integrated Low-Voltage Detector, Power-On Reset and Self-Recovery System Main Power Supply to Backup Battery switchover circuitry with Trickle Charger Programmable CLKOUT pins for peripheral devices ( khz / 24 Hz / 32 Hz / Hz) Small and compact C2 package size, RoHS-compliant and % lead-free: 5. x 3.2 x.2 mm.. GENERAL DESCRIPTION The is a CMOS low power, real-time clock/calendar module with built-in Thermometer and Digital Temperature Compensation circuitry (DTCXO). The temperature compensation circuitry is factory-calibrated and greatly improves the time accuracy by compensating the 25 C and the anticipated frequency-drift over the temperature of the embedded khz Tuning-Fork crystal, even over the extended Temperature Range -4 C to +25 C. Data is transferred serially via a SPI interface with a maximum SCL clock frequency in fast mode of MHz, the built-in word address register is incremented automatically after each written or read data byte. Beyond standard RTC-functions like year, month, day, weekday, hours, minutes, seconds information, the offers highly versatile Alarm and Timer-Interrupt function, programmable Clock-Output and Low-Voltage Detector..2. APPLICATIONS The RTC module combines key functions with outstanding performance in a small ceramic package: Factory calibrated Temperature Compensation Extended temperature range up to +25 C Low Power consumption Smallest temperature compensated RTC module with embedded Xtal These unique features make this product perfectly suitable for many applications: Automotive: Car Radio / GPS and Tracking Systems / Dashboard / Engine Controller / Car Mobile & Entertainment Systems / Tachometers Metering: E-meter / Heating Counter Outdoor: ATM & POS systems / Surveillance & Safety systems / Ticketing systems All kind of portable and battery operated devices Industrial and consumer electronics White goods 4/6

5 2. BLOCK DIAGRAM CLKOUT CLKOE INT V DD V BACKUP V SS CE SCL SDO SDI khz Xtal OSC OUTPUT CONTROL SPI-BUS 4-wire Serial Interface POWER CONTROL DIVIDER and TEMPERATURE COMPENSATION LOGIC SYSTEM CONTROL LOGIC TEMPERATURE SENSOR Control_ Control_INT Control_INT-Flags Control_Status Control_Reset Seconds Minutes Hours Date Weekday Month Year Seconds Alarm Minutes Alarm Hour Alarm Day Alarm Weekday Alarm Month Alarm Year Alarm Timer Low Timer High Temperature K User EEPROM 2 Bytes EE Ctrl Xtal Deviation Xtal Temp-Coef Xtal T Temp User RAM 8 Byte User RAM F 5/6

6 2.. PINOUT C2 Package: # #6 # V DD # CLKOE #2 CLKOUT #9 SDI #3 CE #8 V BACKUP #4 SCL #7 INT #5 SDO #6 V SS 349 # #5 6/6

7 2.2. PIN DESCRIPTION Symbol Pin # Description V DD Positive supply voltage; positive or negative steps in supply voltage may affect oscillator performance, recommend nf decoupling capacitor close to device CLKOUT 2 Clock Output pin; CLKOUT or INT function can be selected.(control_; bit7; Clk/Int) CLKOUT output push-pull / INT function open-drain requiring pull-up resistor CE 3 Chip Enable Input pin; active HIGH SCL 4 Serial Clock Input pin; may float when CE inactive SDO 5 Serial Data Output pin; push-pull; high impedance when not driving; can be connected to SDI for single wire data line V SS 6 Ground INT 7 Interrupt Output pin; open-drain; active LOW V BACKUP 8 Backup Supply Voltage; tie to GND when not using backup supply voltage SDI 9 Serial Data Input pin; may float when CE inactive CLKOE CLKOUT enable/disable pin; enable is active HIGH; tie to GND when not using CLKOUT 2.3. FUNCTIONAL DESCRIPTION The is a highly accurate real-time clock/calendar module due to integrated temperature compensation circuitry. The built-in Thermometer and Digital Temperature Compensation circuitry (DTCXO) provides improved time-accuracy; achieved by measuring the temperature and calculating an expected correction value based on precise, factory-calibrated Crystal parameters. The compensation of the frequency 25 C and the Crystal s frequency-drift over the temperature range are obtained by adding or subtracting khz oscillator clock-pulses. Beyond standard RTC-functions like year, month, day, weekday, hours, minutes, seconds information, the offers highly versatile Alarm and Timer-Interrupt function, programmable Clock-Output and Voltage-Low-Detector and a Main-Supply to Backup-Battery Switchover Circuitry and a SPI interface. The CMOS IC contains thirty 8-bit RAM registers organized in 6 memory pages; the address counter is automatically incremented within the same memory page. All sixteen registers are designed as addressable 8-bit parallel registers, although, not all bits are implemented. Memory page # contains of five registers (memory address h and 4h) used as control registers Memory page # addresses 8h through Eh are used as counters for the clock function (seconds up to years). The Seconds, Minutes, Hours, Days, Weekdays, Months and Years registers are all coded in Binary-Coded-Decimal (BCD) format. When one of the RTC registers is read, the content of all counters is frozen to prevent faulty reading of the clock/calendar registers during a carry condition Memory page #2 addresses h through 6h define the alarm condition Memory page #3 addresses 8h and 9h are used for Timer function Memory page #4 address 2h provides the thermometer reading value Memory page #7 addresses 38h through 3Fh are available for user data Additionally, the CMOS-IC contains six non-volatile 8-bit EEPROM registers organized in 2 memory pages; the address counter is automatically incremented within the same memory page. EEPROM page #5 addresses 28h and 29h are available for EEPROM user data EEPROM page #6 contains of four registers (memory address 3h through 33h) used as non-volatile control registers. These registers contain the factory programmed parameters of the Crystal s thermal characteristics, the ambient temperature and the Thermometer s calibration values. In favour for the best time-accuracy, the factory programmed registers (memory address 3h through 33h) shall not be changed by the user without carefully studying its function 7/6

8 2.4. DEVICE PROTECTION DIAGRAM V DD CLKOE CLKOUT 2 9 SDI CE 3 8 V BACKUP SCL 4 7 INT SDO 5 6 V SS 8/6

9 3. REGISTER ORGANIZATION The registers are grouped into memory pages. The pages are addressed by the 5 most-significant-bits (MSB s bits 7 3), the 3 least-significant-bites (LSB s 2 ) select the registers within the addressed page. 3 RAM registers organized in 6 memory pages and 6 EEPROM registers organized in 2 memory pages are available. During interface access, the page address (MSB s 7-3) is fixed while the register address (LSB s 2 - ) are automatically incremented. The content of all counters and registers are frozen to prevent faulty reading of the clock/calendar registers during carry condition. The time registers in the Clock and Alarm pages are encoded in the Binary Coded Decimal format (BCD) to simplify application use. Other registers are either bit-wise or standard binary format. 3.. REGISTER OVERVIEW Address Page Address Bit 7-3 Bit 2 - Hex Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Control page Clock page Alarm page Timer page Temperature page h Control_ Clk/Int TD TD SROn EERE TAR TE WE h Control_INT X X X SRIE V2IE VIE TIE AIE 2h Control_INT Flag X X X SRF V2IF VIF TF AF 3h Control_Status EEbusy X PON SR V2F VF X X 4h Control_Reset X X X SysR X X X X 8h Seconds X h Minutes X Ah Hours X PM Bh Days X X Ch Weekdays X X X X X 4 2 Dh Months X X X Eh Years X h Second Alarm AE_S h Minute Alarm AE_M h Hour Alarm AE_H X 2-PM h Days Alarm AE_D X h Weekday Alarm AE_W X X X X 4 2 5h Months Alarm AE_M X X h Year Alarm AE_Y h Timer Low h Timer High h Temperature EEPROM User 28h EEPROM User 29h EEPROM User 2 bytes of EEPROM for user data EEPROM Control page 3h EEPROM Contr. R8k R2k R5k Rk FD FD ThE ThP 3h Xtal Offset sign h Xtal Coef h Xtal T X X RAM page 38h : : 3Fh User RAM 8 bytes of RAM for user data Bit positions labelled as X are not implemented and will return a when read. 9/6

10 3.2. CONTROL PAGE REGISTER FUNCTION CONTROL_ (address h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit h Control_ Clk/Int TD TD SROn EERE TAR TE WE Bit Symbol Value Description Reference Applies INT function on CLKOUT pin 7 Clk/Int See section 4.9. Applies CLKOUT function on CLKOUT pin 6 TD 5 TD Select Source Clock for internal Countdown Timer See section SROn 3 EERE 2 TAR TE WE Disables Self Recovery function Enables Self Recovery function Disables automatic EEPROM refresh every hour Enables automatic EEPROM refresh every hour Disables Countdown Timer auto-reload mode Enables Countdown Timer auto-reload mode Disables Countdown Timer Enables Countdown Timer Disables Hz Clock Source for Watch Enables Hz Clock Source for Watch See section 4.8. See section 4.3. See section 4.4. See section 4.4. See section CONTROL_INT (address h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit h Control_INT X X X SRIE V2IE VIE TIE AIE Bit Symbol Value Description Reference 7 to 5 unused X Unused Disables Self-Recovery INT 4 SRIE See section 4.8. Enables Self-Recovery INT Disables VLOW2 INT; Low Voltage 2 detection 3 V2IE See section Enables VLOW2 INT; Low Voltage 2 detection Disables VLOW INT; Low Voltage detection 2 VIE See section Enables VLOW INT; Low Voltage detection Disables Countdown Timer INT TIE See section Enables Countdown Timer INT Disables Alarm INT AIE See section Enables Alarm INT Bit positions labelled as X are not implemented and will return a when read. /6

11 CONTROL_INT FLAG (address 2h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 2h Control_INT Flag X X X SRF V2IF VIF TF AF Bit Symbol Value Description Reference 7 to 5 unused X Unused 4 SRF 3 V2IF 2 VIF TF AF Bit positions labelled as X are not implemented and will return a when read CONTROL_STATUS (address 3h bits description) No Self-Recovery Interrupt generated Self-Recovery Interrupt generated if possible deadlock is detected; clear flag to clear Interrupt No VLOW2 Interrupt generated VLOW2 Interrupt generated when supply voltage drops below VLOW2 threshold No VLOW Interrupt generated VLOW Interrupt generated when supply voltage drops below VLOW threshold No Timer Interrupt generated Timer Interrupt generated when Countdown Timer value reaches zero No Alarm Interrupt generated Alarm Interrupt generated when Time & Date matches Alarm setting See section 4.6. See section 4.6. See section 4.6. See section 4.6. See section 4.6. Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 3h Control_Status EEbusy X PON SR V2F VF X X Bit Symbol Value Description Reference EEPROM is not busy 7 EEbusy Flag is set when EEPROM page is busy due to See section 4.3. write or automatic EEPROM refresh in progress 6 unused X Unused 5 PON 4 SR 3 V2F 2 VF to unused X Unused No Power-On Reset executed Flag is set at Power-On, flag must be cleared by writing No Self-Recovery Reset or System Reset has been generated. Flag is set when Self-Recovery Reset or System Reset has been generated. No VLOW2 Interrupt generated VLOW2 Interrupt generated when supply voltage drops below VLOW2 threshold No VLOW Interrupt generated VLOW Interrupt generated when supply voltage drops below VLOW threshold See section 4.. See section See section 4.6. See section 4.6. Bit positions labelled as X are not implemented and will return a when read. /6

12 CONTROL_RESET (address 4h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 4h Control_Reset X X X SysR X X X X Bit Symbol Value Description Reference 7 to 5 unused X Unused 4 SysR 3 to unused X Unused No System Reset will be executed Set bit = triggers a System Reset. After the restart of the logic, the SysR will be cleared and in bit 4 SR in the register Control_Status will be set See section Bit positions labelled as X are not implemented and will return a when read WATCH PAGE REGISTER FUNCTION Watch Page registers are coded in the Binary Coded Decimal (BCD) format; BCD format is used to simplify application use SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS REGISTER Seconds (address 8h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 8h Seconds X Bit Symbol Value Description 7 X - Unused 6 to Seconds to 59 This register holds the current seconds coded in BCD format Minutes (address 9h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 9h Minutes X Bit Symbol Value Description 7 X - Unused 6 to Minutes to 59 This register holds the current minutes coded in BCD format Hours (address Ah bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Ah Hours X PM Bit Symbol Value Description 7 X - Unused 2 hour mode (AM/PM) PM Selects 24-hour mode Selects 2-hour (AM/PM) mode Indicates AM Indicates PM 4 to Hours ) to 2 This register holds the current hours coded in BCD format 24 hour mode Selects 24-hour mode Selects 2-hour AM/PM mode 5 to Hours ) to 23 This register holds the current hours coded in BCD format ) User is requested to pay attention setting valid data only. 2/6

13 Days (address Bh bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Bh Days X X Bit Symbol Value Description 7 to 6 X - Unused 5 to Days to 3 This register holds the current days coded in BCD format ) ) The RTC compensates for leap years by adding a 29 th day to February if the year counter contains a value which is exactly divisible by 4; including the year. Weekdays (address Ch bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Ch Weekdays X X X X X 4 2 Bit Symbol Value Description 7 to 3 X - Unused 2 to Weekdays to 7 This register holds the current weekdays coded in BCD format ) Weekdays ) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Sunday X X X X X Monday X X X X X Tuesday X X X X X Wednesday X X X X X Thursday X X X X X Friday X X X X X Saturday X X X X X ) These bits may be re-assigned by the user. Months (address Dh bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Dh Months X X X Bit Symbol Value Description 7 to 5 X - Unused 4 to Months to 2 This register holds the current months coded in BCD format ) Months Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit January X X X February X X X March X X X April X X X May X X X June X X X July X X X August X X X September X X X October X X X November X X X December X X X ) The RTC compensates for leap years by adding a 29 th day to February if the year counter contains a value which is exactly divisible by 4; including the year. 3/6

14 Years (address Eh bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Eh Years X Bit Symbol Value Description 7 X - Unused 6 to Years to 79 This register holds the current year 2xx coded in BCD format ) ) The RTC compensates for leap years by adding a 29 th day to February if the year counter contains a value which is exactly divisible by 4; including the year DATA FLOW OF TIME AND DATE FUNCTION Hz tick SECONDS MINUTES 2_24 hour mode HOURS LEAP YEAR CALCULATION DAYS WEEKDAY MONTHS YEARS 4/6

15 3.4. ALARM PAGE REGISTER FUNCTION The Alarm Page registers contain alarm information. When one or more of these registers are loaded with a valid second, minute, hour, day, weekday, month or year information and its corresponding alarm enable bit (AE_x) is logic, then that information will be compared with the current time / date information in the Watch Page registers. When all enabled comparisons first match (wired AND ) and the AIE Flag (bit in register Control_INT) is enabled, then the AF Flag (bit in register Control_INT) is set = and an Interrupt signal becomes available at INT pin. Disabled Alarm registers which have their corresponding bit AE_X at logic are ignored SECONDS, MINUTES, HOURS, DAYS, WEEKDAYS, MONTHS, YEARS ALARM REGISTER Alarm Seconds (address h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit h Second Alarm AE_S Bit Symbol Value Description 7 AE_S Second Alarm is disabled Second Alarm is enabled 6 to Seconds Alarm to 59 These bits hold the Second Alarm information coded in BCD format Alarm Minutes (address h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit h Minute Alarm AE_M Bit Symbol Value Description 7 AE_M Minute Alarm is disabled Minute Alarm is enabled 6 to Minutes Alarm to 59 These bits hold the Minute Alarm information coded in BCD format Alarm Hours (address 2h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 2h Hours Alarm AE_H X 2-PM Bit Symbol Value Description 7 AE_H Hour Alarm is disabled Hour Alarm is enabled 6 X - Unused 2 hour mode (AM/PM) Indicates AM 5 2-PM Indicates PM These registers hold the Hours Alarm information coded in BCD format 4 to Hours Alarm to 2 when in 2 hour mode 24 hour mode These registers hold the Hours Alarm information coded in BCD format 5 to Hours Alarm to 23 when in 24 hour mode 5/6

16 Alarm Days (address 3h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 3h Days Alarm AE_D X Bit Symbol Value Description Day Alarm is disabled 7 AE_D Day Alarm is enabled 6 X - Unused 5 to Days Alarm to 3 These registers hold the Day Alarm information coded in BCD Alarm Weekdays (address 4h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 4h Weekday Alarm AE_W X X X X 4 2 Bit Symbol Value Description Weekday Alarm is disabled 7 AE_W Weekday Alarm is enabled 6 to 3 X - Unused 2 to Weekday Alarm to 7 These registers hold the Weekday Alarm information coded in BCD Alarm Months (address 5h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 5h Months Alarm AE_M X X Bit Symbol Value Description Months Alarm is disabled 7 AE_M Months Alarm is enabled 6 to 5 X - Unused 4 to Months Alarm to 2 These registers hold the Months Alarm information coded in BCD Alarm Years (address 6h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 6h Year Alarm AE_Y Bit Symbol Value Description Year Alarm is disabled 7 AE_Y Year Alarm is enabled 6 to Year Alarm to 79 These registers hold the Year Alarm information coded in BCD 6/6

17 3.5. TIMER PAGE REGISTER FUNCTION The Timer Page contains 2 registers forming a 6-bit count down timer value. Countdown Timer Value (addresses 8h / 9h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 8h Timer Low h Timer High Address Symbol Value Description 8h Timer Low to 255 These bits hold the Low Countdown Timer Value in binary format 9h Timer High to 255 These bits hold the High Countdown Timer Value in binary format 3.6. TEMPERATURE PAGE REGISTER FUNCTION The Temperature Page register contains the result of the measured temperature ranging from -6 C (=d) to +9 C (=25d) with C corresponding to a content of =6d. During read / write access, the content of the register Temperature is frozen in a cache memory to prevent faulty reading. When the Thermometer is disabled by ThE = (bit in register EEPROM_Control), the register Temperature at address 2h can be externally written. Temperature Value (address 2h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 2h Temperature Address Symbol Value Description 2h Temperature -6 to +94 C 3.7. EEPROM DATA PAGE REGISTER FUNCTION These bits hold the Temperature Value coded in binary format The EEPROM Data Page contains 2 non-volatile EEPROM registers for user s application. Please see section 4.3 EEPROM MEMORY ACCESS for detailed instructions how to handle EEPROM read / write access. User EEPROM Data Registers (addresses 28h / 29h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 28h EEPROM User h EEPROM User Address Symbol Value Description 28h EEPROM User to h EEPROM User to 255 EEPROM User Data (2 Bytes) 7/6

18 3.8. EEPROM CONTROL PAGE REGISTER FUNCTION The EEPROM Control Page contains 4 non-volatile EEPROM registers. With Register EEPROM Control, the settings for Trickle-Charger (bit 7-4), the CLKOUT frequency (bit 3&2) and the Thermometer (bit &) can be controlled. The registers XTAL Offset, XTAL Coef and XTAL T contain the factory calibrated, individual crystal parameters to compensate the frequency deviation over the temperature range. Please see section 4.3 EEPROM MEMORY ACCESS for detailed instructions how to handle EEPROM read / write access EEPROM CONTROL (address 3h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 3h EEPROM Control R8k R2k R5k Rk FD FD ThE ThP Bit Symbol Value Description Reference 7 R8k 6 R2k 5 R5k 4 Rk Disables 8 kώ trickle charge resistor Enables 8 kώ trickle charge resistor Disables 2 kώ trickle charge resistor Enables 2 kώ trickle charge resistor Disables 5 kώ trickle charge resistor Enables 5 kώ trickle charge resistor Disables.5 kώ trickle charge resistor Enables.5 kώ trickle charge resistor See section FD 2 FD Selects Clock Frequency at CLKOUT pin See section 4.9. ThE ThP Disables Thermometer Enables Thermometer Set Temperature Scanning Interval: second Set Temperature Scanning Interval: 6 seconds See section See section XTAL OFFSET (address 3h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 3h XTAL Offset sign Bit Symbol Value Description Reference - Deviation (slower) of kHz frequency at T 7 Sign + Deviation (faster) of kHz frequency at T 6 to XTAL Offset ) to 2 Frequency Offset Compensation value See section ) The XTAL Offset register value is factory programmed according to the crystal s initial frequency-tolerance. For best time-accuracy, the content of this register must not be changed by the user XTAL TEMPERATUR COEFFICIENT (address 32h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 32h XTAL Coef Bit Symbol Value Description Reference 7 to XTAL Coef ) to 255 Quadratic Coefficient of XTAL s Temperature Drift See section ) The XTAL Coef register value is factory programmed according to the crystal parameters over temperature. For best time-accuracy, the content of this register must not be changed by the user. 8/6

19 XTAL TURNOVER TEMPERATUR COEFFICIENT T (address 33h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 33h XTAL T x x Bit Symbol Value Description Reference 7 to 6 x - Unused 5 to XTAL T ) 4 to 67 XTAL s Turnover Temperature in C See section ) The XTAL T register value is factory programmed according to the crystal parameters over temperature. For best time-accuracy, the content of this register must not be changed by the user RAM DATA PAGE REGISTER FUNCTION The RAM Data Page contains 8 RAM registers for user s application. User RAM Data Registers (addresses 38h to 3Fh bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 38h RAM User Fh RAM User Address Symbol Value Description 38h RAM User to RAM User Data (8 Bytes) 3Fh RAM User to 255 9/6

20 4. DETAILED FUNCTIONAL DESCRIPTION 4.. POWER-UP, POWER MANAGEMENT AND BATTERY SWITCHOVER The has two power supply pins: V DD the main power supply input pin V BACKUP the backup battery input pin The has multiple power management function implemented: Automatic switchover function between main power supply and backup supply voltage. The higher supply voltage is selected automatically, with a switchover hysteresis of 2mV Low supply voltage detection V LOW and V LOW2 with the possibility to generate an INT if the corresponding control bits are enabled Functions requiring a minimum supply voltage are automatically disabled if low supply voltage is detected Interface and CLKOUT are automatically disabled when the device operates in backup supply mode Programmable trickle charge circuitry to charge backup battery or supercap Backup Switchover Circuitry Disables non-used Functions V DD Power Supply V BAT VDD V BAT 2mV 2 Battery switchover V BAT V DD Operating on VDD Operating on VBACKUP Operating on VDD I 2 C Interface Enabled Disabled Enabled CLKOUT Enabled Disabled Enabled INT Enabled Enabled Enabled Trickle Charge Enabled Disabled Enabled Trickle charge circuitry is enabled by software when selecting trickle-charge resistors. When back-up supply switchover-circuitry switches to the backup supply voltage, trickle charge function is disabled. The implemented backup switchover circuitry continuously compares V DD and V BACKUP voltages and connects the higher of them to the internal supply voltage V INT. The switchover hysteresis from V DD to V BACKUP and vice versa is typically 2mV. When the device is operating at the V BACKUP supply voltage, non-used RTC functions are disabled to ensure optimized power consumption: SPI interface Disabled when operating in V BACKUP mode CLKOUT Disabled when operating in V BACKUP mode INT Enabled even when operating in V BACKUP mode Trickle Charge Disabled when operating in V BACKUP mode 2/6

21 4... POWER UP SEQUENCE The device can be either powered up from main supply V DD or from backup supply V BACKUP. During power-up, the chip is executing the following power-up procedure: The implemented battery switchover circuitry compares V DD and V BACKUP voltages and connects the higher of them to supply the chip At power-up, the chip is kept in Reset state until the supply voltage reaches an internal threshold level. Once the supply voltage is higher than this threshold level, a Reset is executed and registers are loaded with the Register Reset Values described in section REGISTER RESET VALUES After the Reset is executed and registers are loaded with the Register Reset Values, PON is set = (bit 5 in Register Control-Status), it needs to be cleared by writing = Once the supply voltage reaches the oscillator start-up voltage, the oscillator-circuitry starts the khz tuning-fork Crystal typically within 5 ms Once the khz clocks are present, the Voltage Detector starts in fast mode to monitor the supply voltage, the accelerated scanning of the supply voltage will slightly increase the current consumption. When a supply voltage >V LOW2 is detected, the fast mode voltage detection is stopped, and the EEPROM read is enabled Configuration registers are loaded with the configuration data read from the EEPROM Control Page and the bits V LOW and V LOW2 are reset = If the Thermometer is enabled by ThE = (bit in register EEPROM_Control), the temperature is measured and the frequency compensation value for time correction is calculated The becomes fully functional; the correct Time / Date information needs to be loaded into the corresponding registers and bit 5 PON in Register Control-Status needs to be cleared by writing Note : During power up, the Low Voltage Detection is monitoring the supply voltage at an accelerated scan rate increasing the current consumption of the device. Once power supply voltage exceed V LOW2 threshold, the flags V LOW and V LOW2 are cleared automatically and the scan rate for the low voltage detection is set to second to ensure optimized power consumption. In case of a slow Power Supply Voltage V DD establishment, the flags V LOW and/or V LOW2 are not cleared and the thermometer may be still frozen at value = h. These flags must be cleared to de-freeze the thermometer and activate the temperature compensation. Note 2: Please not the different meaning of the PON ; V LOW and V LOW2 Flags: PON PON Flag is set after Power-Up Reset is executed Indicating that time & date information are corrupted V LOW V LOW Flag is set when supply voltage drops below V LOW threshold Indicating that the Thermometer might have been disabled due to low supply voltage and the temperature compensation was operating for a while with the last temperature reading causing bigger time-deviation V LOW2 V LOW2 Flag is set when supply voltage drops below V LOW2 threshold Indicating a risk that the khz might have stopped due to low supply voltage and that the time & date information might be corrupted 2/6

22 Example Power Up sequence, Low Voltage detection and Backup Supply switchover V DD Power Supply Voltage 5. V 4. V 3. V 2. V. V V LOW 2. V V LOW 2.3 V V V BAT Battery switchover when V DD < (V BAT - 5mV) VBAT VDD PON Flag set at power-up V LOW Flag set when supply voltage < V low V LOW 2 -flag set when supply voltage < V low Power Up Reset is executed; registers are loaded with Reset Values. PON flag is set at Power up indicating that time / date information likely are corrupted. Low voltage detection flags V LOW and V LOW2 are automatically cleared, excepted while a too slow establishment of Power Supply Voltage V DD. In this case, these flags may have to be cleared to activate the temperature compensation. PON Flag needs to be cleared by software writing. Trickle charge circuitry for backup battery can be enabled by software. Switchover to the backup supply voltage when V DD drops below V DD < (V BAT 2mV). Low voltage detection sets V LOW Flag when supply voltage drops V LOW threshold. Low voltage detection sets V LOW2 Flag when supply voltage drops V LOW2 threshold. Switchback from backup supply voltage to main supply voltage when V DD rise above V DD > (V BAT + 2mV). V LOW and V LOW2 Flags need to be cleared by software writing SUPPLY VOLTAGE OPERATING RANGE AND LOW VOLTAGE DETECTION The has built-in low supply voltage detection which periodically monitors supply voltage levels vs. V LOW and V LOW2 thresholds. If low supply voltage is detected, the corresponding flags V LOW and V LOW2 are set =. Device functions critical to low supply voltage are disabled. During power up, the Low Voltage Detection is monitoring the supply voltage at an accelerated scan rate. If power supply voltage exceed V LOW2 threshold, the flags V LOW and V LOW2 are cleared automatically and the scan rate for the low voltage detection is set to second. In case of a slow Power Supply Voltage V DD establishment, the flags V LOW and/or V LOW2 are not automatically cleared and the thermometer is still frozen at value = h. These flags must be cleared to unfreeze the thermometer and activate the temperature compensation. 22/6

23 Minimum Supply Voltage and Low Voltage Detection V DD Supply Voltage Timekeeping Function Temperature Compensation / Thermometer I 2 C Interface Function EEPROM Function 5.5 V 5. V 4. V 3. V V DD max 5.5 V Fully Operating Timekeeping not guaranteed Temperature Compensation Operating Thermometer active Thermometer inactive, last value frozen Interface active Interface active with reduced speed EEPROM Read EEPROM Write 2. V V LOW 2. V V PROG 2.2 V. V V LOW 2.3 V V At first power-up, the supply voltage has to exceed V LOW threshold to enable and correctly setup all function of the device. Timekeeping Function: Keeping track of Time & Date depends on the kHz oscillator operates safely over the specified temperature range. Timekeeping function is guaranteed for a supply voltage down to V LOW2 threshold, below this voltage the kHz oscillator may stop and the time & date information might be corrupted. Temperature Compensation: The Frequency Compensation Unit FCU operates with supply voltages down to V LOW2 threshold. The Thermometer requires a supply voltage of V LOW threshold. Supply voltages below V LOW threshold will automatically disable the Thermometer; the last correct temperature reading is frozen in the register Temperature. The Frequency Compensation Unit continues to operate with the last temperature-reading down to a supply voltage V LOW2 threshold. To unfreeze the Thermometer, V LOW /V LOW2 flags must be cleared and the device requires a minimum supply voltage of 2.V. SPI interface: The SPI interface operates with max. SCL clock rate down to a supply voltage of V LOW threshold. Between V LOW and V LOW2 threshold, the interface still operates at reduced SCL clock rate. EEPROM read / write access: EEPROM read access is possible down to a supply voltage of V LOW2 threshold. EEPROM write cycle requires a minimum supply voltage of V PROG of 2.2V. 23/6

24 4.2. RESET A Reset can be initiated by 3 different ways: Power On Reset (automatically initiated at power-up) Software Reset (can be initiated by software) Self-Recovery System Reset (automatically initiated if enabled by Software and possible deadlock is detected) POWER-UP RESET, SYSTEM RESET AND SELF-RECOVERY RESET Power On Reset: A Reset is automatically generated at Power On. After Power On Reset has been executed, bit 5 PON in Register Control_Status is set =, it needs to be cleared by writing =. System Reset: A Software Reset can be initiated when the System-Reset command SysR is set = (bit 4 in Register Control_Reset). If a System-Reset is executed, the SR Flag (bit 4 in Register Control_Status) is set =, needs to be cleared by writing =. It is generally recommended to make a System Reset by Software after power-up. Note: Please consider the Register Reset Values shown in section After a Reset has been executed, Self- Recovery System SROn (bit 4 in Register Control_) is set = and Self-Recovery INT Enable SRIE (bit 4 in Register Control_INT) is set =. Self-Recovery System Reset: A Self-Recovery System Reset will be automatically initiated when the Self-Recovery function is enabled by bit 4 SROn in Register Control_ is set and internally a possible deadlock-state is detected. If a Self-Recovery System Reset is executed, the bit 4 SR in Register Control_Status is set and need to be cleared by writing. After a Self-Recovery System Reset is executed and Register Reset Values were written, bit 4 SRF in Register Control_INT Flag is set and needs to be cleared by writing. In case of a Self Recovery System Reset is executed, an Interrupt is available if Self-Recovery-INT function is Enabled by bit 4 SRIE in Register Control_INT is set. The purpose of the Self Recovery function is to generate an internal System Reset in case the on-chip state machine goes into a deadlock. The function is based on an internal counter that is periodically reset by the control logic. If the counter is not reset on time, a possible deadlock is detected and a System Reset will be triggered. The System Reset is executed latest after 2 temperature- or voltage-monitoring periods defined in Thermometer Period bit ThP in Register EEPROM Control, i.e. latest after 2 or 32 seconds. Note: Please consider the Register Reset Values shown in section After a Reset has been executed, Self- Recovery System bit 4 SROn in Register Control_ = and Self-Recovery INT Enable SRIE in Register Control_INT =. 24/6

25 REGISTER RESET VALUES Address Page Address Bit 7-3 Bit 2 - Hex Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit Control page Clock page Alarm page Timer page Temperature page h Control_ h Control_INT h Control_INT Flag ) 3h Control_Status EEbusy X 2) 3) X X X X 4h Control_Reset h Seconds - X X X X X X X 9h Minutes - X X X X X X X Ah Hours - X X X X X X X Bh Days - - X X X X X X Ch Weekdays X X X Dh Months X X X X X Eh Years - X X X X X X X h Second Alarm AE_S X X X X X X X h Minute Alarm AE_M X X X X X X X 2h Hour Alarm AE_H X X X X X X X 3h Days Alarm AE_D - X X X X X X 4h Weekday Alarm AE_W X X X 5h Months Alarm AE_M - - X X X X X 6h Year Alarm AE_Y X X X X X X X 8h Timer Low X X X X X X X X 9h Timer High X X X X X X X X 2h Temperature X X X X X X X X EEPROM User 28h EEPROM User 29h EEPROM User 2 bytes of EEPROM for user data EEPROM Control page 3h EEPROM Contr. 4) 4) 4) 4) 4) 4) 4) 4) 3h Xtal Offset Factory setting: Xtal frequency deviation 32h Xtal Coef Factory setting: Xtal temperature coefficient 33h Xtal T - - Factory setting: Xtal T temperature RAM page 38h : : 3Fh User RAM 8 bytes of RAM for user data bits labelled as are not implemented. X bits labelled as X are undefined at power-up and unchanged by subsequent resets. ) SRF flag (bit 4 in register Control_INT Flag) will be set = after a Self Recovery System Reset was executed. 2) PON flag (bit 5 in register Control_Status) will be set = after a Power On Reset was executed. 3) SR flag (bit 4 in register Control_Status) will be set = after a System or Self recovery Reset was executed. 4) EEPROM Control default data are set by factory; data might be reprogrammed by customer and will remain unchanged during power down or any Reset executed. 25/6

26 After Reset, the following mode is entered: - CLKOUT is selected at CLKOUT pin; the default frequency is defined in register EEPROM Control and is the preset value by factory ( khz) or the frequency previously reprogrammed by customer. - Timer and Timer Auto-Reload mode are disabled; Timer Source Clock frequency is set to 32Hz - Self Recovery function is enabled - Automatic EEPROM Refresh every hour is enabled - 24 hour mode is selected, no Alarm is set - All Interrupts are disabled - At Power-On Reset, PON Flag is set = and has to be cleared by writing = - At Self-Recovery Reset or System Reset, SR Flag is set = and has to be cleared by writing =. 26/6

27 4.3. EEPROM MEMORY ACCESS The EEPROM Memory has a built-in automatic EEPROM Refresh function, controlled by EERE (bit 3 in register Control_). If enabled, this function automatically refreshes the content of the EEPROM Memory Pages once an hour. The EEbusy will be set = (bit 7 in register Control_Status) if the EEPROM Memory Pages are busy due to write or automatic refresh cycle is in progress. EEbusy goes = when writing is finished, EEPROM Memory Pages shall only be accessed when not busy, i.e. when EEbusy =. A special EEPROM access procedure is required preventing access collision between the internal automatic EEPROM refresh cycle and external read / write access through interface. Set EERE = Automatic EEPROM Refresh needs to be disabled before EEPROM access. Check for EEbusy = Access EEPROM only if not busy Set EERE = It is recommended to enable Automatic EEPROM Refresh at the end of read / write access Write EEPROM Allow ms wait-time after each written EEPROM register before checking for EEbusy = to allow internal data transfer Read access: Write access: Clear EERE Disable automatic EEPROM refresh Clear EERE Disable automatic EEPROM refresh No EEbusy =? Check if EEPROM is busy? No EEbusy =? Check if EEPROM is busy? Yes Yes Read EEPROM EEPROM read access is permitted Write EEPROM EEPROM write access is permitted Yes Next read? Wait ms Wait ms to allow internal EEPROM write No Set EERE = Enable automatic EEPROM refresh No EEbusy =? Wait until previous write cycle is finished Yes Yes Next write? No Set EERE = Enable automatic EEPROM refresh Note: A minimum power supply voltage of V PROG = 2.2V is required during the whole EEPROM write procedure; i.e. until EEbusy =. 27/6

28 4.4. TIMER FUNCTION The offers different Alarm and Timer functions which allow simply generating highly versatile timingfunctions. The Countdown Timer is controlled by the register Control_. Bit TE enables the Timer function; bits 5 & 6 TD and TD determine one of 4 Timer Source Clock frequencies (32 Hz, 8 Hz, Hz, or.5hz). The Timer counts down from a software-loaded 6-bit binary value,n, Timer Low (bit -7 at address 8h) and Timer High (bit -7 at address 9h). Values, n from to are valid; loading the counter with,n = effectively stops the timer. The end of every Timer countdown is achieved when the Timer Counter value,n reaches =. Countdown Timer can be set in Automatic Reload mode by TAR = (bit 2 of register Control_), the counter automatically re-loads Timer countdown value, n and starts the next Timer period. Automatic reload of the countdown value,n requires additional timer source clock. This additional timer source clock has no effect on the first Timer period, but it has to be taken into account since it results in a Timer duration of,n+ for subsequent timer periods. The generation of Interrupts from the Countdown Timer function is enabled by TIE = (bit in register Control_INT). If Timer Interrupt is enabled by TIE =, the Timer Flag TF (bit in register Control_INT Flag) will be set = at the end of every Timer countdown. The Interrupt signal INT follows the condition of Timer Flag TF (bit in register Control_INT Flag), the INT signal can be cleared by clearing the TF =. Control of the Countdown Timer Functions (address h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit h Control_ Clk/Int TD TD SROn EERE TAR TE WE Bit Symbol Value Description 6 TD 5 TD 2 TAR TE Timer Source Clock Frequency: 32 Hz Timer Source Clock Frequency: 8 Hz Timer Source Clock Frequency: Hz Timer Source Clock Frequency :.5 Hz Disables Countdown Timer Auto-Reload mode Enables Countdown Timer Auto-Reload mode Disables Countdown Timer Enables Countdown Timer The Timer Source Clock Frequency TD & TD and the Timer Auto Reload mode TAR can only be written when the Timer is stopped by TE = (bit in register Control_). The Countdown Timer values in Timer Low and Timer High can only be written when the Timer is stopped by TE = and Timer Auto Reload mode is disabled TAR =. Register Countdown Timer (addresses 8h / 9h bits description) Register 8h is loaded with the low byte of the 6-bit Countdown Timer value,n Register 9h is loaded with the high byte of the 6-bit Countdown Timer value,n Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit 8h Timer Low h Timer High Bit Symbol Value Description Countdown value = n 8h Timer Low xx to xxff Countdown period n 9h Timer High xx to FFxx Source ClockFrequency 28/6

29 Example Countdown Timer function with Timer in Auto Reload mode In this example, the Countdown Timer is set to Automatic Reload Mode, the Countdown Timer value is set = 3. Automatic reload of the countdown value,n requires additional Timer Source Clock. This additional timer source clock has no effect on the first Timer period but it has to be taken into account since it results in a Timer duration of,n+ for subsequent timer periods. The Interrupt signal (INT ) is cleared by clearing the Timer Flag TF =. TE TAR Timer Source Clock Frequency TD / TD Countdown Timer Value XX 3 2 Auto Reload Auto 3 2 Reload 3 2 TF INT TSC n TSC n n Timer Source Clock Frequency TD / TD can only be modified when Timer is disabled TE = Countdown Timer value,n in Timer Low and Timer High only can be modified when Timer TE = and Timer Auto Reload TAR = are both disabled. Duration of first Timer Period n Source ClockFrequency The additional timer source clock for automatic reload of the countdown Timer value,n has no effect on the first Timer Period. Timer Automatic Reload mode TAR requires one Timer Source Clock period for automatic reload of the Countdown Timer value,n. To reset Interrupt signal ( INT ), Timer Flag TF has to be cleared by writing =. When Countdown Timer is in automatic reload mode, one additional timer source clock has to be taken into account since it results in a Timer duration of,n+ for subsequent timer periods. 29/6

30 4.4.. TIMER INTERRUT The generation of Interrupts from the Countdown Timer function is enabled by TIE = (bit in register Control_INT). If Timer Interrupt is enabled by TIE =, the Timer Flag TF (bit in register Control_INT Flag) will be set = at the end of every Timer countdown. The Interrupt signal INT follows the condition of Timer Flag TF (bit in register Control_INT Flag), the Timer Flag TF and the Interrupt signal (INT ) remain set until cleared by software writing TF =. Timer Interrupt Control (addresses h / 2h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit h Control_INT X X X SRIE V2IE VIE TIE AIE bit TIE TF is disabled, no Timer Interrupt generated TF is enabled, Timer Interrupt generated when Countdown Timer value reaches zero and TF is set 2h Control_INT Flag X X X SRF V2IF VIF TF AF bit TF No Timer Interrupt generated Timer Flag is set when TIE is enabled and Countdown Timer value reaches zero, TF needs to be cleared to clear INT Bit positions labelled as X are not implemented and will return a when read. 3/6

31 Micro Crystal 4.5. ALARM FUNCTION Every Alarm Register in Alarm Page can be individually enabled by setting bit 7 (AE_x) =. Disabled alarm registers which have their bit AE_x at logic = are ignored. When one or more of these registers are loaded with a valid second, minute, hour, day, weekday, month or year information and its corresponding alarm enable bit (AE_x) is logic =, then that information will be compared with the current time / date information in Watch Page registers. Alarm function Blockdiagram check now signal SECOND AEN SECOND ALARM SECOND TIME = MINUTE AEN MINUTE ALARM MINUTE TIME = HOUR AEN HOUR ALARM HOUR TIME = AIE DAY AEN DAY ALARM DAY TIME = WEEKDAY AEN & AF INT to reset INT, clear AF by writting = WEEKDAY ALARM WEEKDAY TIME = MONTH AEN MONTH ALARM MONTH TIME = YEAR AEN YEAR ALARM YEAR TIME = 3/6

32 4.5.. ALARM INTERRUPT The generation of Interrupts from the Alarm function is enabled by AIE = (bit in register Control_INT). When all enabled Alarm comparisons first match (wired AND ) and the Alarm Interrupt is enabled by, the Alarm Flag AF (bit in Register Control_INT Flag) is set to logic =. The Interrupt signal (INT ) follows the condition of AF. The Interrupt signal INT follows the condition of Alarm Flag AF (bit in register Control_INT Flag), The Alarm Flag AF and the Interrupt signal ( INT ) remain set until cleared by software writing AF =. Once bit AF has been cleared, it will only be set again when the time increments and matches the alarm condition once more. Alarm Interrupt Control (addresses h / 2h bits description) Address Function Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Bit h Control_INT X X X SRIE V2IE VIE TIE AIE AIE AF is disabled, no Alarm Interrupt generated AF is enabled, AF is set and Alarm Interrupt generated when all enabled Alarm comparisons first match 2h Control_INT Flag X X X SRF V2IF VIF TF AF AF No Alarm Interrupt generated Alarm Flag is set when all enabled Alarm comparisons first match, needs to be cleared to clear INT Bit positions labelled as X are not implemented and will return a when read. Example for Alarm Flag and Alarm INT MINUTE AEN Example where Minute Alarm Example is enabled when and using set the to minute 45 and alarm no and other no other Alarm interrupts is enabled. are If bit AIE is enabled, the INT pin follows the condition of bit AF in register Control_INT Flag at address 2h. HOUR AEN minutes counter DAY AEN set alarm flag, AF minute alarm 45 AF WEEKDAY AEN INT when AIE = 32/6