L1 Trigger Activities at UF. The CMS Level-1 1 Trigger

Transcription

1 L1 Trigger Activities at UF Current team: Darin Acosta (PI) Alex Madorsky (engineer) Lev Uvarov (PNPI engineer) Victor Golovtsov (PNPI engineer) Daniel Holmes (postdoc, CERN-based) Bobby Scurlock (grad student) Khristian Kotov (grad student) Tim Jones (grad student) Lindsey Gray (undergrad) Brett Jackson (undergrad) Mingshui Chen, and Beijang Liu (IHEP grad students, CERN-based) The CMS Level-1 1 Trigger Reduces data rate from 40 MHz to 100 khz Suppress background 400X while keeping high P T physics Requires custom electronic hardware, some of which must be radiation hard Only the muon and calorimeter systems participate Select muons, electrons, photons, jets, and neutrinos (missing transverse energy) Silicon tracker data is unavailable until the High-Level Trigger Significant handicap compared to the Tevatron expts. Many important signatures involve muons H ZZ 4µ, H WW 2µ, SUSY di-leptons, In fact, a B-physics program is possible only because of the low P T thresholds expected for the muon triggers 2

2 Level-1 1 Trigger Scheme electrons, photons, jets, MET 3< η <5 η <3 η <3 η < < η <2.4 η <1.2 muons Algorithms are pipelined at 40 MHz for deadtime-free operation Total decision latency: 3.2 µs 3 Muon Trigger Geometry RPC: resistive plate chamber system CSC: cathode strip chamber system DT: drift-tube system Initial coverage of RPC is staged to η<1.6 Initial coverage of CSC 1 st station is staged to η<2.1 4

3 CSC Muon Trigger Scheme EMU On-Chamber Trigger Primitives Strip FE cards FE FE LCT Wire LCT card Wire FE cards RAT RPC-ALCT Transition card Trigger Motherboard (UCLA) LCT TMB Muon Port Card (Rice) MPC 2µ / chamber Peripheral crates (60) RPC 4µ TriDAS 3-D Track-Finding and Measurement Sector Receiver/ Processor (U. Florida) OPTICAL 3µ / port card TF crate(1) DT 4µ SR/SP 3µ / sector CSC Muon Sorter (Rice) 4µ SP 5 Global µ Trigger 4µ Global L1 CSC Local Charged Track Trigger Cathode strips Layers Muon Track Strips ~1 mm position resolution Comparator Bits Charges 6 layers for robustness against random gamma hits Efficiency to get the right bunch crossing (at the optimal phase) is >98.5% RealOne Player.lnk Efficiency (%) Anode Wire Group Hits Muon track Wire group hit Muon time (ns) Bunch ID and AL Hit Layers N bx: N 2 e.g. early n/γ hit A N Time (b 6

4 CSC Track-Finder Muon Track-Finding: Link local track segments into distinct 3D tracks Pointing requirement to vertex ϕ θ Measure p T, ϕ, and η of the muon candidates in the non-uniform fringe field in the endcap iron Send highest quality candidates to Global Trigger 7 CSC Track-Finder Board (1 of 12) Second-generation prototype Gb/s optical link connections from CSC electronics (3 GB/s!) Crystal oscillator & PLL clock patch added to clean incoming TTC clock Memories for data conversion (~64MB) 16 layers 8

5 From SP2000 Track-Finder Evolution to SP2002 mezzanine card Performs 3-D track-finding logic and p T measurement Test results documented in NIM A496 (2003) 64 9 Xilinx FPGA 800 User I/O 4 Million Logic Gates ~100 billion operations/sec CSC LHC Time-Structured Beam µ/π 25ns To be part of Bobby Scurlock s thesis, and Note in works by Khristian Kotov CERN, 2003 Goals: and further in ) Verify that CSC electronics are ready for production 2) Complete an electronic chain test of data transmission from CSC front-end electronics to Track-Finder, all operating synchronously with an LHC-like 40 MHz structured beam 3) Demonstrate self-triggering 10

6 Full Crate Tests Test of complete system took place at Rice University Final system works! All specs met, including overall latency Ready for data at CERN 11 CSC Slice SX5 Commissioning of one 60 slice of an endcap using full DAQ path and final software has been underway 2 peripheral crates Track-Finder provides trigger for tests (hard to install that much scintillator anyway!) 12

7 Tracker-Finder at Slice Test John Yelton? (UF) Dan Holmes (UF) Green Barracks control room Have routinely provided a cosmic trigger for the Slice Test since June 05 Gearing up for CMS Magnet Test and Cosmic Data Challenge 13 Multi-ring event at slice test Multi-ring evt from a trigger taken at the slice test as part of global DAQ run 3/3/06 Involves ME2/1 ME3/2 Track in direction of CMS IP. (ie not coming in from Jura side of ME+) ME2/1 ME3/2 visualization depended on all CMSSW unpacking + Digi code + geometry working right this was from real CSC TF readout L1 code is appearing in CMSSW. Lindsey Gray 14

8 Other Operations at CERN Trigger electronics integration at Bat.904 Khristian Kotov (UF) Mingshui Chen and Beijang Liu (IHEP, China) 15 Future Work Hardware tests (MTCC, DT interface, DAQ interface, etc.): Dan Holmes coordinates, with engineers, Khristian, and IHEP students assisting Online Software (for config, control, and monitoring): Trigger Supervisor development by Dan Holmes Database interface by Khristian Kotov DQM by Khristian Kotov All ongoing. Tim Jones getting integrated CMSSW: Porting of L1 emulation code from ORCA to CMSSW well underway with help from Lindsey Gray Unpacking code for latest data format by Lindsey Gray and Khristian Kotov Data analysis: In-situ efficiency determination, timing, etc. by students this summer hopefully and anyone else interested! Algorithm improvements: Several things sitting on back-burner because of low priority (beam halo trigger, TeV muon shower recovery, ) Future SLHC trigger: 16

9 Prelim. Conclusions on CSC for SLHC Paul Padley, SLHC workshop April 06 Will probably want to upgrade front-end trigger boards and optical links to send LCT new frequency AFEB - no problem CFEB - looks good, ME1/A?, more studies needed ALCT - no problem at 25 ns, redesign for new timing Might be able to just replace fpga CCB clock distribution will be different, this board will change DMB, TMB probably want to change? MPC is choke point, almost certainly replace, and also replace subsequent trigger All of the above presumes 80MHz. It was an essential element of the studies of the front end electronics reported in earlier talks that leads to the above conclusions. 17 R&D Investigate ME 4/2 production options Place spare chambers and electronics on fourth station (use as hot spares) to allow us to study them under LHC conditions Need to investigate backplane and data link transmission technologies It took many years to get to where we are now with the system We must anticipate a similar R&D and prototyping cycle for the EMU and TRIDAS trigger path. Its already late we had better get started Track-finder work began 8 years ago, < 8 years to SLHC in fact we have, Mike Matveev (Rice) studied link technology UF: asynchronous L1 trigger design under study Also, a L1 Track trigger needed! (bring silicon into L1) 18

10 Inclusion of Muon Data with Tracker It would be extremely desirable to include tracker data at Level-1 Note limited rejection power (slope) without tracker information 19