IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 2, MAY

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1 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 2, MAY Waveform Relaxation Techniques for Simulation of Coupled Interconnects With Frequency-Dependent Parameters Natalie Nakhla, Student Member, IEEE, Albert E. Ruehli, Life Fellow, IEEE, Michel S. Nakhla, Fellow, IEEE, Ram Achar, Senior Member, IEEE, and Changzhong Chen Abstract The large number of coupled lines in an interconnect structure is a serious limiting factor in simulating high-speed circuits. Waveform relaxation based on transverse partitioning has been previously presented to address this problem for interconnects with constant per-unit-length parameters. This paper extends the waveform relaxation technique to handle the more difficult and important case of frequency-dependent parameters. The computational cost of the proposed algorithm grows linearly with the number of coupled lines. Index Terms Frequency-dependent parameters, high-speed interconnects, macromodeling, parallel processing, transverse partitioning, waveform relaxation. I. O INTRODUCTION NE of the major difficulties in the simulation of highspeed interconnect circuits is the fact that distributed interconnect models do not have a direct representation in the time-domain. As a result, they are best represented in the frequency-domain. On the other hand, nonlinear devices such as drivers and receivers can only be described in the time-domain. Several methods have been proposed in the literature to address this mixed frequency/time representation [1] [5]. The common goal of these techniques is the transformation of the Telegrapher s equations describing the transmission lines, into a set of coupled ordinary differential equations with appropriate timedelayed controlled sources that can be integrated with circuit simulators. This coupling is one of the major reasons for the high computational cost associated with simulating large multiconductor structures (for example an on-chip bus with 256 coupled lines). It was shown in [6] that the average cost of simulating an coupled line circuit is proportional to ; where. This results in a prohibitively time-consuming simulation task compared to the simple case of simulating a single line. In an attempt to address these issues, the conventional relaxation methods [7] [9] applied waveform relaxation (WR) [10] [14] to interconnect circuits using the physically natural longitudinal partitioning. Using these approaches, the input circuit and the output circuit of the multiconductor transmission Manuscript received March 28, 2006; revised December 10, N. Nakhla, M. Nakhla, R. Achar, and C. Chen are with the Department of Electronics, Carleton University, Ottawa, ON, K1S 5B6, Canada ( nnakhla@doe.carleton.ca; msn@doe.carleton.ca; achar@doe.carleton.ca; cchen@doe.carleton.ca). A. Ruehli is with IBM T. J. Watson Research Center, Yorktown Heights, NY USA ( ruehli@us.ibm.com). Digital Object Identifier /TADVP Fig. 1. Transverse decoupling of the coupled multiconductor transmission lines. line system interface are partitioned into smaller subcircuits, in the longitudinal direction. However, in order to obtain fast convergence, it is necessary to partition the circuit in such a way that the coupling among individual subcircuits is weak. Consequently, the success of these algorithms was limited due to the relatively strong coupling between the individual subcircuits. In [6], a new method was presented to address the computational complexity of time-domain simulation of large coupled interconnects. The proposed algorithm is based on WR using transverse partitioning (TP), where the multiconductor transmission line system is partitioned in the transverse direction, exploiting the relatively weak coupling between individual traces. In this case, the coupled line circuit is partitioned into or fewer independent subcircuits, where the number of lines in each subcircuit could be as low as one. The coupling effects due to the neighboring lines are represented by voltages/current sources within the subcircuits (Fig. 1). A relaxation-based algorithm is used to iterate between the subcircuits until convergence is achieved. In general, very few iterations are required due to the relatively weak coupling between individual subcircuits. The waveform relaxation with transverse partitioning (WR-TP) algorithm reduces the coupled simulation problem into a series of simulation steps, where the complexity of each step is approximately equivalent to that of simulating a single line. It was also demonstrated in [6] that using the WR-TP technique, the central processing unit (CPU) cost increases almost linearly with the number of lines, providing a significant speedup as compared to conventional methods. In addition, the algorithm /$ IEEE

2 258 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 2, MAY 2007 is highly suitable for parallel implementation since the simulation of individual subcircuits can be performed simultaneously. Furthermore, in the proposed WR-TP method, the interprocessor communication CPU time is minimized, due to the fact that the processors only communicate after the coupling waveforms have been computed. This fact makes the proposed WR method more efficient for parallel processing compared to single time point relaxation techniques, where communication occurs at each time point. The algorithm in [6] considers coupled interconnects with frequency-independent per-unit-length (p.u.l) parameters. However, at relatively high frequencies, these parameters vary with frequency due to skin, proximity and edge effects [15]. In this paper, we extend the WR-TP technique to this practically significant case of coupled interconnects with frequency-dependent p.u.l parameters. The rest of the paper is organized as follows. Rational function approximation and equivalent circuit representation for the frequency-dependent parameters are described in Section II. Section III provides details of the new computational transverse partitioning algorithm as applied to coupled lines with frequency-dependent p.u.l. parameters. The steps involved in updating the relaxation sources and relevant implementation considerations are described in Sections IV and V, and the numerical results and conclusions are presented in Sections VI and VII, respectively. II. MODELING OF THE FREQUENCY-DEPENDENT LINE PARAMETERS The p.u.l. parameters used to describe the transmission line are typically obtained from measurements, empirical formulas, or electromagnetic simulations. In general, the line parameters are frequency-dependent (FD) due to skin, edge, and proximity effects, and lossy dielectrics [15]. The p.u.l. impedance and admittance matrices can be written as where, and are the FD p.u.l. resistance, inductance, capacitance and conductance matrices, respectively, and is the number of lines. One popular approach in modeling the FD line parameters is based on approximating (1) in terms of rational functions. In order to ensure the passivity of the resulting transmission line macromodel, and must be positive-real (PR) matrices. Several techniques have been proposed in the literature for rational approximation of tabulated data [16] [20]. For our purpose here, we use the vector-fit method [19] followed by a passivity check and compensation algorithm based on the Hamiltonian matrix approach [16]. For most practical cases, the behavior of the p.u.l. parameters is a monotonic function of frequency. As a result, the poles of the rational functions are located on the negative real axis, which improves the efficiency of the passivity check and compensation scheme. (1) The monotonicity of the line parameters and also implies that they can be easily characterized by RL and RC subnetworks, respectively. For efficient realization, the following properties of two-element circuits were effectively utilized: Lemma 1: A real rational function is a driving-point impedance of an RC (RL) network if and only if all the poles and zeros are simple, lie on the nonpositive real axis, and alternate with each other, with the first critical frequency being a pole (zero) [21]. Lemma 2: For multiport RC (RL) network, the mutual impedance contains only those poles present in and simultaneously. The poles must lie on the negative real axis [21]. Based on Lemmas 1 and 2, the real poles of and are obtained using the vector-fit method [19]. Next, using the resulting poles, the off-diagonal rational functions are approximated using a least-squares fitting algorithm. Equation (1) can be rewritten in the following form: where and represent the mutual impedance and admittance between lines and, respectively, and where and represent the self impedance and admittance of line, respectively. The elements in (2) can be approximated as where and are the number of poles used in the approximation for the elements of and, respectively. The approximations in (3) and (4) can be realized using equivalent RL/RC circuits, as shown in Figs. 2 and 3, respectively. III. DEVELOPMENT OF THE WR-TP ALGORITHM FOR FD PARAMETERS Consider the Telegrapher s equations of the transmission line in the following form [15]: where and are complex vectors representing the voltages and currents as a function of position and complex frequency, and is the number of coupled lines. (2) (3) (4) (5)

3 NAKHLA et al.: WAVEFORM RELAXATION TECHNIQUES FOR SIMULATION 259 Fig. 2. Equivalent circuit representation for Z (s). Fig. 3. Equivalent circuit representation for Y Applying the waveform relaxation with transverse partitioning (WR-TP) algorithm, which separates the coupling between the lines in (5), results in a recursive set of decoupled differential equations (s). and, which correspond to the coupling effects on line due to the neighboring lines. Following a similar approach to [6], a time-domain equivalent circuit can be realized, as shown in Fig. 4. In this case, the waveform relaxation sources are approximated using a suitable numerical integration technique [22]. As a result, each line consists of a cascade of single lines with lengths. The waveform relaxation voltage and current sources and are distributed throughout the length of the lines, located at the points, and are defined as (6) where (8) where (9) and represents the th iteration. Equation (6) represents a single transmission line with frequency-dependent parameters and embedded relaxation sources (7) and where and and denote the inverse Fourier transform and convolution operators, respectively. The computational steps can be summarized as follows. Let ; 1) Start with an initial waveform for and for and. 2) Simulate each individual single line subcircuit to obtain and. 3) Based on the solution obtained from step 2, update the relaxation sources and using (8). 4) Let ; go to step 2 and repeat until convergence is achieved within an acceptable error tolerance. Clearly, the numerical accuracy of the distributed waveform relaxation sources depends on the number of discretization points and the specific numerical integration technique. Most of the

4 260 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 2, MAY 2007 Fig. 4. Transverse decoupling of the lines using subcircuits with distributed sources. widely-used numerical integration algorithms have an error estimate associated with them [22]. In our tested cases, varied between 20 and 50, depending on the specific example. However, underestimating the value of would only lead to a slight increase in the number of iterations required, but would not affect the accuracy of the final solution. In the next section, we will present an algorithm for updating the relaxation sources in Step 3. Although the above steps are general with respect to the macromodel used for representing the lines, for the purpose of illustration, in the rest of this paper we will focus on uniform lumped segmentation. In this case, each line in Fig. 4 is represented by a cascade of lumped sections; where each of the sections of line consist of a series impedance proportional to and a parallel admittance proportional to. A. Waveform Scaling Approach For illustration purposes, we will consider here the th section of an coupled line circuit, as shown in Fig. 5. The relaxation voltage source for line, which represents the coupling effects on line due to the neighboring lines, can be written at a given iteration as follows: (10) where is the current through line, as shown in Fig. 5. Substituting (3) in (10) yields IV. WAVEFORM SCALING ALGORITHM FOR UPDATING THE WAVEFORM RELAXATION SOURCES In order to obtain the coupling sources and in Fig. 4, the convolution in (8) must be computed. Given that the poles and residues of and are known from the parameter-fitting process, (8) can be easily computed using recursive convolution. However, this approach may increase the computational cost associated with the relaxation sources, since it is required for all sections, for all lines, and at every iteration. In this section, we present a technique based on waveform scaling that completely avoids performing the numerical convolution, which leads to a significant reduction in the computational cost of updating the relaxation sources. (11) Referring to Fig. 5, it can be seen that the voltage across the resistor on line, is simply, and the voltage across the inductor is.

5 NAKHLA et al.: WAVEFORM RELAXATION TECHNIQUES FOR SIMULATION 261 Fig. 5. Equivalent circuit demonstrating the computation of ~e (x ;t). Thus, the first two terms inside the summation in (11) are given by Subsituting (12) and (14) into (11), as can be rewritten (15) (12) Next, in order to use the same approach for the third term in (11), we utilize Lemma 2, which states that the poles of are a subset of the poles of and. Consider the voltage across the th RL tank circuit on line, which can be written as Thus, using the technique presented above, we can obtain the relaxation source as a linear combination of the voltages on the neighboring lines. Similarly, the same approach can be used to calculate the relaxation source. The current source for line (see Fig. 6) is given by Using (13), we can write (13) Using (4), (16) can be expressed as (16) (14)

6 262 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 2, MAY 2007 Fig. 6. Equivalent circuit demonstrating the computation of ~q (x ;t). (19) (17) Similar to the approach used to derive (15) and with some mathematical manipulation, we can rewrite (17) as Therefore, using (15) and (18), performing the numerical convolution is no longer required. The relaxation sources for a given line can be computed by scaling the voltages and currents on the neighboring lines. As a result, this provides a significant reduction in the computational cost associated with updating the relaxation sources. where the branch currents (Fig. 6) in (18) are given by (18) V. IMPLEMENTATION CONSIDERATIONS Several relevant aspects regarding the implementation of the proposed waveform relaxation scheme are worth mentioning. A. Using Controlled Sources for Updating the Relaxation Sources In certain commercial simulators, such as HSPICE [23], controlled voltage and current sources which have frequency-dependent proportionality factors, are allowed to be used within the time-domain simulation, (in HSPICE, this feature is referred to as the Laplace Element ). Specifically, the proportionality factor can be written in a rational function form as (20)

7 NAKHLA et al.: WAVEFORM RELAXATION TECHNIQUES FOR SIMULATION 263 Fig. 7. Calculation of relaxation sources at iteration r. Exploiting this feature, the diagonal elements of and can be represented by controlled voltage and current sources and therefore circuit synthesis is not required. In addition, this capability can be used to simplify the implementation of updating the relaxation sources. To illustrate, consider the relaxation source for line, which can be expressed in the time-domain as (21) where is the ratio of the mutual impedance to the self impedance, given by (22) and the voltage is the voltage across the circuit used to realize, as shown in Fig. 7. The convolution in (21) can be represented by the use of controlled sources. Instead of computing the relaxation source using the waveform scaling approach, a series of voltage controlled voltage sources can be included in the circuit (see Fig. 7), where the controlling voltage is the waveform from the previous iteration, and where the proportionality factor is. The same approach can be used to compute the relaxation source. In this case, in (8) can be rewritten as and the current is the branch current through the circuit used to realize. Similarly, performing the convolution in (23) is equivalent to including a parallel combination of current controlled current sources in the circuit netlist, where the controlling currents are obtained directly from the previous iteration, and the proportionality factors are given in (24). Note that the coefficients of the proportionality factors for and [given by (22) and (24)] are known a priori, from the rational function approximation for the line parameters. It is important to mention that both approaches presented for updating the relaxation sources provide significant computational cost advantages in comparison to performing the numerical convolution. Moreover, the difference in the computational cost between the two schemes is negligible. However, the availability of the laplace element [23] feature merely simplifies the implementation of the WR-TP algorithm. It is also to be noted that, as described in Section III, using the WR-TP method allows for each individual subcircuit to be solved completely independently. Thus, in the circuit simulator, multirate simulation may be used, where each subcircuit is solved at its own speed and time step. At a given iteration, the simulator accesses the coupling waveforms obtained from the previous iteration (which are in the form of tabulated data). In the case that the simulator needs a value of the coupling waveform at an intermediate time point, a suitable interpolation scheme (such as second order Lagrange interpolation [24]) may be used. B. Convergence and Diagonal Dominance where (23) (24) Since the p.u.l. admittance matrix dominant [25], it follows from (2) that is strictly diagonally (25)

8 264 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 2, MAY 2007 We use this fact to accelerate the convergence of the overall WR-TP algorithm by rewriting (6) and (7) in the following form: (26) where Fig. 8. Nonlinear circuit with four on-chip coupled lines (Example 1). Fig. 9. Comparison of fitted results versus original data for Z Real(Z (s)). (b) Imaginary(Z (s)). (s). (a) (27) In this case, the admittance in Fig. 5 is replaced by, and the relaxation current source is modified to (28) Although the equations in (26) (28) are mathematically equivalent to those in (6) (9), they offer better convergence properties [25], [26], since they guarantee the diagonal dominance of the subcircuit equations in (26). VI. NUMERICAL RESULTS In this section, we present five case studies. The first three examples demonstrate the validity, accuracy and convergence properties of the proposed WR-TP algorithm. The fourth example considers several cases of a large number of coupled lines, and numerically illustrates the linear relationship between the CPU cost and the number of lines. In the fifth example, we demonstrate the applicability of the WR-TP method to circuits consisting of multiple sets of coupled interconnects. Example 1 In this example, we consider a nonlinear circuit (Fig. 8) consisting of four on-chip coupled lines with frequency-dependent p.u.l. resistance and inductance, constant and. The extracted line parameters are based on data sup- plied by IBM [27]. The frequency-dependent impedance was fitted using the approach described in Section II. Fig. 9 shows a sample of the fitting results as compared to the original extracted data. To start the waveform relaxation iterations, the terminal current and voltage waveforms across all the lines were initialized to zero values, and convergence was achieved after three iterations. In order to validate the accuracy of the WR-TP method, the coupled transmission line in Fig. 8 was represented by its coupled lumped equivalent circuit which was generated using the technique described in Section II; and the resulting circuit was simulated in HSPICE [23]. Figs. 10 and 11 show a sample of the output waveforms for an input pulse with rise/fall times of 0.5 ns and a width of 5 ns. As seen, the results are in very good agreement. Example 2 In this example, we increased the number of lines used in the previous example to twelve. The input voltage sources (on lines 1, 5, and 10) are input pulses with rise/fall times of 0.5 ns and pulse widths of 5 ns. To validate the accuracy of the WR-TP algorithm, the circuit in Fig. 12 was simulated in the frequencydomain using the exact stamp [15] of the coupled lines, and the time-domain response was obtained using the inverse fast Fourier transform (IFFT). Figs. 13 and 14 show a sample of the output waveforms (after 3 iterations) compared to the IFFT of the frequency-domain solution. As seen from the plots, the results are in excellent agreement. Example 3 In this example, we consider four coupled multichip module (MCM) lines of length cm. In this case,

9 NAKHLA et al.: WAVEFORM RELAXATION TECHNIQUES FOR SIMULATION 265 Fig ). Transient response of voltage at active line far end (line #1) (Example Fig. 13. Transient response of voltage at victim line near end (line #3) (Example 2). Fig. 11. Transient response of voltage at victim line near end (line #2) (Example 1). Fig ). Transient response of voltage at victim line far end (line #12) (Example output waveforms after three iterations, compared to the IFFT of the frequency-domain solution, corresponding to an input pulse with rise/fall times of 0.5 ns and a width of 5 ns. As seen from the figures, the results from the WR-TP method are in very good agreement with the results from the IFFT. Fig. 12. Linear circuit consisting of twelve on-chip coupled lines (Example 2). and are all frequency-dependent and based on the parameters used in [28]. The circuit in Fig. 15 was simulated using the proposed WR-TP algorithm with uniform lumped segmentation, starting with initial values of zero for the voltage and current waveforms. Figs. 16 and 17 present a sample of the Example 4 This example illustrates the computational complexity of the proposed WR-TP algorithm as a function of the number of lines. In this numerical experiment, the number of frequencydependent on-chip coupled lines (used in Examples 1 and 2) was varied in the range of (Fig. 18). Zero initial guess was used for the voltage and current waveforms on all lines. In all cases, convergence was achieved in less than five iterations. Fig. 19 shows the computational cost as a function of the number of lines. As expected, the computational cost of the proposed WR-TP algorithm increases almost linearly with the number of lines. In contrast to this, as was illustrated in [6], the CPU cost of conventional circuit simulators even for the

10 266 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 2, MAY 2007 Fig. 15. Four coupled lines circuit (Example 3). Fig. 18. Coupled lines circuit with varying N (Example 4). Fig ). Transient response of voltage at active line far end (line #3) (Example Fig ). Computational cost as a function of the number of lines N (Example Fig. 17. Transient response of voltage at victim line near end (line #4) (Example 3). simpler case of frequency-independent p.u.l. parameters grows with, where. Also, it is worth mentioning that in the case of lines with frequency-dependent parameters, for this example, HSPICE [23] failed for more than eight lines. It is to be noted, that the linear behavior of the computational complexity of the WR-TP method emphasizes that the CPU time required for updating the relaxation sources is in general, relatively small Fig. 20. Coupled interconnect system with nonlinear terminations (Example 5). compared to the CPU time required to simulate the individual subcircuits. In addition, the slope of this linear behavior depends on the specific macromodeling technique used to simulate each circuit. Example 5 The purpose of this example is to illustrate the applicability of the WR-TP technique to networks consisting of multiple sets

11 NAKHLA et al.: WAVEFORM RELAXATION TECHNIQUES FOR SIMULATION 267 Fig. 21. Decoupled interconnect subcircuits for Example 5. Fig. 22. Transient response of voltage at active line far-end (Example 5). Fig. 23. Transient response of voltage at victim line far-end (Example 5). of coupled interconnects. We consider here three coupled interconnect circuits [29] with nonlinear terminations, as shown in Fig. 20. The input voltage is a unit step with a rise time of 0.1 ns. Using the WR-TP algorithm, the circuit is partitioned in the transverse direction along the dotted line shown in Fig. 20. The coupling effects between the decoupled subcircuits are represented by relaxation sources, as shown in Fig. 21. To compare the accuracy of the computational results, the circuit in Fig. 20 was simulated using its coupled lumped equivalent circuit in HSPICE. Figs. 22 and 23 show a sample of the transient response of the far-end voltages of subnetwork #2 (labeled active and victim line in Fig. 20), respectively. As seen from the plots, the results are in very good agreement. VII. CONCLUSION A new method for macromodeling coupled transmission lines with frequency-dependent parameters has been presented. The proposed algorithm partitions the -coupled line circuit into or less individual subcircuits. The coupling effects between subcircuits is represented by voltage and current relaxation sources, and an efficient method for calculation of these sources has been presented. The frequency-dependent parameters of the lines are approximated using an efficient fitting algorithm. The resulting rational function approximations are used to generate equivalent macromodels compatible with SPICE-like circuit simulators. Using the proposed waveform relaxation with transverse partitioning method, the CPU cost increases only linearly with the number of lines, providing a significant speedup compared to conventional techniques. The accuracy and efficiency of the WR-TP algorithm was demonstrated using several benchmark examples. In addition, the applicability of the proposed algorithm to networks consisting of multiple sets of coupled interconnects was illustrated.

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White and A. Sangiovanni-Vincentelli, Partitioning algorithms and parallel implementations of waveform relaxation algorithms for circuit simulation, in IEEE Proc. Int. Symp. Circuits Syst., Kyoto, Japan, Jun. 1985, pp [27] A. Deutsch, private communications Oct [28] A. E. Ruehli, A. C. Cangellaris, and H.-M. Huang, Three test problems for the comparison of lossy transmission line algorithms, in 11th IEEE Topical Meeting Electrical Performance Electronic Packag., 2002, vol. 11, pp [29] A. Dounavis, R. Achar, and M. Nakhla, Efficient sensitivity analysis of lossy multiconductor transmission lines with nonlinear terminations, IEEE Trans. Microwave Theory Tech., vol. 49, no. 12, pp , Dec Natalie M. Nakhla (S 04) was born in Ottawa, ON, Canada, in September She received the B.Eng. degree in telecommunications engineering, in 2003, from Carleton University, Ottawa, ON, Canada, where she is currently pursuing her graduate studies. Her research interests include computer-aided design of VLSI circuits, simulation and modeling of high-speed interconnects, packaging characterization, and numerical techniques. Ms. Nakhla is the recipient of the National Science and Engineering Research Council postgraduate award ( ) and the Canada Graduate Scholarship at the doctoral level ( ). She also received the Carleton University Medal for outstanding research achievement at the Master s level, as well as the Carleton University Senate medal for outstanding academic achievement at the undergraduate level. Albert E. Ruehli (LF 03) received the Ph.D. degree in electrical engineering from the University of Vermont, Burlington, in He has been a member of various projects with IBM including mathematical analysis, semiconductor circuits and devices modeling, and as manager of a VLSI design and CAD group. Since 1972, he has been at the IBM T. J. Watson Research Center, where he now is a Research Staff Member in the Electromagnetic Analysis Group. He is the editor of two books, Circuit Analysis, Simulation and Design (New York, North Holland 1986, 1987) and he is an author or coauthor of over 100 technical papers. He has given talks at universities including keynote addresses and tutorials at conferences, and has organized many sessions. Dr. Ruehli has served in numerous capacities for the IEEE. In 1984, 1985 he was Technical and General Chairman, respectively, of the ICCD International Conference. He has been a member of the IEEE ADCOM for the Circuit and System Society and an Associate Editor for the TRANSACTIONS ON COMPUTER-AIDED DESIGN. He received IBM Research Division or IBM Outstanding Contribution Awards in 1975, , 1995, and In 1982, he received the Guillemin-Cauer Prize Award for his work on waveform relaxation, and in 1999, he received a Golden Jubilee Medal, both from the IEEE CAS Society. In 2001, he received a Certificate of Achievement from the IEEE EMC society for inductance concepts and the Partial Element Equivalent Circuit (PEEC) method. He received the 2005 Richard R Stoddart Award from the IEEE EMC Society for outstanding technical performance. He is a member of SIAM. Michel S. Nakhla (S 73 M 75 SM 88 F 98) received the M.A.Sc. and Ph.D. degrees in electrical engineering from University of Waterloo, ON, Canada, in 1973 and 1975, respectively He is a Chancellor s Professor of Electrical Engineering at Carleton University, Ottawa, ON, Canada. From 1976 to 1988, he was with Bell-Northern Research, Ottawa, ON, Canada, as the Senior Manager of the computer-aided engineering group. In 1988, he joined Carleton University, as a Professor and the holder of the Computer-Aided Engineering Senior Industrial Chair established by Bell-Northern Research and the Natural Sciences and Engineering Research Council of Canada. He is the founder of the high-speed CAD research group at Carleton University. He is Associate Editor of the Circuits, Systems and Signal Processing Journal. He has also served as a member of many Canadian and international government-sponsored research grants selection panels He serves as a technical consultant for several industrial organizations and is the principal investigator for several major sponsored research projects. His research interests include modeling and simulation of

13 NAKHLA et al.: WAVEFORM RELAXATION TECHNIQUES FOR SIMULATION 269 high-speed circuits and interconnects, nonlinear circuits, multidisciplinary optimization, thermal and electromagnetic emission analysis, MEMS, and neural networks. Dr. Nakhla is serving on various international committees, including the standing committee of the IEEE International Signal Propagation on Interconnects Workshop (SPI), the technical program committee of the IEEE International Microwave Symposium (IMS), the technical program committee of the IEEE Topical Meeting on Electrical Performance of Electronic Packaging, and the CAD committee (MTT-1) of the IEEE Microwave Theory and Techniques Society. He is an Associate Editor of the IEEE TRANSACTIONS ON ADVANCED PACKAGING and served as Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. Ramachandra Achar (S 95 M 00 SM 04) received the B.Eng. degree in electronics engineering from Bangalore University, Bangalore, India, in 1990, the M. Eng. degree in micro-electronics from Birla Institute of Technology and Science, Pilani, India, in 1992, and the Ph.D. degree from Carleton University, Ottawa, ON, Canada, in Dr. Achar currently serves as an Assistant Professor in the Department of Electronics at Carleton University, Ottawa, ON, Canada. He spent the summer of 1995 working on high-speed interconnect analysis at T. J. Watson Research Center, IBM, Yorktown Heights, NY. He was a Graduate Trainee at Central Electronics Engineering Research Institute, Pilani, India during 1992 and was also previously employed at Larsen and Toubro Engineers Ltd., Mysore, India and at Indian Institute of Science, Bangalore, India as an Research and Development Engineer. During , he served as a research engineer in the CAE group at Carleton University. His research interests include modeling and simulation of high-speed interconnects, model-order reduction, numerical algorithms, and development of computer-aided design tools for high-frequency circuit analysis. He is a consultant for several leading industries focussed on high-frequency circuits, systems, and tools. Dr. Achar received several prestigious awards, including NSERC (Natural Science and Engineering Research Council) doctoral award (2000), the Carleton University s University Medal for his doctoral work on high-speed VLSI interconnect analysis (1998), Strategic Microelectronics Corporation (SMC) Award (1997), Canadian Microelectronics Corporation (CMC) Award (1996), and the best student paper award in the 1998 Micronet (a Canadian network of centres of excellence on Microelectronics) annual workshop. He serves on technical program committee of several leading IEEE conferences. Changzhong Chen received the B.E. degree in electronics from Xiamen University, Xiamen, China, in July 1998, and the M.S. degree in electrical engineering from the University of Ottawa, Ottawa, ON, Canada, in October He is currently working toward the Ph.D. degree in electrical engineering at Carleton University, Ottawa, ON, Canada. His research interests include modeling and simulation of high-speed interconnect networks, computer-aided design of VLSI circuits, and digital signal processing, etc.