Thick Film Resistor Networks, Dual-In-Line, Medium Body, Small Outline, Molded DIP, Surface Mount
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1 Thick Film Resistor Networks, Dual-In-Line, Medium Body, Small Outline, Molded DIP, Surface Mount FEATURES Isolated, bussed and dual terminator schematics available 4, 6, or 2 terminal package Molded case construction Thick film resistive elements Reflow solderable ompatible with automatic surface mounting equipment Reduces total assembly costs For wave flow soldering contact factory Material categorization: for definitions of compliance please see * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details STANDARD ELETRIAL SPEIFIATIONS GLOBAL IRUIT POER RATING ELEMENT P 7 s DS has created series of drawings to support the need for a surface mount gull wing resistor network product. is listed as a resource on this drawing as follows: DS DRAING NUMBER (J).8 These drawings can be viewed at: Power rating depends on the max. temperature at the solder point, the component placement density and the substrate material Jumper: -resistor on request ( m) Packaging: According to EIA; see appropriate catalog or web page () Temperature range: -55 to +25 (2) ontinuous working voltage shall be P x R or maximum working voltage, whichever is less (3) ± 2 % standard, ± % and ± 5 % available POER RATING PAKAGE P 7 (3) ± % RANGE MAXIMUM ORKING VOLTAGE (2) V D TEHNIAL SPEIFIATIONS PARAMETER UNIT IRUIT 3 IRUIT 5 IRUIT Rated dissipation at 7 per element Limiting element voltage () V D 5 Voltage coefficient ppm/v < 5 Insulation voltage ( min) V D/A peak 2 ategory temperature range -55 / +5 Insulation resistance > T tracking (-55 to +25 ) ppm/ 5 () Rated voltage: P x R Revision: 8-Apr-7 Document Number: 358 THIS DOUMENT IS SUBJET TO HANGE ITHOUT NOTIE. THE PRODUTS DESRIBED HEREIN AND THIS DOUMENT ARE SUBJET TO SPEIFI DISLAIMERS, SET FORTH AT Available Available TEMPERATURE OEFFIIENT () ± ppm/.8.5, 2, 5 to M , 2, 5 to M , 2, 5 to M 5.8.2, 2, 5 to M , 2, 5 to M , 2, 5 to M , 2, 5 to M , 2, 5 to M , 2, 5 to M 5 VISHAY DALE IRUIT (B) 3 (A) 5 (J) (B) 3 (A) POER RATING ELEMENT P POER RATING PAKAGE P 7 RANGE ± % TEMPERATURE OEFFIIENT ( to 7 ) ± ppm/ MAXIMUM ORKING VOLTAGE (2) V D.2 to 2.2M, 2, 5, 3 5. to 2.2M, 2, 5, 3 5
2 GLOBAL PART NUMBER INFORMATION New Global Part Numbering: 6KGD (preferred part numbering format) S O M 6 K G D GLOBAL = bussed 3 = isolated = special R = K = k M = M R = 68K = 68 k M =. M = jumper F = ± % G = ± 2 % J = ± 5 % S = special Z = jumper EJ = lead (Pb)-free, tube EA = lead (Pb)-free, tape and reel D = tin / lead, tube RZ = tin / lead, tape and reel Historical Part Number Example: 62G (will continue to be accepted) 6 2 G D2 SPEIAL Blank = standard (dash number) (up to 3 digits) from to 999 as applicable HISTORIAL New Global Part Numbering: 255BGRZ (preferred part numbering format) S O M B G R Z GLOBAL = dual terminator 3 digit impedance code, followed by alpha modifier (see Impedance table) F = ± % G = ± 2 % J = ± 5 % EJ = lead (Pb)-free, tube EA = lead (Pb)-free, tape and reel D = tin / lead, tube RZ = tin / lead, tape and reel SPEIAL Blank = standard (dash number) up to 3 digits from to 999 as applicable Historical Part Number Example: 25823G (will continue to be accepted) G R6 HISTORIAL 2 For additional information on packaging, refer to the Surface Mount Network Packaging document ( Revision: 8-Apr-7 2 Document Number: 358 THIS DOUMENT IS SUBJET TO HANGE ITHOUT NOTIE. THE PRODUTS DESRIBED HEREIN AND THIS DOUMENT ARE SUBJET TO SPEIFI DISLAIMERS, SET FORTH AT
3 IRUIT APPLIATIONS Schematic , 5, or 9 resistors with one pin common The xx circuit provides a choice of 3, 5, or 9 nominally equal resistors, each connected between a common lead (4, 6, or 2) and a discrete P board pin. ommonly used in the following applications: MOS/ROM pull-up/pull-down Open collector pull-up ired OR pull-up Power driven pull-up TTL input pull-down Digital pulse squaring TTL unused gate pull-up High speed parallels pull-up 3 Schematic 5 Schematic , 8, or isolated resistors The xx3 circuit provides a choice of 7, 8, or nominally equal resistors with each resistor isolated from all others and wired directly across. ommonly used in the following applications: ired OR pull-up Power driven pull-up Powergate pull-up Line termination Long-line Impedance balancing LED current limiting EL output pull-down TTL input pull-down R R R R R R R R2 R2 R2 R2 R2 R2 R R R R R R R R2 R2 R2 R2 R2 R2 R2 R2 4, 6, 2 TTL dual-line terminator; pulse squaring, 2, 4, or 8 pairs of resistors (R resistors are common to leads 4, 6, or 2) (R 2 resistors are common to leads 7, 8, or ) The xx5 circuit contains 2, 4, or 8 pairs of resistors. Each pair is connected between ground and a common line. The junctions of these resistor pairs are connected to the input leads. The 5 circuits are designed for TTL dual-line termination and pulse squaring. DIMENSIONS SOLDER PAD DIMENSIONS in millimeters a b c l p w AVE REFLO s The dimension shown are for a 6 pin part. For parts with different pin numbers use the same pitch and add or subtract pads as required Maximum solder reflow temperature +255 DIMENSIONS in millimeters PIN NO# L B E F G H K R S T Tol. ±.254 ±.38 ±.254 ±.38 ±.27 ±.27 ±.27 ±.76 ±.254 MARKING INFORMATION % parts have 4 digits while 2 % and 5 % parts have 3 digits. Revision: 8-Apr-7 3 Document Number: 358 THIS DOUMENT IS SUBJET TO HANGE ITHOUT NOTIE. THE PRODUTS DESRIBED HEREIN AND THIS DOUMENT ARE SUBJET TO SPEIFI DISLAIMERS, SET FORTH AT
4 IMPEDANE S R () R 2 () R () R 2 () 5B A B 2 2 8A A A B B B 56.2K 2B K A.5K 3.3K 3A B 3K 6.2K For additional impedance codes, refer to the Dual Terminator Impedance ode Table document ( PERFORMANE TEST ONDITIONS OF TEST TEST RESULTS (TYPIAL TEST LOTS) Power conditioning MIL-STD-22 ±.5 % Load life at 7 MIL-STD-22 ±.5 % Short time overload MIL-STD-22 ±.25 % Thermal shock MIL-STD-22 ±.5 % Moisture resistance MIL-STD-22 ±.5 % Resistance to soldering heat MIL-STD-22 ±.25 % Low temperature operation MIL-STD-22 ±.25 % Vibration MIL-STD-22 ±.25 % Shock MIL-STD-22 ±.25 % Terminal strength MIL-STD-22 ±.25 % MEHANIAL SPEIFIATIONS Marking Model number, schematic number, value tolerance, pin indicator, date code Marking resistance to solvents Permanency testing per MIL-STD-22, method 25 Maximum solder reflow temperature +255 Solderability Per MIL-STD-22, method 28E Terminals opper alloy. Solder dipped terminal Body Molded epoxy Revision: 8-Apr-7 4 Document Number: 358 THIS DOUMENT IS SUBJET TO HANGE ITHOUT NOTIE. THE PRODUTS DESRIBED HEREIN AND THIS DOUMENT ARE SUBJET TO SPEIFI DISLAIMERS, SET FORTH AT
5 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUT, PRODUT SPEIFIATIONS AND DATA ARE SUBJET TO HANGE ITHOUT NOTIE TO IMPROVE RELIABILITY, FUNTION OR DESIGN OR OTHERISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, Vishay ), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer s technical experts. Product specifications do not expand or otherwise modify Vishay s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. ustomers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. 27 VISHAY INTERTEHNOLOGY, IN. ALL RIGHTS RESERVED Revision: 8-Feb-7 Document Number: 9
Thick Film Resistor Networks, Dual-In-Line, Medium Body, Small Outline, Molded DIP, Surface Mount
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