FEATURES APPLICATIO S TYPICAL APPLICATIO. LTC Low Noise, 8th Order, Clock Sweepable Elliptic Lowpass Filter DESCRIPTIO

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1 LTC- Low Noise, th Order, Clock Sweepable Elliptic Lowpass Filter FEATRES th Order Filter in a -Pin Package No External Components : Clock to Center Ratio µv RMS Total Wideband Noise.% THD or Better khz Maximum Corner Frequency Operates from ±.V to ±V Power Supplies Passband Ripple Guaranteed Over Full Military Temperature Range APPLICATIO S Antialiasing Filters Telecom PCM Filters DESCRIPTIO The LTC - is an th order, clock sweepable elliptic (Cauer) lowpass switched capacitor filter. The passband ripple is typically ±.db, and the stopband attenuation at. times the cutoff frequency is db or more. An external TTL or CMOS clock programs the value of the filter s cutoff frequency. The clock to cutoff frequency ratio is :. No external components are needed for cutoff frequencies up to khz. For cutoff frequencies over khz two low value capacitors are required to maintain passband flatness. The LTC- features low wideband noise and low harmonic distortion even for input voltages up to V RMS. In fact the LTC- overall performance completes with equivalent multiple op amp RC active realizations. The LTC- is available in a -pin DIP or -pin surface mounted SW package. The LTC- is pin compatible with the LTC-., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO th Order Clock Sweepable Lowpass Elliptic Antialiasing Filter Frequency Response V.µF LTC- f CLK COMP* COMP* CLOCK (TTL, MHz) V.µF / (db) TA NOTE: THE POWER SPPLIES SHOLD BE BYPASSED BY A.µF CAPACITOR CLOSE TO THE PACKAGE. FOR SERVO OFFSET NLLING APPLICATIONS, PIN IS THE ND STAGE SMG JTION. *FOR CTOFF FREQEY ABOVE khz, SE COMPENSATION CAPACITORS (pf TO pf) BETWEEN PIN AND PIN AND PIN AND PIN. FREQEY (khz) TA th ORDER CLOCK SWEEPABLE LOWPASS ELLIPTIC ANTIALIASING FILTER MAINTAINS, FOR.Hz f CTOFF khz, A ±.db PASSBAND RIPPLE AND db STOPBAND ATTENATION AT. f CTOFF. TOTAL WIDEBAND NOISE = µv RMS, THD =.% FOR = V RMS fa

2 LTC- ABSOLTE AXI RATI GS W W W Total Supply Voltage ( to )....V Power Dissipation... mw Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C (Note ) Operating Temperature Range LTC-M (OBSOLETE)... C to C LTC-C/AC... C to C PACKAGE/ORDER I FOR W ATIO COMP TOP VIEW R(h, l) COMP f CLK ORDER PART NMBER LTC-CN LTC-ACN TOP VIEW R(h, l) COMP f CLK ORDER PART NMBER LTC-CSW N PACKAGE -LEAD PDIP T JMAX = C, θ JA = C/W J PACKAGE -LEAD CERDIP OBSOLETE PACKAGE Consider the N Package for Alternate Source LTC-MJ LTC-CJ COMP SW PACKAGE -LEAD PLASTIC (WIDE) SO T JMAX = C, θ JA = C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V S = ±.V, f CLK = MHz, R = k, C = pf, TTL or CMOS clock input level unless otherwise specified. PARAMETER CONDITIONS TYP MAX NITS Passband Gain, LTC-, A Referenced to db, Hz to.f C ±. ±. db Gain TempCo. db/ C Passband Edge Frequency, f C ± % khz Gain at f C Referenced to Passband Gain LTC-.. db LTC-A.. db db Frequency. khz Passband Ripple (Note ).f C to.f C Referenced to Passband Gain, LTC- Measured at.khz and.khz ±. ±. db LTC-A ±. ±. db Ripple TempCo. db/ C Stopband Attenuation At.f C Referenced to db LTC- db LTC-A db Stopband Attenuation At f C Referenced to db LTC- db LTC-A db fa

3 LTC- ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V S = ±.V, f CLK = MHz, R = k, C = pf, TTL or CMOS clock input level unless otherwise specified. PARAMETER CONDITIONS TYP MAX NITS Input Frequency Range f CLK / khz Output Voltage Swing and V S = ±.V ± V Operating Input Voltage Range V S = ±V ± V V S = ±.V ± V Total Harmonic Distortion V S = ±V, Input = V RMS at khz. % V S = ±.V, Input = V RMS at khz. % Wideband Noise V S = ±V, Input = GND Hz to khz µv RMS V S = ±.V, Input = GND Hz to khz µv RMS Output DC Offset V S = ±.V, Pin Grounded LTC- mv LTC-A mv Output DC Offset TempCo V S = ± µv/ C Input Impedance kω Output Impedance f OT = khz Ω Output Short-Circuit Current Source/Sink / ma Clock Feedthrough µv RMS Maximum Clock Frequency % Duty Cycle, V S = ±.V MHz Power Supply Current V S = ±.V ma V S = ±V ma ma V S = ±.V, f CLK = MHz ma ma Power Supply Voltage Range ±. ± V Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : For tighter specifications please contact LTC Marketing. TYPICAL PERFOR A CE CHARACTERISTICS W GAIN (db) Gain vs Frequency Phase vs Frequency Group Delay V S = ±V T A = C f CLK = MHz f C = khz ±.db f db =.khz FREQEY (khz) G PHASE (DEG) V S = ±V T A = C f CLK = MHz f C = khz FREQEY (khz) G GROP DELAY (µs) V S = ±V T A = C f CLK = MHz f C = khz FREQEY (khz) G fa

4 LTC- TYPICAL PERFOR A CE CHARACTERISTICS W Gain vs Frequency Gain vs Frequency Gain vs Frequency GAIN (db) V S = ±V T A = C f CLK = MHz, f C = khz COMP NOT SED, COMP = pf f CLK = MHz, f C = khz COMP = pf COMP = pf f CLK = MHz, f C = khz COMP = pf COMP = pf FREQEY (khz) G GAIN (db) V S = ±.V T A = C f CLK = MHz, f C = khz COMP = pf COMP = pf f CLK = MHz, f C = khz COMP = pf COMP = pf f CLK = MHz, f C = khz COMP = pf COMP = pf FREQEY (khz) G GAIN (db) V S = ±.V f CLK = MHz f C = khz COMP = pf COMP = pf C GAIN PEAK =.db AT khz C GAIN PEAK = db AT khz FREQEY (khz) G Typical Wideband Noise (µv RMS ) V S = ±V, T A = C f CLK = MHz, f C = khz Input Grounded Total Harmonic Distortion (.%) V S = ±.V, T A = C f CLK = MHz, f C = khz Input = khz at V RMS POWER SPPLY CRRENT (ma) Power Supply Current vs Power Supply Voltage f CLK = MHz T A = C T A = C T A = C TOTAL POWER SPPLY VOLTAGE (V) G PI F CTIO S (Pin Numbers Refer to the -Pin Package) COMP,, COMP, (Pins,,, and ): For filter cutoff frequencies higher than khz, in order to minimize the passband ripple, compensation capacitors should be added between Pin and Pin (COMP) and Pin and Pin (COMP). For COMP (COMP), add pf (.pf) mica capacitor for each khz increase in cutoff frequency above khz. For more detail refer to Gain vs Frequency graphs., (Pins, ): The input Pin is connected to an k resistor tied to the inverting input of an op amp. Pin is protected against static discharge. The device s output, Pin, is the output of an op amp which can typically source/ sink ma/ma. Although the internal op amps are unity gain stable, driving long coax cables is not recommended. When testing the device for noise and distortion, the output, Pin, should be buffered (Figure ). The op amp power supply wire (or trace) should be connected directly to the power source. (Pins, ): For dual supply operation these pins should be connected to a ground plane. For single supply fa

5 PI F CTIO S (Pin Numbers Refer to the -Pin Package) operation both pins should be tied to one half supply (Figure ). Also Pin and Pin, although they are not internally connected should be tied to analog ground or system ground. This improves the clock feedthrough performance., (Pins, ): The and pins should be bypassed with a.µf capacitor to an adequate analog ground. Low noise, nonswitching power supplies are recommended. To avoid latchup when the power supplies exhibit high turn-on transients, a N Schottky diode should be added from the and pins to ground (Figure )., (Pins, ): A very short connection between Pin and Pin is recommended. This connection should be preferably done under the IC package. In a LTC- breadboard, use a one inch, or less, shielded coaxial cable; the shield should be grounded. In a PC board, use a one inch trace or less; surround the trace by a ground plane. (Pins, ): The no connection pins preferably should be grounded. f CLK (Pin ): For ±V supplies the logic threshold level is.v. For ±V and V to V supplies the logic threshold levels are.v and V respectively. The logic threshold levels vary ±mv over the full military temperature range. The recommended duty cycle of the input clock is % although for clock frequencies below khz the clock on time can be as low as ns. The maximum clock frequency for ±V supplies is MHz. For ±V supplies and above, the maximum clock frequency is MHz. Do not allow the clock levels to exceed the power supplies. For clock level shifting (see Figure ). TYPICAL APPLICATIO S COMP* COMP* N.µF LTC- f CLK N.µF = V.µF k LTC- f CLK V TO V COMP*.µF k / COMP* Figure. sing Schottky Diodes to Protect the IC from Power Supply Spikes F F Figure. Single Supply Operation. If Fast Power p or Down Transients are Expected, se a N Schottky Diode Between Pin and Pin..µF k k COMP* LTC- f CLK COMP*.k k µf T L LEVEL.µF COMP* LTC- f CLK COMP* k.µf k + POWER SORCE.µF F RECOMMENDED OP AMPS: LT, LT, LT.µF F Figure. Level Shifting the Input T L Clock for Single Supply Operation, V+ >V. Figure. Buffering the Filter Output. The Buffer Op Amp Should Not Share the LTC- Power Lines. fa

6 LTC- TYPICAL APPLICATIO S Transitional Elliptic-Bessel Dual th Order Lowpass Filter.µF C.k.k LT V IN COMP* + LTC- f CLK = f CLK f db.µf COMP* C = (µf) f db TA OTPT WIDEBAND NOISE: µv RMS OTPT WIDEBAND NOISE: µv RMS C / (db) Amplitude Response f db = khz f CLK = MHz f IN (khz) TA Transient Response to a V Step Input Transient Response to a V Step Input V/DIV V/DIV.ms/DIV.ms/DIV Adding an Output Buffer-Filter to Eliminate Any Clock Feedthrough Over a : Clock Range, for f CLK = khz to khz.µf COMP* LTC- f CLK COMP*.µF.k.k pf + k pf LT Ω.µF TA fa

7 PACKAGE DESCRIPTIO. BSC (. BSC) J Package -Lead CERDIP (Narrow., Hermetic) (LTC DWG # --).. (..). (.) MAX. (.). (.) MAX LTC-.. (..). (.) RAD TYP.. (..).. (..) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.. (..). (.) BSC. (.) J OBSOLETE PACKAGE N Package -Lead PDIP (Narrow.) (LTC DWG # --).* (.) MAX.. (..). ±. (. ±.).. (..). ±.* (. ±.).. (..). (.). (.) TYP ( ). (.). (.). (.) BSC NOTE: IHES. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT ILDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED. IH (.mm). ±. (. ±.) N SW Package -Lead Plastic Small Outline (Wide. Inch) (Reference LTC DWG # --). ±. TYP N. BSC. ±... (..) NOTE N.. ±. NOTE.. (..). (.) RAD.. (..) N/ RECOMMENDED SOLDER PAD LAYOT.. (..) NOTE.. (..) NOTE.. (..) TYP Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights... (..). (.) BSC.. (..) TYP N/.. (..).. (..) S (WIDE) NOTE: IHES. DIMENSIONS IN (MILLIMETERS). DRAWING NOT TO SCALE. PIN IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANFACTRING OPTIONS. THE PART MAY BE SPPLIED WITH OR WITHOT ANY OF THE OPTIONS. THESE DIMENSIONS DO NOT ILDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED." (.mm) fa

8 LTC- TYPICAL APPLICATIO Transitional Elliptic-Bessel th Order Lowpass Filter C.µF COMP* LTC- f CLK f CLK = f db.µf +.k LT C.k COMP* TA C = (µf) f db OTPT WIDEBAND NOISE:µV RMS Amplitude Response f db = khz f CLK = khz Transient Response to a V Step Input VOT/VIN (db) V/DIV f IN (khz) TA.ms/DIV RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC- th Order Elliptic Lowpass S- Package, Low Power LTC- Single Supply, th Order Elliptic Lowpass S- Package, Very Low Power LTC- DC Accurate, th Order, Lowpass Internal Precision Clock, Low Power LTC- DC Accurate, th Order, Lowpass Internal Precision Clock, S- Package Linear Technology Corporation McCarthy Blvd., Milpitas, CA - () - FAX: () - LINEAR TECHNOLOGY CORPORATION fa LW/TP K REV A PRINTED IN SA

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