16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD

Transcription

1 INTRODUCTION The is a dot matrix CD driver & controller Sl which is fabricated by low power CMOS technology. 80 QFP FUNCTION Character type dot matrix CD driver & controller Internal driver: 16 common and 40 segment signal output. Display character format; 5 x 7 dot + cursor, 5 x 10 dots + cursor Easy Interface with a 4-bit or 8-bit MPU Display character pattern: 5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds The special character pattern can be programmable by character generator RAM directly. A customer character pattern can be programmable by mask option.(-00 : Standard type) Automatic power on reset function. It can drive a maximum 80 characters by using the KS0065B or KS0063 externally. It is possible to read both Character Generator and Display Data RAM from MPU. FEATURES Wave form: M signal B type Internal Memory - Character Generator ROM: 8320bits - Character Generator RAM: 512 bits - Display Data RAM: 80 x 8bits for 80 digits. Power supply Voltage; +5V ±10% Supply voltage for display : 0V(V5) CMOS process 1/8 duty, 1/11 duty or 1/16 duty: selectable (1/8 duty; 5x7 dots format 1 line, 1/11 duty; 5x10 dots format 1 line, 1/16 duty: 5x7 dots format 2 line) 80 QFP or bare chip available.

2 BOCK DIAGRAM Power supply for V1 V2 V3 Parallel/serial Data conversion Circuit CD V4 Drive V5 5 5 Busy Flag Charater Generator ROM ( CG ROM ) 8320 bits Character Generator RAM ( CG RAM ) 512 bits Cursor Blink Control Circuit DB 0 ~ DB 3 DB 4 ~ DB 7 R/W RS E Input Output Buffer 8 8 Data Register ( DR ) Instruction Register ( IR ) Display 7 Data RAM ( DD RAM ) 80 8 bits 8 Instruction Decoder ( ID ) 40 - bit Shift Register bit atch Circuit 40 segment signal Segment 40( S Signal 1 - S 40 ) Driver D 7 Address Counter ( AC ) bit Shift Register 16 Common Signal Driver 16 common signal ( C 1 - C 16 ) OSC 1 OSC 2 Timing Generation Circuit CK1 CK2 M GND Fig. 1. functional block diagram.

3 PIN CONFIGURATION S39 S40 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 DB7 DB6 DB5 DB4 DB3 DB S38 S37 S36 S35 S34 S33 S32 S31 S30 S29 S28 S27 S26 S25 S24 S DB1 DB0 E R/W RS D M VDD CK2 CK1 V5 V4 V3 V2 V1 OSC OSC1 GND S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20 S21 S22 Fig QFP Top View

4 PIN DESCRIPTION PIN (NO) INPUT/OUTPUT NAME DESCRIPTION INTERFACE (33) Operating Voltage for logical circuit (5V±10%) Power V SS(GND) (23) Power 0V (GND) supply V 1-V 5 (26-30) Supply Voltage Bias voltage level fro CD driving S 1-S 40 Output Segment output Segment signal output for CD driving CD (22-1, 80-63) C 1-C 16 (47-62) Output Common output Common signal output for CD driving CD OSC1, OSC2 (24, 25) Intput (OSC1) Output (OSC2) Oscillator Both pin connected to Rf resistor or ceramic resonator for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. CK1 (31) Output Data latch Cock Clock output terminal for the serially transfered data to be latched to the driver. CK2 (32) Data shift clock Clock output terminal used when D terminal data output shifts the inside of the driver. M (34) Alternated The alternating signal to convert CD drive signal for CD waveform to AC driver output D (35) Display data interface Character pattern data, which is corresponding to each common signal, is supplied to driver serially. Resistor or Ceramic Resonator KS0065B or KS0063 E (38) Intput Enable Start enable signal to read or write the data MPU R/W (37) Read/Write R/W signal input is used to select the read/write mode RS (36) Register select Register selection input MPU High ow High ow High ow Selection Non selection Read mode Write Mode Data register (for read and write) Instruction register (for write), Busy flag, address counter (for read) DB 0-DB 7 (39-46) Input / Output Data interface Used for data transfer between the MPU and. These terminals are for data bus with bidirectional three-state. Initial 4 bit (DB 0-DB 3) are not used during 4-bit operation (DB 7 can be used as a busy flag) MPU

5 Internal logic of input/output terminal Input/output ogic diagram Applicable pin Input No Pull up E with pull up RS, R/W Output CK1, CK2 M,D Input Output VDD DB 0 - DB 7 Enable Data

6 MAXIMUM ABSOUTE IMIT (Ta=25 C) Characteristic Symbol Value Unit Operating Voltage Driver Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature V CD V IN P D T OPR T STG -0.3~ ~ ~ ~+75-55~+125 V V V mw C C * Voltage greater than above may damage to the circuit ( V 1 V 2 V 3 V 4 V 5) EECTRICA CHARACTERISTICS DC Characteristics (= +5V±10%, V SS=0V, Ta=-20 C ~+75 C) Characteristic Symbo Test condition Min Typ Max Unit Applicable Pin l Operating Voltage V OperatingCurrent(*1) I DD1 Ceramic resonator ma fosc=250khz I DD2 Resistor oscilation external clock operation fosc=270khz Input Voltage 1 High E, OB 0-DB 7, ow R/W, RS Input Voltage 2 High V IH OSC1 ow V I Output Voltage 1 High V OH1 I OH=-0.205mA DB 0-DB 7 ow V O1 I O=1.2mA V Output Voltage 2 High V OH2 I O=-40µA CK1, CK2, M ow V O2 I O=40µA D Voltage Drop (*2) COM Vd COM I O=±0.1mA C1-C16 SEG Vd SEG S1-S40 Input eakage Current I KG V IN=0 or -1-1 µa E Input ow Current I I =5V (test pull up R) RS,R/W,DB 0-DB 7 Frequency(*3) f EC KHz OSC1 External Clock Duty duty % Rise Time t R µs Fall Time t F µs Internal Clock Frequency(*3) f OSC1 Rf=91KΩ±2% KHz OSC1, OSC2 Ceramic Resinator Oscillation Frquency(*3) f OSC CD Driving Voltage(*4) V CD1 -V 5 1/5 bias V V 1 ~ V 5 V CD2 1/4 bias Note: *1) Applies to the current value flown in terminal when power is input as follows; =5V, GND=0V, V1 = 3.75V, V2 = 2.5V, V3 = 2.5V, V4 = 1.25V and V5 = 0V. *2) Applied to the voltage drop occuring from terminals, V1, V4 and V5 to each common terminal (C1-C16) when 0.1mA is flown in or out to and from all COM and SEG terminals, and also to voltage drop occuring from terminals, V2, V3 and V5 to each SEG terminal S1-S40. When the output level is at, V1 or V2 level, 0.1 ma is flown out, while 0.1 ma flow in when the output level is at V3, V4, or V5 level. This occurs when 5V is input to, V1 and V3 or to V2, V4, and V5 respectively.

7 *3) Oscillator circuit Resistor circuit External clock cirucit *4) Input the voltage listed in the table below to V 1-V 5 Power Duty Bias 1/8, 1/11 1/16 1/4 1/5 V 1 - V CD/4 - V CD/5 V 2 - V CD/2-2V CD/5 V 3 - V CD/2-3V CD/5 V 4-3V CD/4-4V CD/5 V 5 - V CD - V CD *V CD is the CD driving voltage, refer to the initial set of the instruction code.

8 AC Characteristics (=5V±10%, V SS=0V Ta=-20 ~ +75 C) (1) Write mode (Writing data from Micom to ) Characteristic Symbol Min Typ Max Unit Test pin E Cycle Time t c ns E E Rise Time t R ns E E Fall Time t F ns E E Pulse Width ( High, ow) t w ns E R/W And RS Set-Up Time t SU ns R/W, RS R/W And RS Hold Time t H ns R/W, RS Data Set-Up Time t SU ns DB 0 ~ DB 7 Data Hold Time t H ns DB 0 ~ DB 7 RS t SU1 t H1 R/W t w t H1 E t SU2 t F t H2 t R DB 0 - DB 7 Valid Data t c (2) Read mode (Reading data from to Micom) Characteristic Symbol Min Typ Max Unit Test pin E Cycle Time t c ns E E Rise Time t R ns E E Fall Time t F ns E E Pulse Width ( High, ow) t w ns E R/W And RS Set-Up Time t SU ns R/W, RS R/W And RS Hold Time t H ns R/W, RS Data Output Delay Time t D ns DB 0 ~ DB 7 Data Hold Time t DH ns DB 0 ~ DB 7

9 RS t SU t H R/W t w t F t H E t R t DH t D DB 0 - DB 7 Valid Data t c (3) Interface mode with KS0065B, KS0063 Characteristic Symbol Min Typ Max Unit Test pin Clock Pulse Width High t WCKH ns CK Clock Pluse Width ow t WCK ns CK Data Set-Up Time t SU ns D Data Hold Time t DH ns D Clock Set-Up Time t CSU ns CK M Delay Time t DM ns M CK t WCKH t WCKH CK2 t CSU t CSU VDD t WCK D t SU t DH M 0.9 t DM

10 CONTRO and DISPAY COMMAND Excution Command RS R/W DB 7 DB 6 DB 5 DB 4 DB 3 DB 2 DB 1 DB 0 time Remark (fosc=250khz) DISPAY CEAR H 1.64ms RETURN HOME H X 1.64ms cursor move to first digit ENTRY MODE H I/D SH 40µs I/D; set cursor move direction SET H Increase I/D Decrease SH: Specifies shift of display H display is shifted SH display is not shifted DISPAY ON/OFF H D C B 40µs Display H D Cursor H C Blinking H B Display on Display off Cursor on Cursor off Blinking on Blinking off SHIFT H S/C R/ X X 40µs SC H Display shift Cursor move R/ H Right shift eft shift SET FUNCTION H D N F X X 40µs D H 8 bits interface 4 bits interface N H 2 line display 1 line display F H 5x10 dots 5x7 dots Table 1.

11 CONTRO and DISPAY COMMAND(continued) Excution Command RS R/W DB 7 DB 6 DB 5 DB 4 DB 3 DB 2 DB 1 DB 0 time Remark (fosc=250khz) SET CG RAM ADDRESS H CG RAM address (corresponds to cursor address) 40µs CG RAM Data is sent and received after this setting SET DD RAM ADDRESS H DD RAM address 40µs DD RAM Data is sent and recevied after this setting READ BUSY H BF Address Counter used for 0µs FAG & Both DD & CG RAM address H Busy BF ADDRESS Ready - Reads BF indication internal operating is being performed. - reads address counter contents WRITE DATA H Read Data 46µs Write data into DD or CGRAM READ DATA H H Write Data 46µs Read data from DD or CGRAM X: don t care Table 1

12 APPICATION INFORMATION ACCORDING TO CD PANE 1) CD Panel:8 characterx1 line character format;5x7 dots + 1 cursor line(1/4 bias, 1/8 duty) C 1 C 8 ~~~~~~~ ~ S 1 S 40 2) CD Panel: 8 characterx1 line character format; 5x10 dots + 1 cursor line (1/4 bias, 1/11 duty) C 1 C 11 S 1 S 40

13 3) CD Panel : 8 character x 2 line character format; 5 x 7 dots + 1 cursor line (1/5 bias, 1/16 duty) C 1 C 8 C 9 C 16 S 1 S 40 4) CD Panel : 16 character x 1 line Character format;5x7 dots + 1 cursor line (1/5 bias, 1/16 duty) C 1 C 8 S 1 S 40 C 9 C 16

14 5) CD Panel : 4character x 2 line character ; 5x 7 dots + 1 cursor line (1/4 bias, 1/8 duty) S 1 S 20 C 1 C 8 S 21 S 40 DIVIDE CIRCUIT BIAS VOTAGE KS0066 KS0066 ( +5V ) V 1 V 2 V 3 V 4 V 5 ( + 5V ) V 1 V 2 V 3 V 4 V 5 R R R R R R R R R GND GND ( 1/4 bias, 1/8 or 1/11 duty ) -5V or GND ( 1/5 bias, 1/16 duty ) -5V or GND

15 APPICATION CIRCUIT C1 ~ C 16 DB 0 ~ DB 7 To MPU V5 V4 V3 V2 V1 M CK1 CK2 VSS OSC2 OSC1 D S1 ~ S 80 VSS VDD V 6 V 5 V 4 V 3 V 2 V 1 V EE D1 FCS SH1 SH2 KS0065B DR2 C1 C2 M SC 1 ~ SC 40 D2 DR1 VSS VDD V 6 V 5 V 4 V 3 V 2 V 1 V EE D1 FCS SH1 SH2 KS0065B DR2 C1 C2 M SC 1 ~ SC 40 D2 DR1 CD Panel VSS VDD V 6 V 5 V 4 V 3 V 2 V 1 V EE D1 FCS SH1 SH2 KS0065B DR2 C1 C2 M SC 1 ~ SC 40 D2 DR1 VDD V1 V 2 V3 V 4 V5 GND V CD ( 1/5 bias ) When KS0065B is externally connected to the, you can increase the number of display digits up to 80 characters.

16 PAD DIAGRAM Y (0,0) X CHIP SIZE : PAD SIZE : UNIT : ìm * Marking : easy to find the PAD No.1

17 PAD OCATION UNIT (µm) Standard Character Pattern (-00) PAD NAME COORDINATE COORDINATE COORDINATE Y X C9 C10 C11 C12 C13 C14 C15 C16 S40 S39 S38 S37 S36 S35 S34 S33 S32 S31 S30 S29 S28 S27 S26 S25 S24 S V3 V4 V5 CK1 CK2 VDD M D RS R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 C1 C2 C3 C4 C5 C6 C7 C S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 GND OSC1 OSC2 V1 V2 PAD NUMBER PAD NAME PAD NUMBER PAD NAME PAD NUMBER Y X Y X