RESONANT dc dc topologies demonstrate several advantages

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1 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 6, NOVEMBER/DECEMBER A Voltage Quadrupler Rectifier Based Pulsewidth Modulated LLC Converter With Wide Output Range Ming Shang and Haoyu Wang, Member, IEEE Abstract LLC resonant converter is a soft switching frequency modulated dc dc topology with its switching frequency near the resonant frequency. However, in applications where a wide output voltage is desired, it is extremely difficult to tune its operation close to the resonant frequency. In this paper, a novel pulsewidth modulated LLC type resonant converter based on voltage quadrupler rectifier is proposed. The proposed converter always operates at the resonant frequency and is able to achieve a wide output voltage range by modulating the duty cycle of the secondary side auxiliary MOSFET. This brings the benefits of the decreased circulating current and corresponding conduction loss, as well as the simplification of the parameters selection and magnetic component design. Zero-voltage-switching and zero-current-switching are realized among all power MOSFETs and all power diodes, respectively. Detailed circuit operation principles and modeling method are presented. A 1.3-kW converter prototype, generating V output from 390-V dc-link is designed. Both the circuit functionality and the theoretical analysis are verified in the experimental results. Index Terms LLC, pulsewidth modulation (PWM), voltage quadrupler, wide output voltage, zero-voltage-switching (ZVS). Fig. 1. Block diagram of a typical resonant dc dc converter. I. INTRODUCTION RESONANT dc dc topologies demonstrate several advantages including low switching losses and high conversion efficiency, high switching frequency and high power density, wide zero-voltage-switching (ZVS) range, and low electromagnetic interference [1] [3]. Fig. 1 provides the block diagram of typical resonant topologies [4]. As shown, a resonant converter usually consists of five stages: switch network, resonant tank, high-frequency transformer, secondary side rectifier, and low-pass filter. Based on the difference in the resonant tank configurations, resonant converters are classified into different categories. Among them, LLC resonant converter is considered as Manuscript received January 15, 2018; revised April 21, 2018; accepted June 19, Date of publication June 24, 2018; date of current version October 12, Paper 2018-IPCC-0061.R1, presented at the 2017 IEEE Applied Power Electronics Conference and Exposition, Tampa, FL, USA, Mar , and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Industrial Power Converter Committee of the IEEE Industry Applications Society. This work was supported in part by the National Natural Science Foundation of China under Grant , and in part by the Shanghai Sailing Program under Grant 16YF (Corresponding author: Haoyu Wang.) The authors are with the Power Electronics and Renewable Energies Laboratory, School of Information Science and Technology, Shanghai Tech University, Shanghai , China ( , shangming@shanghaitech.edu.cn; wanghy.shanghaitech@gmail.com). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TIA Fig. 2. DC voltage characteristics of LLC topology adapted to wide output voltage range. an attractive option in multiple applications, such as renewable energy systems [5], [6], LED lighting [7], [8], and plug-in electric vehicle (PEV) onboard chargers [9], [10]. It is worth mentioning that for the LLC converter, its voltage gain is regulated by frequency modulation. When the switching frequency (f s ) is matched with its resonance frequency (f r ), the normalized voltage gain is unity, while the circuit operation is considered as most efficient. This is because LLC topology demonstrates the minimum conduction losses and switching losses at the resonant frequency [11]. However, in applications where a wide output voltage range is required [12] [14], f s must swing in a wide range to fit this wide voltage gain range. This phenomenon can be observed from the gain-frequency curves of the LLC topology as plotted in Fig. 2. If the normalized frequency deviates above unity, the turning OFF current increases and the secondary side diodes lose IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See standards/publications/rights/index.html for more information.

2 6160 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 6, NOVEMBER/DECEMBER 2018 Fig. 3. Schematic of the proposed converter. zero-current-switching (ZCS) turning OFF feature. While, if the normalized frequency deviates below unity, both the circulating current and the component current stresses increase. In either approach, the circuit operation is no longer optimal. To alleviate this problem, different modified LLC type topologies are investigated in the literature [15] [22]. In [15], the output voltage is mainly regulated by frequency modulation. Pulsewidth modulation (PWM) control is introduced to change the circuit structure. This increases the control complexity. In [16], phase shift control is adopted on the secondary side. It mainly focuses on compensating the switching frequency deviation in hold-up mode, which usually happens in short time periods. The topologies proposed in [17] [19] mainly investigate wide input range applications and are not suitable for high output voltage applications. In [20], a PWM LLC topology is introduced to optimize the circuit operation in light load applications. In [21] and [22], two fixed frequency LLC topologies are proposed for PEV onboard charging applications. However, the converter structures are complicated with large components count. In [23], a novel LLC type resonant topology is proposed. This paper is the extension of the conference paper. This proposed converter achieves a wide output voltage range with f s tuned to f r. The output voltage and current are regulated by the duty cycle of the secondary side MOSFET. The proposed converter demonstrates benefits including 1) optimum operation of the main LLC power circuit; 2) ZVS turning ON of all active MOSFETs; 3) ZCS turning OFF of diodes on the secondary side; 4) reduced circuit control complexity; 5) reduced components voltage stresses on the second side; and 6) reduced circulating current and conduction losses. This paper is organized as follows. The proposed topology is presented in Section II. The modeling and design considerations are presented in Section III. Furthermore, experimental results of a 1.3-kW prototype are demonstrated in Section IV to validate the concept. Finally, Section V concludes the paper. II. PROPOSED CONVERTER A. Topology Description The schematic of the proposed converter is plotted in Fig. 3. The primary side structure is identical to that of full-bridge LLC resonant converter: all MOSFETs have a constant duty cycle close to 0.5. To prevent the circuit shoot through, the upper and lower power MOSFETs are turned ON and OFF complementarily with certain deadband (t dead ). The secondary side structure is Fig. 4. Converter equivalent circuits with (a) d = 0and(b)d = 1. derived from the conventional voltage quadrupler rectifier (VQR), which is composed of six diodes, four capacitors, and a two-quadrant switch. As shown, an active MOSFET (S 5 ) is added on the secondary side. The output voltage can be regulated by actively controlling the duty cycle of S 5. Therefore, the main LLC topology always operates at f r. B. Operation Principle In the proposed converter, the primary side full bridge generates a constant frequency (equals to f r ) square waveform. While on the secondary side, S 5 s switching frequency also equals to f r. In the secondary side, a phase shift time τt s is enforced between the turning ON actions of S 5 and S 2,3. The phase shift is enforced to facilitate the ZVS of S 5. d is the duty cycle of S 5.Ifd is below 0.5 τ or higher than 1 τ, the output voltage will be constant. This means that the converter loses its PWM feature. Therefore, to maintain an effective PWM, d should be constrained within the range of [0.5 τ, 1 τ]. However, it is also worth mentioning that 1) when d is within [0, 0.5 τ), the converter secondary side is equivalent to a voltage-doubler rectifier (VDR); 2) when d is within (1 τ, 1], the converter secondary side is equivalent to a VQR; and 3) in the normal mode, the effective duty cycles d e = d τ. It should be noted d e is within [0, 0.5]. 1) VDR Mode: In this mode, the operation principle is similar to that of the conventional LLC resonant converter. The equivalent circuit is plotted in Fig. 4(a). If d is 0, S 5 functions as a diode, and D 3,4 are OFF. All the MOSFETs and diodes can achieve ZVS turning ON and ZCS turning OFF, respectively. Meanwhile, voltage balance for C 3 and C 4 can be easily achieved. Therefore, the voltages across C 3 or C 4 are equal to half of the output voltage. In this mode, the output voltage is defined as V o = 2V DC n where n is the transformer turns ratio. (1)

3 SHANG AND WANG: VOLTAGE QUADRUPLER RECTIFIER BASED PULSEWIDTH MODULATED LLC CONVERTER ) VQR Mode: In this mode, the operation principle is also similar to that of the conventional LLC resonant converter. The equivalent circuit is illustrated in Fig. 4(b). If d is 1, S 5 is ON and D 1,2 are OFF. The circuit operation is similar to that in the VDR mode. All the MOSFETs and diodes can achieve ZVS turning ON and ZCS turning OFF, respectively. Meanwhile, the voltages across C 3 and C 4 are equal to half of the output voltage. The sum of the voltages across C 1 and C 2 also equal to half of the output voltage. The output voltage is defined as V o = 4V DC n (2) 3) Normal Mode: It should be noted that there is a secondary resonant frequency (f m ) in the LLC resonant tank. f m is the resonance frequency between (L r + L m ) and C r, f m = 1 2π (L r + L m ) C r. (3) The switching frequency is designed to be larger than f m.this ensures that the resonant tank works in the inductive region and guarantees the ZVS operation. The key steady-state waveforms of the converter in the normal mode (d = 0.5) are plotted in Fig. 5. As shown, a time delay, τ, is enforced between the turning ON actions of S 2 and S 5.In each switching cycle, there are 12 different operating modes. One specific switching period, [t 0,t 12 ), is extracted for detail analyses. Those operating modes correspond to 12 equivalent circuits as plotted in Fig. 6. The operating modes analysis is based on the assumption that C 1 4 is sufficiently large, such that its voltage ripples can be ignored. Thus, the capacitor voltages are considered as dc voltages, V 1 4, respectively. Mode I. [t 0,t 1 ): At t 0, the body diodes of S 2 and S 3 conduct. This creates a zero voltage condition for the turning ON of the MOSFETs. At t 0,theMOSFETs (S 2 and S 3 ) channels are turned ON with ZVS. S 5 is OFF in this mode. The voltage across L m is nv 2. According to Fig. 5, the secondary side current (i s )is negative. The body diode of S 5 and D 4 start to conduct as shown in Fig. 6. Mode II. [t 1,t 2 ): Mode II begins at t 1 when D 5 begins to conduct. The current through L m (i Lm ) continues to decrease linearly. Mode III. [t 2,t 3 ): At t 2, S 5 is turned ON with ZVS. In the previous mode, i s flows through the body diode of S 5. Before the S 5 s channel conducts, the voltage across S 5 has been discharged to be zero. Hence, ZVS can be achieved in S 5. In mode III, i s flows through the channel of S 5 instead of its body diode. Mode IV. [t 3,t 4 ): Mode IV begins at t 3 when the current through the inductor (i Lr ) becomes negative. L r continues to resonate with the resonant capacitor (C r ). i s keeps flowing through the channel of S 5. Mode V. [t 4,t 5 ): At t 4, the current through the rectifier D 5 (i D 5 ) reaches zero. In this mode, the zero current turn-off of D 5 is achieved. D 5 is OFF during this mode. Fig. 5. Steady state operation waveforms in normal mode. Mode VI. [t 5,t 6 ): Mode VI begins at t 5 when i D 4 reaches zero. Meanwhile, i Lm intersects with i Lr. In this mode, the zero current turn-off of D 4 is achieved. Mode VII. [t 6,t 7 ): Mode VII begins at t 6 when S 2,3 are turned OFF simultaneously. At the beginning of this mode, i Lr discharges and charges the output capacitors of S 1 4, and then flows through the body diodes of S 1 and S 4. Thus, v ab is inverted from V DC to V DC while i s is kept zero. Mode VIII. [t 7,t 8 ): At t 7, S 1,4 are both turned ON with zero voltage. The voltage across L m is nv 1. In this mode, the secondary side D 3 and D 6 continue to conduct, and i s changes to positive. Mode VIII ends when i Lr reaches zero. Mode IX. [t 8,t 9 ): At t 8, i Lr begins to change its polarity to positive. i Lm continue to increase linearly since the voltage across the L m is positive. Mode IX ends when S 5 is turned OFF. Mode X. [t 9,t 10 ): Mode X starts as S 5 is turned OFF at t 9. Since i Lr is continuous, the current path is switched from S 5 to D 2. Hence, the voltage across L m is n(v 1 + V 2 ). i Lm continues to increase linearly in this mode. Mode X ends when i s reaches zero.

4 6162 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 6, NOVEMBER/DECEMBER 2018 Fig. 6. Operation modes breakdown. Mode XI. [t 10,t 11 ): At t 10, i s reaches zero. Meanwhile, D 2,3,6 turn OFF with zero current. Mode XI ends when S 1 and S 4 are turned OFF at t 11. Mode XII. [t 11,t 12 ): Mode XII begins in the deadband at t 11. i Lr discharges and charges the output capacitors of S 1 4, and then flows through the body diodes of S 2 and S 3. Mode XII ends when the switch pattern of S 1 S 4 inverts again. This also denotes the beginning of the next switching period. III. MODELINGS AND DESIGN CONSIDERATIONS A. Equivalent Models Based on the steady-state analysis in Section II-B, the equivalent circuit models can be obtained. The following analysis is based on the approximation that the narrow time intervals, t 5 t 7 and t 11 t 12, can be neglected. Moreover, the voltage source and the impedance on the secondary side of the transformer can

5 SHANG AND WANG: VOLTAGE QUADRUPLER RECTIFIER BASED PULSEWIDTH MODULATED LLC CONVERTER 6163 Fig. 9. Normalized voltage gain versus equivalent R and d e. Fig. 7. Equivalent models. (a) State I: t 0 t<t 5. (b) State II: t 7 t<t 9. (c) State III: t 9 t<t 10. (d) State IV: t 10 t<t 11. Therefore, the peak value of the current through D 6 is Fig. 8. Gate signals and simplified current waveforms. i D 6 peak = 4V o. (5) 3Rd e Thus, the peak value of i Lr is i Lr peak = 8V o. (6) 3Rnd e Assuming the voltage on C r is sine wave, its peak value is V Cr peak = 8 2πL r f r V o. (7) nr In State III, the output voltage source is changed to nv C 4, i Lr (t) begins to decrease from i Lr peak. In State IV, no power is delivered to the secondary side. Based on the law of energy conservation and assuming the converter is ideal without intermediate power loss, the input power is equal to the power delivered to the load. Thus, the output voltage can be derived as V O = 12nV DC R [4L m f r d e + f r ] d e 4L m f r [3Rn 2 d 2 e + 32f r + 96πL r f r (1 4d e )d 2 e] be transferred to the primary side with a certain ratio. The resultant equivalent circuit models and the corresponding current waveforms are plotted in Figs. 7 and 8, respectively. B. Voltage Conversion Ratio As shown in Fig. 7, in State I, the input voltage source reverts its polarity. L r resonates with C r. This is similar to the VQR mode as analyzed in Section II-B. The peak value of i Lm is i Lm peak = V DC 4L m f r. (4) In State II, the output voltage source is changed from nv C 2 to nv C 1. i Lr (t) begins to increase from i Lm peak. i D 6 (t) increases from zero. According to the bottom curve in Fig. 8, the average value of i D 6 (t) equals to the output current, i o. + 4V DC n. (8) Fig. 9 plots the normalized output voltage gain versus the effective load resistance and the effective duty cycle. As shown, the output voltage is a strong function of the effective duty cycle and a weak function of the effective load resistance. This means that the voltage gain can be easily regulated by PWM. C. Design Considerations 1) Selection of L m : f r, Q, and L n are the resonant frequency, quality factor, and inductor ratio, and R is the output load resistance. f r, Q, and L n can be designed based on the first-harmonic approximation method f r = 1 2π L r C r (9)

6 6164 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 6, NOVEMBER/DECEMBER 2018 Fig. 10. Equivalent circuit during t dead.(a)i Lm < 0. (b) i Lm > 0. L n = L m (10) L r Lr /C r Q = n 2 R. (11) The detailed analysis has been discussed comprehensively in [24] and [25]. The LLC module always operates at f r and has no voltage regulation capability. Thus, since the increase of L m reduces the circuiting current, L m should be designed to be as large as possible. While the upper limit of L m can be found based on the ZVS requirement. According to the aforementioned operational principles analysis, once the output capacitance of MOSFET (C oss )isfullydischarged and the body diode of the MOSFET is in the ON-state during t dead,zvsof MOSFET is achieved. Fig. 10 illustrates the output capacitances charging/discharging processes of the primary-side MOSFETs. In Fig. 10, i Lm peak is the peak value of i Lm, and can be calculated by (4). In order to improve the accuracy of analysis, the transformer primary side parasitic capacitance C tr should be considered. Thus, selection of L m and t dead should comply with this inequation L m t dead 8 (C oss + 0.5C tr ) f r. (12) 1) Design of the Phase Shift Time: To ensure the ZVS turning-on of S 5, the phase shift time τt s has to be sufficiently large. In this work, τ is selected as 0.125, mainly to reserve enough margin to ensure a secure zero voltage condition of S 5. With two different effective duty cycles (d e and d e), the gate signals and current waveforms of S 5 (v gs5, v gs5, i S 5, and i S 5 )are plotted in Fig. 11. At t 1, the inversion layer of S 5 is formed, the negative current commutates from the body diode to the MOSFET channel. This is mainly because the MOSFET channel demonstrates a low on resistance and voltage drop. Therefore, the negative half cycle of i S 5 can always be divided into diode conduction (t 0, t 1 ] and MOSFET channel conduction (t 1,t 2 ]. Since τt s equals to t 1 t 0, the duration of those two operation regions can be regulated by τ. Typically, the voltage drop of MOSFET channel is lower than that of the body diode. Thus, reducing τ helps to reduce the corresponding semiconductor conduction loss. Fig. 11. Gate signals and simplified current waveforms. Fig. 12. Equivalent circuit in [t 0,t 2 ). According to KCL at node A in Fig. 12 and based on the charge balance of C 3 I o = i o (t) = i D 5 (t) + i C 3 (t) (13) i C 3 (t) = 0. (14) Thus, i D 5 (t) can be derived as i D 5 (t) = πv o sin ωt (15) R where ω equals to 2πf r. During [t 0,t 2 ) in Fig. 11, i s5 (t) equals to 2i D 5 (t) and can be derived directly from (15). Integral of i s5 (t) during [t 0,t 2 ) should be larger than the charge stored in output capacitance of S 5 (C oss5 ) to ensure the ZVS turning ON of S 5. Hence τ arccos(1 C R ωv 2 ) (16) ω where V 2 is the voltage across the output capacitor C 2. IV. EXPERIMENTAL RESULTS To verify the effectiveness of the proposed converter, a 390 V input, 250 V 420 V output, 1.3 kw, 100 khz converter prototype

7 SHANG AND WANG: VOLTAGE QUADRUPLER RECTIFIER BASED PULSEWIDTH MODULATED LLC CONVERTER 6165 TABLE I CIRCUIT SPECIFICATIONS AND DESIGN PARAMETERS Fig. 13. Fig. 14. Fig. 15. ZVS of S5 in normal mode with V o = 420 V. Fig. 16. ZVS of S 1 and S 3 in normal mode. Fig. 17. ZVS and ZCS the converter in normal mode with V o = 250 V. Converter operation waveforms in VDR mode. Converter operation waveforms in VQR mode. is designed and tested. The specifications and design parameters are summarized in Table I. Fig. 13 shows the converter operation in VDR mode at fr. As illustrated, the ZVS turning ON of S4 is achieved. il r lags vab with 390 V input. Fig. 14 demonstrates the circuit operation in VQR mode at fr. As shown, vds1 is discharged to zero before the channel of S1 is triggered. Therefore, S1 is turned ON with ZVS. il r leads vc r, validating an inductive resonant tank. Figs. 15 and 16 demonstrate the circuit operations at normal mode with output equals to 420 V. As shown in Fig. 15, the body diode of the S5 conducts before the conduction of MOSFET channel. This guarantees the ZVS turning ON of S5. As shown in Fig. 16, vds1 and vds3 drop to zero before the conduction of MOSFET channels. il r charges and discharges the corresponding output capacitors of MOSFETs. Therefore, ZVS is achieved on both primary side MOSFETs as well.

8 6166 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 6, NOVEMBER/DECEMBER 2018 Fig. 18. Experimental results of startup process with PWM method. Fig. 17 demonstrates the circuit operations at normal mode with output voltage equals to 250 V. At this operating point, the all primary side MOSFETs achieve ZVS. This can be observed from the waveforms of v gs4 and v ds4.thewaveformsofi D 5 and i D 6 show the ZCS turning OFF of the secondary diodes. In this paper, a variable duty cycle soft-start control strategy based on the output voltage is adopted. Initially, the primary side duty cycle d p is set as 0.1 to reduce the voltage and current stress in the resonant tank. Then, d p increases step by step based on Δd p =ΔV o (0.5 d 0 )/420, gradually moving on to 0.5 (ignoring the deadband) to allow the output voltage to build up. Fig. 18 shows the experimental waveforms of the soft-start process. The waveforms of the start-up current, primary side duty cycle d p, and the output voltage are captured. The experimental data are captured by the oscilloscope (Tektronix MDO4034B-3) in the peak detect acquisition mode. In this sampling mode with large time scale, signals ripples appear to be larger than their real values. This can be corrected in the zoom-in waveforms with a much smaller time scale (see Fig. 18). The experimental results show that the output voltage builds up smoothly without any severe current and voltage spikes. This soft-start process well protects the circuit. Fig. 19 demonstrates the mode transition with a 500-Ω resistive load. Three operation modes are illustrated: 1) VQR mode, S 5 s duty cycle is set as 1 and the output voltage is 440 V; 2) normal mode, S 5 s duty cycle is changed to 0.72 and the output voltage is 420 V; and 3) VDR mode, S 5 s duty cycle is changed to and the output voltage steps to 230 V. The mode transition is triggered by programming S 5 s duty cycle. It can be seen a rather smooth mode transition is achieved. The load transition waveforms are captured in Fig. 20. The output voltage is regulated to be always equal to 420 V. A simple digital PI compensator is employed in the controller. When the step changes of load resistance occurs, a fast dynamic response is obtained. As shown in Fig. 20, the output voltage is well regulated with small variation. According to (8), the curve of theoretically predicted output voltage versus duty cycle is plotted in Fig. 21. While the simulated and experimental data are also marked in the same figure. Fig. 19. Fig. 20. Experimental waveforms of the mode transition. Converter dynamic responses. As shown, the output voltage increases with the increase of the duty cycle. The theoretically predicted curve generally agrees with the simulated and experimental results with an acceptable error. At d = 0.425, there is 8.3% error between the theoretically predicted value and the experimental result. With the increase of the output voltage, this error decreases. The error mainly originates from the approximation and simplification adopted in the circuit modeling.

9 SHANG AND WANG: VOLTAGE QUADRUPLER RECTIFIER BASED PULSEWIDTH MODULATED LLC CONVERTER 6167 Fig. 21. Output voltage versus duty cycle with 150-Ω resistive load. V. CONCLUSION In this paper, a novel PWM LLC type resonant converter is proposed for wide output voltage range applications. The circuit operation principles are analyzed. The advantages of the proposed converter are detailed. The converter can always operate at its resonant frequency by adopting PWM on the secondary side. Meanwhile, it is worth to mention that hybridizing pulse width and frequency modulations is also feasible. This hybridization increases the output voltage range with reduced normalized voltage gain range of the LLC topology. A 1.3-kW converter prototype is designed to verify the proof of concept. The proposed converter topology is worthy approaching in applications where wide voltage gain range is desired. REFERENCES Fig. 22. Measured converter efficiency versus output power with different τ and V O. Fig. 23. V O. Measured converter efficiency versus output power with different Fig. 22 shows the efficiency curves of the proposed converter with 390 V input, different output voltages (250 V, 420 V) and different phase shift time (τ = 0.125, 0.725). It can be seen that the efficiency is improved by nearly 0.5% with reduced τ.thisis because the current is redirected to the MOSFET channel instead of its body diode. Thus, the conduction loss of secondary side MOSFET S 5 is reduced. This agrees with the phase shift time analysis in Section III. Fig. 23 shows the efficiency curves of the proposed converter with 390 V input and different output voltages (250 V, 390 V, 420 V). When the output voltage is 420 V, the peak efficiency is 93.94%. This prototype demonstrates overall good efficiency over wide output voltage and wide output power range. [1] S. W. Kang, H. J. Kim, and B. H. Cho, Adaptive voltage controlled oscillator for improved dynamic performance in LLC resonant converter, IEEE Trans. Ind. Appl., vol. 52, no. 2, pp , Mar./Apr [2] J. Zhang, W. G. Hurley, and W. H. Wolfle, Gapped transformer design methodology and implementation for LLC resonant converters, IEEE Trans. Ind. Appl., vol. 52, no. 1, pp , Jan [3] C. Shi, H. Wang, S. Dusmez, and A. Khaligh, A SiC-Based highefficiency isolated onboard PEV charger with ultrawide DC-Link voltage range, IEEE Trans. Ind. Appl., vol. 53, no. 1, pp , Jan [4] H. Wang, A hybrid ZVS resonant converter with reduced circulating current and improved voltage regulation performance, in Proc. IEEE Transport. Electrific. Conf. Expo, 2015, pp [5] Q. Zhang et al., A center point iteration MPPT method with application on the frequency-modulated LLC microinverter, IEEE Trans. Power Electron., vol. 29, no. 3, pp , Mar [6] M. Shang, H. Wang, and Q. Cao, Reconfigurable LLC topology with squeezed frequency span for high-voltage bus-based photovoltaic systems, IEEE Trans. Power Electron., vol. 33, no. 5, pp , May [7] S. W. Hong et al., Secondary-side LLC resonant controller IC with dynamic PWM dimming and dual-slope clock generator for LED backlight units, IEEE Trans. Power Electron., vol.26,no.11,pp ,Nov [8] C. A. Cheng, H. L. Cheng, and T. Y. Chung, A novel single-stage highpower-factor LED street-lighting driver with coupled inductors, IEEE Trans. Ind. Appl., vol. 50, no. 5, pp , Sep [9] X. Fang, H. Hu, and Z. J. Shen, Operation mode analysis and peak gain approximation of the LLC resonant converter, IEEE Trans. Power Electron., vol. 27, no. 4, pp , Apr [10] J. Lee and H. Chae, 6. 6-kW onboard charger design using DCM PFC converter with harmonic modulation technique and two-stage DC/DC converter, IEEE Trans. Ind. Electron., vol. 61, no. 3, pp , Mar [11] W. Feng, P. Mattavelli, and F. C. Lee, Pulsewidth locked loop (PWLL) for automatic resonant frequency tracking in LLC DC DC transformer (LLC -DCX), IEEE Trans. Power Electron., vol.28,no.4,pp ,Apr [12] Z. Fang, T. Cai, S. Duan, and C. Chen, Optimal design methodology for LLC resonant converter in battery charging applications based on time-weighted average efficiency, IEEE Trans. Power Electron., vol. 30, no. 10, pp , Oct [13] C. Buccella, C. Cecati, H. Latafat, P. Pepe, and K. Razi, Observer-Based control of LLC DC/DC resonant converter using extended describing functions, IEEE Trans. Power Electron., vol. 30, no. 10, pp , Oct [14] F. Musavi, M. Craciun, D. S. Gautam, W. Eberle, and W. G. Dunford, An LLC resonant DC DC converter for wide output voltage range battery charging applications, IEEE Trans. Power Electron., vol. 28, no. 12, pp , Dec [15] H. Wu, Y. Li, and Y. Xing, LLC resonant converter with semiactive variable-structure rectifier (SA-VSR) for wide output voltage range application, IEEE Trans. Power Electron., vol. 31, no.5, pp ,May 2016.

10 6168 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 6, NOVEMBER/DECEMBER 2018 [16] H. Wu, T. Mu, X. Gao, and Y. Xing, A secondary-side phase-shiftcontrolled LLC resonant converter with reduced conduction loss at normal operation for hold-up time compensation application, IEEE Trans. Power Electron., vol. 30, no. 10, pp , Oct [17] I. H. Cho, Y. Do Kim, and G. W. Moon, A half-bridge llc resonant converter adopting boost PWM control scheme for hold-up state operation, IEEE Trans. Power Electron., vol. 29, no. 2, pp , Feb [18] X. Sun, Y. Shen, Y. Zhu, and X. Guo, Interleaved boost integrated LLC resonant converter with fixed-frequency PWM control for renewable energy generation applications, IEEE Trans. Power Electron., vol.30,no.8, pp , Aug [19] X. Sun, X. Li, Y. Shen, B. Wang, and X. Guo, Dual-Bridge LLC resonant converter with fixed-frequency PWM control for wide input applications, IEEE Trans. Power Electron., vol. 32, no. 1, pp , Jan [20] F. Ajmal, H. Pan, C. He, G. Chen, and H. Chen, Pulse-width modulation control strategy for high efficiency LLC resonant converter with light load applications, IET Power Electron., vol. 7, no. 11, pp , Nov [21] C. Liu et al., High-Efficiency hybrid full-bridge half-bridge converter with shared ZVS lagging leg and dual outputs in series, IEEE Trans. Power Electron., vol. 28, no. 2, pp , Feb [22] B. Gu, C. Y. Lin, B. F. Chen, J. Dominic, and J. S. Lai, Zero-voltageswitching PWM resonant full-bridge converter with minimized circulating losses and minimal voltage stresses of bridge rectifiers for electric vehicle battery chargers, IEEE Trans. Power Electron., vol. 28, no. 10, pp , Oct [23] M. Shang and H. Wang, A LLC type resonant converter based on PWM voltage quadrupler rectifier with wide output voltage, in Proc. IEEE Appl. Power Electron. Conf. Expo., 2017, pp [24] C. Y. Hsu, J. T. Lai, M. C. Lin, M. K. Yang, M. J. Li, and R. W. Huang, The design and implementation of LLC resonant half-bridge converter with natural interleaved power-factor-correction, in Proc. Int. Conf. Power Electron. Drive Syst., 2011, pp [25] R. Beiranvand and B. Rashidian, Using LLC resonant converter for designing wide-range voltage source, IEEE Trans. Power Electron., vol.58, no. 5, pp , May Ming Shang was born in Jiangsu Province, China. He received the B.S. degree from the College of Information and Control Engineering, China University of Petroleum, Qingdao, China, in 2015, and is currently working toward the M.S. degree with the School of Information Science and Technology, ShanghaiTech University, Shanghai, China. His research interests include dc dc converters and renewable power systems. Haoyu Wang (S 12 M 14) received the bachelor s degree with distinguished honor from Zhejiang University, Hangzhou, China. He received the master s and Ph.D. degrees both in electrical engineering from the University of Maryland, College Park, MD, USA. He is currently a Tenure Track Assistant Professor with the School of Information Science and Technology, ShanghaiTech University, Shanghai, China. His research interests include power electronics, plug-in electric and hybrid electric vehicles, the applications of wide bandgap semiconductors, renewable energy harvesting, and power management integrated circuits. Dr. Wang is an Associate Editor of IEEE TRANSACTIONS ON TRANSPORTA- TION ELECTRIFICATION, and a Guest Associate Editor of CPSS Transactions on Power Electronics and Applications.

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