SNAP01 Class AB Power Amplifier

Transcription

1 SNAP0 ============== CONTENTS ==============. GENERAL DESCRIPTION.... FEATURES.... BLOCK DIAGRAM.... PIN ASSIGNMENT.... ELECTRICAL CHARACTERISTICS..... ABSOLUTE MAXIMUM RATINGS..... DC CHARACTERISTICS (TA= ).... APPLICATION CIRCUIT..... CURRENT DAC APPLICATION WITH SINGLE-END MODE..... PWM WITH DIFFERENTIAL MODE..... PUSH-PULL DAC WITH SINGLE-END MODE..... PUSH-PULL DAC WITH DIFFERENTIAL MODE..... SINGLE-END WITH MIXED DIFFERENTIAL MODE WITH MIXED.... PACKAGE/PAD LOCATIONS..... SNAP0H (DI)..... SNAP0PG (DIP GREEN PACKAGE)..... SNAP0SG (SOP GREEN PACKAGE)...

2 SNAP0 AMENDENT HISTORY VERSION DATE DESCRIPITION V.0 September, 00 First issue V. October, 00 Advise Application Circuit V. November, 00 Revise Package information. V. November, 00. Revise Operation current.. Revise package information. V. August,0 Revise Package information

3 SNAP0. General Description The SNAP0 is an integrated class AB mono speaker driver. The SNAP0 consist of single power supply, no switch-on/off click, high SNR ratio, power control, single-end/differential input mode and support Gain adjusted by external resistor.. Features Operation voltage:.v-.v. High signal-to-noise ratio. Low distortion. High slew rate. No switch On/Off click. Power off control. Gain adjustment. Large output voltage swing. Direct driver speaker. Support single-end and differential mode. Low standby current:.0µa.. Block Diagram K VIN VM VREF K K - K Vbias OPA K K O- - OPB O Enable Clickless/Depop CKT Power CKT VDD

4 SNAP0. Pin Assignment Pin No. Symbol I/O Function Description VM I Signal Input Positive VIN I Signal Input Negative I Negative Power Supply VREF O Voltage Reference I Chip Enable, High Active O O Positive Output VDD I Positive Power Supply O- O Negative Output. Electrical Characteristics.. Absolute Maximum Ratings Characteristic Symbol Min Max Unit Supply Voltage VDD V Operating Temperature TOG 0 Storage Temperature TSTG -

5 SNAP0.. DC Characteristics (Ta= ) Parameter Symbol Min Typical Max Unit Condition Supply Power VDD. -. V Standby Current ISTB - - µa =Low Operating Current Chip Enable VDD/ V Reference Voltage Output Current Signal to Noise Ratio The Harmonic Distortion Noise Output Power Enable Time Gain - - ma VDD=.0V, =High, No load & IOP VIN and VM is floating. VDD=.V - - ma =High, No load & VIN and VM is floating. V>/VDD = High V</VDD = Low VREF - VDD/ - V =High, =Low, VREF =VDD Io ma VDD=.0V, RL=Ω ma VDD=.V, RL=Ω SNR - - db Single-End Mode - - db Differential Mode THDN - - % VDD=.0V, RL=Ω P=0.W - - % VDD=.V, RL=Ω P=0.W POUT W VDD=.V, RL=Ω, THDN=% W VDD=.V, RL=Ω, THDN=0% TON - - ms VDD=.V - - ms VDD=.0V Single-end mode Gain=K/(KR) 0 Differential-mode Gain=K/(KR) Note:TON is the time from high (chip enable) to O or O- output.

6 SNAP0. Application Circuit.. Current DAC application with Single-End Mode S U P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SNC x VDD R ST B UO B UO R 0K R K 0.uF C C 0.uF Current DAC with SINGLE-END MODE R R U VM O- VIN VDD O VR EF VC C SNAP0 C uf SPEAKER C 0.uF

7 SNAP0.. PWM with Differential Mode S U P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SN Cx VDD RST BUO BUO R 0K C 0.uF VM VIN PWM with Differnetial Mode R R R R U VM O- VIN VDD O VREF SNAP0 C uf C 0.uF SPEAKER

8 SNAP0.. Push-Pull DAC with Single-End Mode S 0 P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SN C00 U VD D R ST BUO BUO TEST 0 R 0K 0.uF C C 0.uF PUSH-PULL DAC with SINGLE-END MODE R R U VM O- VIN VD D O VREF SNAP0 SPEAKER C uf C 0.uF

9 SNAP0.. Push-Pull DAC with Differential Mode S 0 P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SNC00 U VDD R ST BUO BUO TEST 0 R 0K C 0.uF VM VIN C uf R SNAP0 C 0.uF R R U VM O- VIN VDD O VREF C 0.uF R PUSH-PULL DAC with DIFFERENTIAL MODE SPEAKER C 0.uF

10 SNAP0.. SINGLE-END with MIXED S S 0 P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SNC00 0 P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SNC00 U VD D RST BU O BU O TEST U VD D RST BU O BU O TEST 0 0 R 0K R 0K C 0.uF C 0.uF C 0.uF C 0.uF SINGLE-END MODE with Push Pull DAC R R U VM O- VIN VD D O VR EF C E SNAP0 C uf SPEAKER R R C 0.uF 0

11 SNAP0.. Differential Mode with Mixed S S 0 P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SNC00 0 P.0 P. P. P. P.0 P. P. P. P.0 P. P. P. SNC00 U VD D RST BU O BU O TEST U VD D RST BU O BU O TEST 0 0 R 0K R 0K C 0.uF C 0.uF C 0.uF C 0.uF C 0.uF C 0.uF DIFFERENTIAL MODE with MIXED R R R R U VM O- VIN VD D O VR EF C E SNAP0 C uf R R R R SPEAKER C 0.uF

12 SNAP0. PACKAGE/PAD LOCATIONS.. SNAP0H (Dice) PAD Assignment NO PAD NAME X(um) Yum) NO PAD NAME X(um) Yum) VM O.. VIN O VDD -.. VREF O O- -.. VDD O- O O- 0 O (0.00,0.00) VM VIN VREF CHIP SIZE: X=um,Y=0um Note:.The VDD pin MUST bonding to VDD in PCB layout..the substrate MUST be connected to in PCB layout.

13 SNAP0.. SNAP0PG (DIP Green Package) -pin DIP (00mil) Outline Dimensions Pin No. Symbol I/O Function Description VM I Signal Input Positive VIN I Signal Input Negative I Negative Power Supply VREF O Voltage Reference I Chip Enable, High Active O O Positive Output VDD I Positive Power Supply O- O Negative Output

14 .. SNAP0SG (SOP Green Package) -pin SOP (0mil) Outline Dimensions Pin No. Symbol I/O Function Description VM I Signal Input Positive VIN I Signal Input Negative I Negative Power Supply VREF O Voltage Reference I Chip Enable, High Active O O Positive Output VDD I Positive Power Supply O- O Negative Output SNAP0

15 SNAP0 DISCLAIMER The information appearing in SONiX web pages ( this publication ) is believed to be accurate. However, this publication could contain technical inaccuracies or typographical errors. The reader should not assume that this publication is error-free or that it will be suitable for any particular purpose. SONiX makes no warranty, express, statutory implied or by description in this publication or other documents which are referenced by or linked to this publication. In no event shall SONiX be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, including, without limitation, those resulting from loss of use, data or profits, whether or not advised of the possibility of damage, and on any theory of liability, arising out of or in connection with the use or performance of this publication or other documents which are referenced by or linked to this publication. This publication was developed for products offered in Taiwan. SONiX may not offer the products discussed in this document in other countries. Information is subject to change without notice. Please contact SONiX or its local representative for information on offerings available. Integrated circuits sold by SONiX are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. The application circuits illustrated in this document are for reference purposes only. SONIX DISCLAIMS ALL WARRANTIES, INCLUDING THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. SONIX reserves the right to halt production or alter the specifications and prices, and discontinue marketing the Products listed at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SONIX for such application.