I D = 34A 70 T J = 125 C V GS, Gate -to -Source Voltage (V)

Transcription

1 R DS(on), Drain-to -Source On Resistance (m ) R DS (on), Drain-to -Source On Resistance (m ) IR MOSFET DirectFET Power MOSFET Typical values (unless otherwise specified) Quality Requirement Category: Consumer V DSS V GS R DS(on) (typ.) Applications RoHS Compliant Lead-Free (Qualified up to 260 C Reflow) 0V min. Q g tot 28nC ± 20V max Q gd V V gs(th) 3.7V Application Specifies MOSFETs Ideal for High Performance Isolated Converter Primary Switch Socket D G S D Optimized for Synchronous Rectification S Low Conduction Losses Low Profile (< 0.7mm) MN DirectFET ISOMETRIC Dual Sided Cooling Compatible Compatible with existing Surface Mount Techniques Applicable DirectFET Outline and Substrate Outline (see pg. 13, 14 for details) SH SJ SP MZ MN Description The combines the latest HEXFET Power MOSFET Silicon technology with the advanced DirectFET packaging to achieve the lowest on-state resistance in a package that has a footprint of a SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-35 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems improving previous best thermal resistance by 80%. The is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications (36V-75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes the device ideal for high performance isolated DC-DC converters I D = 34A VGS = 7.0V VGS = 8.0V VGS = V VGS = 12V T J = 125 C T J = 25 C V GS, Gate -to -Source Voltage (V) I D, Drain Current (A) Figure 1 Typical On-Resistance vs. Gate Voltage Figure 2 Typical On-Resistance vs. Drain Current Final Datasheet Please read the important Notice and Warnings at the end of this document

2 Table of Contents Table of Contents Applications Description. 1 Table of Contents Parameters 3 2 Maximum ratings, Thermal, and Avalanche characteristics 4 3 Electrical characteristics 5 4 Electrical characteristic diagrams 6 Package Information 13 Qualification Information 16 Revision History.. 17 Final Datasheet 2

3 Parameters 1 Parameters Table1 Key performance parameters Parameter Values Units V DS 0 V R DS(on) max 13 m I T 25 C 57 A I T 25 C A Final Datasheet 3

4 Maximum ratings and thermal characteristics 2 Maximum ratings and thermal characteristics Table 2 Maximum ratings (at T J=25 C, unless otherwise specified) Parameter Symbol Conditions Values Unit Continuous Drain Current (Silicon Limited) I D T C = 25 C, V V 57 Continuous Drain Current (Silicon Limited) I D T C = 70 C, V V 46 Continuous Drain Current (Silicon Limited) I D T A= 25 C, V V A Pulsed Drain Current I DM T C = 25 C 228 Maximum Power Dissipation P D T C = 25 C 89 Maximum Power Dissipation P D T C = 70 C 57 W Maximum Power Dissipation P D T A = 25 C 2.8 Gate-to-Source Voltage V GS - ± 20 V Peak Soldering Temperature T P Operating and Storage Temperature T J, T STG C Table 3 Thermal characteristics Parameter Symbol Conditions Min. Typ. Max. Unit Junction-to-Ambient R JA Junction-to-Ambient R JA Junction-to-Ambient R JA C/W Junction-to-Case R JC Junction-to-PCB Mounted R JA-PCB Table 4 Avalanche characteristics Parameter Symbol Values Unit Single Pulse Avalanche Energy E AS 86 mj Avalanche Current I AR 34 A Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. (Starting T J = 25 C, L = 0.15mH, R G = 50, I AS = 34A. Pulse width 400µs; duty cycle 2%. Used double sided cooling, mounting pad with large heat sink. Mounted on minimum footprint full size board with metalized back and with small clip heat sink. R is measured at T J of approximately 90 C. Final Datasheet 4

5 Electrical characteristics 3 Electrical characteristics Table 5 Static characteristics Parameter Symbol Conditions Values Min. Typ. Max. Unit Drain-to-Source Breakdown Voltage V (BR)DSS V GS = 0V, I D = 250µA V Breakdown Voltage Temp. Coefficient V (BR)DSS/ T J Reference to 25 C, I D = 1mA V/ C Static Drain-to-Source On-Resistance R DS(on) V GS = V, I D = 34A m Gate Threshold Voltage V GS(th) V V DS = V GS, I D = 150µA Gate Threshold Voltage Temp. Coefficient V GS(th)/ T J mv /C Drain-to-Source Leakage Current I DSS V DS = 0V, V GS = 0V - V DS = 80V, V GS = 0V, T J = 125 C µa Gate-to-Source Forward Leakage I GSS V GS = 20V I GSS V GS = -20V na Gate Resistance R G Table 6 Dynamic characteristics Values Parameter Symbol Conditions Unit Min. Typ. Max. Forward Trans conductance gfs V DS = V, I D = 34A S Total Gate Charge Q g Pre-Vth Gate-to-Source Charge Q gs1 I D = 34A Post-Vth Gate-to-Source Charge Q gs2 V DS = 50V nc Gate-to-Drain Charge Q V GS gd = V See Fig.8 Gate Charge Overdrive Q godr Switch Charge (Qgs2 + Qgd) Q sw Output Charge Q oss V DS = 16V,V GS = 0V nc Turn-On Delay Time t d(on) V DD = 50V Rise Time t r I D = 34A Turn-Off Delay Time t d(off) R G = ns Fall Time t f V GS = V Input Capacitance C iss V GS = 0V Output Capacitance C oss V DS = 50V Reverse Transfer Capacitance C rss ƒ = 1.0MHz pf Output Capacitance C oss V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz Output Capacitance C oss V GS = 0V, V DS = 80V, ƒ = 1.0MHz Table 7 Reverse Diode Values Parameter Symbol Conditions Unit Min. Typ. Max. Continuous Source Current MOSFET symbol D I S (Body Diode) showing the G A Pulsed Source Current integral reverse I SM S (Body Diode) p-n junction diode. Diode Forward Voltage V SD T J = 25 C, I S = 34A,V GS = 0V V Reverse Recovery Time t rr T J = 25 C, I F = 34A, V DD = 50V ns Reverse Recovery Charge Q rr di/dt = 0A/µs nc Final Datasheet 5

6 Electrical characteristic diagrams 4 Electrical characteristic diagrams I D, Drain-to-Source Current (A) VGS TOP 15V V 8.0V 7.0V 6.0V BOTTOM 5.0V 5.0V I D, Drain-to-Source Current (A) 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V BOTTOM 5.0V 5.0V 60µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) 60µs PULSE WIDTH Tj = 150 C V DS, Drain-to-Source Voltage (V) Figure 3 Typical Output Characteristics Figure 4 Typical Output Characteristics I D, Drain-to-Source Current (A) T J = 150 C T J = 25 C V DS = 50V 60µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2.4 I D = 34A V GS = V T J, Junction Temperature ( C) Figure 5 Typical Transfer Characteristics Figure 6 Normalized On-Resistance vs. Temperature Final Datasheet 6

7 C, Capacitance (pf) IR MOSFET Electrical characteristic diagrams V GS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C iss C oss C rss V GS, Gate-to-Source Voltage (V) I D = 34A V DS = 80V V DS = 50V VDS= 20V V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Figure 7 Typical Capacitance vs. Drain-to-Source Voltage Figure 8 Typical Gate Charge vs. Gate-to-Source Voltage 00 I SD, Reverse Drain Current (A) 0 T J = 150 C T J = 25 C 1 V GS = 0V V SD, Source-to-Drain Voltage (V) I D, Drain-to-Source Current (A) 0 OPERATION IN THIS AREA LIMITED BY R DS (on) 0µsec 1msec 1 Tc = 25 C msec Tj = 150 C DC Single Pulse V DS, Drain-to-Source Voltage (V) Figure 9 Typical Source-Drain Diode Forward Voltage Figure Maximum Safe Operating Area Final Datasheet 7

8 Electrical characteristic diagrams Drain Current (A) I D, Gate threshold Voltage (V) V GS(th), I D = 150µA I D = 250µA I D = 1.0mA I D = 1.0A T C, Case Temperature ( C) T J, Temperature ( C ) Figure 11 Maximum Drain Current vs. Case Temperature Figure 12 Typical Threshold Voltage vs. Junction Temperature 400 E AS, Single Pulse Avalanche Energy (mj) I D TOP 4.2A 8.9A BOTTOM 34A Starting T J, Junction Temperature ( C) Figure 13 Maximum Avalanche Energy vs. Drain Current Final Datasheet 8

9 Thermal Response ( Z thjc ) C/W IR MOSFET Electrical characteristic diagrams Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming DTj = 125 C and Tstart =25 C (Single Pulse) Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming DTj = 25 C and Tstart = 125 C E E E E E E-01 tav (sec) Figure 14 Typical Avalanche Current vs. Pulse Width 1 D = SINGLE PULSE Notes: ( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc E-006 1E t 1, Rectangular Pulse Duration (sec) Figure 15 Maximum Effective Transient Thermal Impedance, Junction-to-Case Final Datasheet 9

10 Electrical characteristic diagrams Surface mounted on 1 in. square Cu board (still air). Mounted to PCB with Small clip heatsink (still air). Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air). Figure 16 Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs Final Datasheet

11 Electrical characteristic diagrams Figure 17a Gate Charge Test Circuit Figure 17b Gate Charge Waveform Figure 18a Unclamped Inductive Test Circuit Figure 18b Unclamped Inductive Waveforms Final Datasheet 11

12 Electrical characteristic diagrams Figure 19a Switching Time Test Circuit Figure 19b Switching Time Waveforms Final Datasheet 12

13 Package Information 5 Package Information DirectFET Board Footprint, MN Outline Please see DirectFET application note AN-35 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. Note: For the most current drawing please refer to website at : Final Datasheet 13

14 Package Information DirectFET Outline Dimension, MN Outline (Medium Size Can, N-Designation). Please see DirectFET application note AN-35 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. DirectFET TM Part Marking Note: For the most current drawing please refer to website at : Final Datasheet 14

15 Tape & Reel Information DirectFET TM Tape & Reel Dimension (Showing component orientation). Note: For the most current drawing please refer to website at : Final Datasheet 15

16 Qualification Information 6 Qualification Information Qualification Information Qualification Level Moisture Sensitivity Level RoHS Compliant DirectFET Medium Can Consumer (per JEDEC JESD47F) MSL1 (per JEDEC J-STD-020D) Yes Applicable version of JEDEC standard at the time of product release. Final Datasheet 16

17 Revision History Revision History Major changes since the last revision Page or Reference Revision Date Description of changes All pages First release data sheet. All page 2.0 This is Unique datasheet Project with Id Ratings based on RthJC. The datasheet is converted in New Infineon Template. Final Datasheet 17

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