160-Gb/s Bidirectional Parallel Optical Transceiver Module for Board-Level Interconnects

Transcription

1 160-Gb/s Bidirectional Parallel Optical Transceiver Module for Board-Level Interconnects Fuad Doany, Clint Schow, Jeff Kash C. Baks, D. Kuchta, L. Schares, & R. John IBM T. J. Watson Research Center 1

2 Terabus Program Collaborators IBM P. Pepeljugoski Y.Kwark L. Shan J. Schaub J. Trewhella F. Libsch R. Budd C. Tsang C. Patel R. Dangel B. Offrein D. Kucharski D. Guckenberger O. Liboiron-Ladouceur Formerly with Agilent Labs M. Tan G. Trott M. Nystrom A. Tandon D. Lin D. Dolfi DARPA Chip-to-chip Optical Interconnect (C2OI) Program to demonstrate a terabit/second class optical link 2

3 Outline Terabus program: board-level optical interconnects Transceiver design: components and assembly Transceiver performance Crosstalk Optocard: PCB with optical waveguides Board-level links through waveguides preliminary results Summary / Outlook 3

4 Evolution of Optical interconnects Time of Commercial Deployment (Copper Displacement): 1980 s 1990 s 2000 s WAN, MAN metro,long-haul LAN campus, enterprise System intra/inter-rack > 2010 Board module-module Module chip-chip Chip on-chip buses Distance 10 s 100 s km 10m 2km Cost ($/Gb/s) Power (mw/gb/s) Density (Gb/s/mm 2 ) <10 intra <100 inter Terabus Program < 1 m < 10 cm < 20 mm # of lines singles tens 100 s-1000 s 1000 s s 100,000 s

5 Transceiver Board-Level Optical Links Optomodule SLC Transceiver IC OE Lens Array Objectives Optocard Demonstrate high-speed board-level optical links through integrated waveguides Highly integrated packaging approach to yield dense Optomodules that look like surface-mount electrical chip carriers Component and Package Development Transceiver Chip: Low Power CMOS driver and receiver designs Optical Components: 2D arrays of 985nm VCSELs and pin photodiodes, with integrated backside lenses Organic Carrier: Multi-level high-speed wiring for transceiver data and power Packaging and Assembly: Solder hierarchy, optical system design, mechanical tolerances, thermal analysis Optocards: Dense array of low-loss optical waveguides and turning mirrors 5

6 Transceiver Assemblies Transceiver OEIC: 4x4 VCSEL Array 4x4 PD Array Transceiver Optomodule: CMOS Transceiver Chip: IBM CMOS8RF (130 nm) 5.25 mm x 3.25 mm Two generations have been produced Top IC B G A Cutout with OEs-on-IC Bottom 6

7 Transceiver Chip Architecture Differential TX inputs Differential RX outputs TX power & control TX block LDD array RX block TIA/LA array 100 Ω differential T-lines RX power & control ~500µm Differential TX inputs Differential RX outputs Perimeter I/O and power/control pads compatible with conventional flip-chip bonding to PCBs (i.e. C-4) diameter = 100 µm, pitch = 200 µm: I/O pads dictated overall chip dimensions All channels can be probed at the OEIC level with GSSG microwave probes Dense OE arrays attached through AuSn solder bumps Common ground plane, separate TX &RX power supplies 7

8 OE Components: VCSEL and Photodiode (PD) Arrays 4 x 4 VCSEL Array VCSEL performance at 70 C: 20 Gb/s 10 Gb/s f 3dB > 15 GHz Low I th, V F, R s Optimized for 70 C operation Common Attributes: Designed for 985-nm operation Substrate emitting/detecting Integrated backside lenses Diced from 4x12 arrays 250 µm x 350 µm pitch compatible with waveguide coupling 4 x 4 (PD) Array PD performance, -2 V bias φ = 60 µm, 10 Gb/s High Responsivity = 0.65 to 0.68 A/W Low-Capacitance ~ 150 ff (45-µm diameter) Bandwidths from GHz VCSELs and PDs fabricated by Agilent Laboratories Normalized Response (db) um diameter 50um diameter 60um diameter Frequency (GHz) 8

9 Transceiver Test Setup OEIC Characterization Optomodule Testing High-speed electrical probing Back-side optical probing 9

10 High-Speed Transceiver Performance: Transmitter Eye-Diagrams: 10 Gb/s Transceiver, TX Pattern Generator PRBS mvpp (SE) LDD Transmitter High-Speed Photodiode 50-µm MMF Fiber-probe 1.8 V, 2.7 V supplies 73 mw/channel Oscilloscope (20 GHz) 16 Transmitter Channels at 10 Gb/s: 10Gb/s TX 15Gb/s 10 MIT April 2007

11 High-Speed Transceiver Performance: Receiver (Full-Link) Eye-Diagrams 10 Gb/s Transceiver, TX Transceiver, RX Pattern Error-detector LDD Generator PRBS TIA/LA 50-µm 500 mv pp (SE) MMF Oscilloscope Fiber-probe (20 GHz) Receiver 2 V supply 84 mw/channel 10Gb/s RX 12Gb/s 16 Receiver Channels at 10 Gb/s: 10 Gb/s/ch: 160 Gb/s bi-directional 15.6 mw/gb/s/link 9.4 Gb/s/mm 2 /link < 1 db receiver crosstalk 11

12 Goal: Full-Optical Link on PCB, Up to 1 m Full Link Goal (mechanical model) BGA Optomodule Waveguides on Optocard OE-IC Waveguide Lens Array 48-channel Waveguide mirror array BGA site for Optomodule Optocard = FR4 with waveguides: 35 µm x 35 µm 48 channels on 62.5 µm pitch Integrated turning mirrors Integrated 48-channel collimating lens array waveguide cores on 62.5um pitch Board Loss (db) Channel Uniformity Waveguide/Mirror channel 35, 40 not shown, in-coupling scattering Uniformity 1.6 db average loss 0.9dB for 7.5cm ~0.7dB for mirror/lens assembly Channel Number Median : 1.6 Stdev:

13 Board-level interconnects through Optical Waveguides - Initial Characterization High-speed Probe CMOS IC OE s SLC Lens Array TRx Transmitter Or Reference RX Optical Fiber Optocard Probe Transceiver Power Connections Transceiver IC Optocard Waveguides Optocard Active-aligned Optomodule: DC coupling efficiency characterization High-speed testing Fiber probe aligned to Optocard waveguides High-Speed Electrical Probe 13

14 Alignment Tolerances of Optomodule-on-Optocard with dual-lens optical relay system Designed for collimated light between lenses : relaxed alignment tolerances Modeled Coupling Efficiency vs. Optomodule Offset Coupling Efficiency (db) Tx Rx Nominal w/ Offsets Nominal w/ Offsets Offset (um) Normalized Coupling Efficiency [db] 2 RX 0 TX Y-axis offset [mum] X-axis offset [mum] Y-axis offset [µm] Offset [µm] X-axis offset [µm] Alignment offsets for -0.5 db coupling efficiency: Tx: > ±35 µm Rx: > ±45 µm 14

15 Board-level Link through Optical Waveguides using Transceiver Optomodule: Preliminary Link Results TRX Module Transceiver Power Connections 2nd Module: 1 channel Transceiver IC Optocard Optocard Waveguides Fiber probe aligned to Optocard waveguides High-Speed Electrical Probe Full Link 8 TX Channels at 10Gb/s 15 MIT April RX Channels at 10Gb/s

16 Transceiver Summary Single-chip CMOS transceiver High-Speed 160 Gb/s aggregate data rate, 10 Gb/s/ch 12.5Gb/s performance also demonstrated Low-Power 15.6 mw/gb/s Dense 9.4 Gb/s/mm 2 Compact 17mm 2 (3.25 mm x 5.25 mm) Designed for low-cost chip-like packaging Uniform performance, no per-channel optimization required Optomodule Packaging Concept High performance SLC carrier SLC carrier extendable to optically-enabled MCM Conventional flip-chip attach of OE-IC to SLC Fully testable Optomodule 2-lens optical coupling with relaxed alignment tolerances demonstrated Optical PCBs: board-level optical links Tight-pitch waveguides, turning mirrors, lens arrays demonstrated Full links coming soon Manufacturing infrastructure needs to be developed 16